AI FAE Platform5.34 XSPI_V2 Guide
This chapter describes the files of the XSPI_V2 driver in the N32H49x standard peripheral library and its 50 public functions, together with the XSPI_Enhanced_Mode and XSPI_XIP_Mode examples. XSPI_V2 targets enhanced SPI and memory-mapped (XIP) access to external Flash and provides standard, enhanced, XIP and Hyperbus initialization interfaces; read it together with the “Multi-line serial peripheral interface (xSPI)” chapter of the user manual.
5.34.1 Related files
| Relative path | Purpose |
|---|---|
firmware/n32h49x_std_periph_driver/inc/n32h49x_xspi_v2.h |
Defines macros for frame format, transfer mode, FIFO thresholds, XIP, Hyperbus, interrupts and DMA selection plus the XSPI initialization structures, and declares 50 public functions |
firmware/n32h49x_std_periph_driver/src/n32h49x_xspi_v2.c |
Implements the 50 functions: basic and enhanced initialization, XIP and Hyperbus, FIFO thresholds and data count, data transfer and flags, DMA, identification and version, interrupts |
projects/n32h49x_EVAL/examples/XSPI_V2/ |
XSPI_V2 example root directory, containing the XSPI_Enhanced_Mode and XSPI_XIP_Mode examples |
projects/n32h49x_EVAL/examples/XSPI_V2/XSPI_Enhanced_Mode/ |
Directory layout of this example: MDK-ARM/, EWARM/, inc/, src/, readme.txt |
projects/n32h49x_EVAL/bsp/ |
Common board files referenced by this example: serial log functions |
5.34.2 API reference
The following 50 public functions are grouped into 10 sets in the declaration order of n32h49x_xspi_v2.h; each entry gives a summary and the comment text just above the function in n32h49x_xspi_v2.c.
Basic initialization and enable
XSPI_DeInit, XSPI_InitBase, XSPI_InitEnhanced, XSPI_InitXIP, XSPI_InitHyperbus
Structure defaults
XSPI_StructBaseInit, XSPI_InitEnhancedStruct, XSPI_InitXIPStruct, XSPI_InitHyperbusStruct
Mode enable and slave select
XSPI_EnableHyperbus, XSPI_EnableXIPHyperbusRead, XSPI_EnableXIPHyperbusWrite, XSPI_Enable, XSPI_Slave_Select, XSPI_XIP_Slave_Select
Data frame, clock stretch and data mask
XSPI_SetNumberOfDataFrame, XSPI_EnableClockStrech, XSPI_EnableDataMask
FIFO thresholds and data count
XSPI_SetTXStartFIFOThreshold, XSPI_GetTXStartFIFOThreshold, XSPI_SetTXFIFOEmptyThreshold, XSPI_GetTXFIFOEmptyThreshold, XSPI_SetRXFIFOFullThreshold, XSPI_GetRXFIFOFullThreshold, XSPI_GetTXFIFODataNum, XSPI_GetRXFIFODataNum
Data transfer and flags
XSPI_GetDataPointer, XSPI_SendData, XSPI_ReceiveData, XSPI_ClearRxFIFO, XSPI_GetFlagStatus
DMA
XSPI_EnableDma, XSPI_SetDMATxFIFOThreshold, XSPI_GetDMATxFIFOThreshold, XSPI_SetDMARxFIFOThreshold, XSPI_GetDMARxFIFOThreshold, XSPI_GetDMACompletedDataFrameNum
Identification and version
XSPI_GetIdentification, XSPI_GetComponentVersion
XIP opcodes
XSPI_SetXIPModeBit, XSPI_SetXIPReadIncrOpcode, XSPI_SetXIPReadWrapOpcode, XSPI_SetXIPWriteIncrOpcode, XSPI_SetXIPWriteWrapOpcode
Interrupts
XSPI_DisbaleAllInt, XSPI_EnableInt, XSPI_GetINTStatus, XSPI_GetINTRawStatus, XSPI_ClrITPendingBit, XSPI_ClrITAllPendingBit
void XSPI_DeInit(void)Deinitializes the XSPI peripheral registers to its default reset values.
Source comment
name XSPI_DeInit.
fun Deinitializes the XSPI peripheral registers to its default reset values.
return none
void XSPI_InitBase(XSPI_Module *xSPIx, XSPI_InitType* XSPI_StandInitStruct)Initilizes the Standard SPI Master mode or Slave mode.
Source comment
name XSPI_InitBase.
fun Initilizes the Standard SPI Master mode or Slave mode.
param SCPH:
- XSPI_SCPH_FIRST_EDGE
- XSPI_SCPH_SECOND_EDGE
param SCPOL:
- XSPI_SCPOL_LOW_LEVEL
- XSPI_SCPOL_HIGH_LEVEL
param FrameFormat:
- XSPI_STANDARD_MODE
- XSPI_DUAL_LINE_MODE Note: Only Slave mode can used
- XSPI_QUAD_LINE_MODE Note: Only Slave mode can used
- XSPI_OCTAL_LINE_MODE Note: Only Slave mode can used
param DataFrameSize:
- XSPI_FRAME_SIZE_4_BIT
- XSPI_FRAME_SIZE_5_BIT
- XSPI_FRAME_SIZE_6_BIT
- XSPI_FRAME_SIZE_7_BIT
- XSPI_FRAME_SIZE_8_BIT
- XSPI_FRAME_SIZE_9_BIT
- XSPI_FRAME_SIZE_10_BIT
- XSPI_FRAME_SIZE_11_BIT
- XSPI_FRAME_SIZE_12_BIT
- XSPI_FRAME_SIZE_13_BIT
- XSPI_FRAME_SIZE_14_BIT
- XSPI_FRAME_SIZE_15_BIT
- XSPI_FRAME_SIZE_16_BIT
- XSPI_FRAME_SIZE_17_BIT
- XSPI_FRAME_SIZE_18_BIT
- XSPI_FRAME_SIZE_19_BIT
- XSPI_FRAME_SIZE_20_BIT
- XSPI_FRAME_SIZE_21_BIT
- XSPI_FRAME_SIZE_22_BIT
- XSPI_FRAME_SIZE_23_BIT
- XSPI_FRAME_SIZE_24_BIT
- XSPI_FRAME_SIZE_25_BIT
- XSPI_FRAME_SIZE_26_BIT
- XSPI_FRAME_SIZE_27_BIT
- XSPI_FRAME_SIZE_28_BIT
- XSPI_FRAME_SIZE_29_BIT
- XSPI_FRAME_SIZE_30_BIT
- XSPI_FRAME_SIZE_31_BIT
- XSPI_FRAME_SIZE_32_BIT
param TransferMode:
- XSPI_TX_AND_RX_MODE
- XSPI_TX_ONLY_MODE
- XSPI_RX_ONLY_MODE
- XSPI_EEPROM_READ_MODE
param Role:
- XSPI_SLAVE_ROLE
- XSPI_MASTER_ROLE
param Baudr:
- Any even number between 2 and 65534
param RxdSamplingEdge:
- XSPI_RXD_HCLK_RISING_SAMPLING
- XSPI_RXD_HCLK_FALLING_SAMPLING
param RxdSampleDelay:
- Valid values 0 ~ 255, measured in HCLK
param NssToggle:
- XSPI_NSS_TOGGLE_DISABLE
- XSPI_NSS_TOGGLE_ENABLE
param EnhSlave_ClockStrech:
- XSPI_CLOCK_STRETCH_DISABLE
- XSPI_CLOCK_STRETCH_ENABLE
return none
void XSPI_InitEnhanced(XSPI_Module *xSPIx, XSPI_EnhancedInitType* XSPI_EnhancedInitStruct)Initilizes the enhanced SPI mode.
Source comment
name XSPI_InitEnhanced.
fun Initilizes the enhanced SPI mode.
param SCPH:
- XSPI_SCPH_FIRST_EDGE
- XSPI_SCPH_SECOND_EDGE
param SCPOL:
- XSPI_SCPOL_LOW_LEVEL
- XSPI_SCPOL_HIGH_LEVEL
param FrameFormat:
- XSPI_DUAL_LINE_MODE
- XSPI_QUAD_LINE_MODE
- XSPI_OCTAL_LINE_MODE
param DataFrameSize:
- XSPI_FRAME_SIZE_4_BIT
- XSPI_FRAME_SIZE_5_BIT
- XSPI_FRAME_SIZE_6_BIT
- XSPI_FRAME_SIZE_7_BIT
- XSPI_FRAME_SIZE_8_BIT
- XSPI_FRAME_SIZE_9_BIT
- XSPI_FRAME_SIZE_10_BIT
- XSPI_FRAME_SIZE_11_BIT
- XSPI_FRAME_SIZE_12_BIT
- XSPI_FRAME_SIZE_13_BIT
- XSPI_FRAME_SIZE_14_BIT
- XSPI_FRAME_SIZE_15_BIT
- XSPI_FRAME_SIZE_16_BIT
- XSPI_FRAME_SIZE_17_BIT
- XSPI_FRAME_SIZE_18_BIT
- XSPI_FRAME_SIZE_19_BIT
- XSPI_FRAME_SIZE_20_BIT
- XSPI_FRAME_SIZE_21_BIT
- XSPI_FRAME_SIZE_22_BIT
- XSPI_FRAME_SIZE_23_BIT
- XSPI_FRAME_SIZE_24_BIT
- XSPI_FRAME_SIZE_25_BIT
- XSPI_FRAME_SIZE_26_BIT
- XSPI_FRAME_SIZE_27_BIT
- XSPI_FRAME_SIZE_28_BIT
- XSPI_FRAME_SIZE_29_BIT
- XSPI_FRAME_SIZE_30_BIT
- XSPI_FRAME_SIZE_31_BIT
- XSPI_FRAME_SIZE_32_BIT
param TransferMode:
- XSPI_TX_ONLY_MODE
- XSPI_RX_ONLY_MODE
param Baudr:
- Any even number between 2 and 65534
param RxdSamplingEdge:
- XSPI_RXD_HCLK_RISING_SAMPLING
- XSPI_RXD_HCLK_FALLING_SAMPLING
Note: no need to worry about it in DDR mode
param RxdSampleDelay:
- Valid values 0 ~ 255, measured in HCLK
Note: no need to worry about it in DDR mode
param TransferType:
- XSPI_INST_ADDR_SINGLE_LINE
- XSPI_INST_SINGLE_LINE_ADDR_MULTI_LINE
- XSPI_INST_ADDR_MULTI_LINE
param AddrLen:
- XSPI_NO_ADDR_PHASE
- XSPI_ADDR_LEN_4BIT
- XSPI_ADDR_LEN_8BIT
- XSPI_ADDR_LEN_12BIT
- XSPI_ADDR_LEN_16BIT
- XSPI_ADDR_LEN_20BIT
- XSPI_ADDR_LEN_24BIT
- XSPI_ADDR_LEN_28BIT
- XSPI_ADDR_LEN_32BIT
- XSPI_ADDR_LEN_36BIT
- XSPI_ADDR_LEN_40BIT
- XSPI_ADDR_LEN_44BIT
- XSPI_ADDR_LEN_48BIT
- XSPI_ADDR_LEN_52BIT
- XSPI_ADDR_LEN_56BIT
- XSPI_ADDR_LEN_60BIT
param InstructLen:
- XSPI_NO_INST_PHASE
- XSPI_INST_LEN_4BIT
- XSPI_INST_LEN_8BIT
- XSPI_INST_LEN_16BIT
param WaitCycles:
- XSPI_WAIT_0_CYCLES
- XSPI_WAIT_1_CYCLES
- XSPI_WAIT_2_CYCLES
- XSPI_WAIT_3_CYCLES
- XSPI_WAIT_4_CYCLES
- XSPI_WAIT_5_CYCLES
- XSPI_WAIT_6_CYCLES
- XSPI_WAIT_7_CYCLES
- XSPI_WAIT_8_CYCLES
- XSPI_WAIT_9_CYCLES
- XSPI_WAIT_10_CYCLES
- XSPI_WAIT_11_CYCLES
- XSPI_WAIT_12_CYCLES
- XSPI_WAIT_13_CYCLES
- XSPI_WAIT_14_CYCLES
- XSPI_WAIT_15_CYCLES
- XSPI_WAIT_16_CYCLES
- XSPI_WAIT_17_CYCLES
- XSPI_WAIT_18_CYCLES
- XSPI_WAIT_19_CYCLES
- XSPI_WAIT_20_CYCLES
- XSPI_WAIT_21_CYCLES
- XSPI_WAIT_22_CYCLES
- XSPI_WAIT_23_CYCLES
- XSPI_WAIT_24_CYCLES
- XSPI_WAIT_25_CYCLES
- XSPI_WAIT_26_CYCLES
- XSPI_WAIT_27_CYCLES
- XSPI_WAIT_28_CYCLES
- XSPI_WAIT_29_CYCLES
- XSPI_WAIT_30_CYCLES
- XSPI_WAIT_31_CYCLES
- XSPI_WAIT_32_CYCLES
param ClockStrech:
- XSPI_CLOCK_STRETCH_DISABLE
- XSPI_CLOCK_STRETCH_ENABLE
param DDREable:
- XSPI_DDR_DISABLE
- XSPI_DDR_ENABLE
param DDR_InitType:
Note: The following parameters only need to be configured in DDR mode
param InstrucDDR:
- XSPI_INST_DDR_DISABLE
- XSPI_INST_DDR_ENABLE
param RxdsSignal:
- XSPI_RXDS_SIGNAL_DISABLE
- XSPI_RXDS_SIGNAL_ENABLE
param TxdDataMask:
- XSPI_DATA_MASK_DISABLE
- XSPI_DATA_MASK_ENABLE
param TxdDriverEdge:
- 0 ~ 255, Max value = (BAUD/2) - 1, BAUDR = CLKDIV[14:0] * 2)
return none
void XSPI_InitXIP(XSPI_Module *xSPIx, XSPI_XIPInitType* XSPI_XIPInitStruct)Initilizes the XIP mode.
Source comment
name XSPI_InitEnhanced.
fun Initilizes the XIP mode.
param SCPH:
- XSPI_SCPH_FIRST_EDGE
- XSPI_SCPH_SECOND_EDGE
param SCPOL:
- XSPI_SCPOL_LOW_LEVEL
- XSPI_SCPOL_HIGH_LEVEL
param DataFrameSize:
- XSPI_FRAME_SIZE_4_BIT
- XSPI_FRAME_SIZE_5_BIT
- XSPI_FRAME_SIZE_6_BIT
- XSPI_FRAME_SIZE_7_BIT
- XSPI_FRAME_SIZE_8_BIT
- XSPI_FRAME_SIZE_9_BIT
- XSPI_FRAME_SIZE_10_BIT
- XSPI_FRAME_SIZE_11_BIT
- XSPI_FRAME_SIZE_12_BIT
- XSPI_FRAME_SIZE_13_BIT
- XSPI_FRAME_SIZE_14_BIT
- XSPI_FRAME_SIZE_15_BIT
- XSPI_FRAME_SIZE_16_BIT
- XSPI_FRAME_SIZE_17_BIT
- XSPI_FRAME_SIZE_18_BIT
- XSPI_FRAME_SIZE_19_BIT
- XSPI_FRAME_SIZE_20_BIT
- XSPI_FRAME_SIZE_21_BIT
- XSPI_FRAME_SIZE_22_BIT
- XSPI_FRAME_SIZE_23_BIT
- XSPI_FRAME_SIZE_24_BIT
- XSPI_FRAME_SIZE_25_BIT
- XSPI_FRAME_SIZE_26_BIT
- XSPI_FRAME_SIZE_27_BIT
- XSPI_FRAME_SIZE_28_BIT
- XSPI_FRAME_SIZE_29_BIT
- XSPI_FRAME_SIZE_30_BIT
- XSPI_FRAME_SIZE_31_BIT
- XSPI_FRAME_SIZE_32_BIT
param TransferMode:
- XSPI_TX_ONLY_MODE
- XSPI_RX_ONLY_MODE
param Baudr:
- Any even number between 2 and 65534
param XipFrameFormat:
- XSPI_DUAL_LINE_MODE
- XSPI_QUAD_LINE_MODE
- XSPI_OCTAL_LINE_MODE
param XipTransferType:
- XSPI_INST_ADDR_SINGLE_LINE
- XSPI_INST_SINGLE_LINE_ADDR_MULTI_LINE
- XSPI_INST_ADDR_MULTI_LINE
param XipAddrLen:
For XIP Read Mode:
- XSPI_NO_ADDR_PHASE
- XSPI_ADDR_LEN_4BIT
- XSPI_ADDR_LEN_8BIT
- XSPI_ADDR_LEN_12BIT
- XSPI_ADDR_LEN_16BIT
- XSPI_ADDR_LEN_20BIT
- XSPI_ADDR_LEN_24BIT
- XSPI_ADDR_LEN_28BIT
- XSPI_ADDR_LEN_32BIT
- XSPI_ADDR_LEN_36BIT
- XSPI_ADDR_LEN_40BIT
- XSPI_ADDR_LEN_44BIT
- XSPI_ADDR_LEN_48BIT
- XSPI_ADDR_LEN_52BIT
- XSPI_ADDR_LEN_56BIT
- XSPI_ADDR_LEN_60BIT
For XIP Read Mode:
- XSPI_NO_ADDR_PHASE
- XSPI_ADDR_LEN_4BIT
- XSPI_ADDR_LEN_8BIT
- XSPI_ADDR_LEN_12BIT
- XSPI_ADDR_LEN_16BIT
- XSPI_ADDR_LEN_20BIT
- XSPI_ADDR_LEN_24BIT
- XSPI_ADDR_LEN_28BIT
- XSPI_ADDR_LEN_32BIT
param XipWaitCycles:
- XSPI_WAIT_0_CYCLES
- XSPI_WAIT_1_CYCLES
- XSPI_WAIT_2_CYCLES
- XSPI_WAIT_3_CYCLES
- XSPI_WAIT_4_CYCLES
- XSPI_WAIT_5_CYCLES
- XSPI_WAIT_6_CYCLES
- XSPI_WAIT_7_CYCLES
- XSPI_WAIT_8_CYCLES
- XSPI_WAIT_9_CYCLES
- XSPI_WAIT_10_CYCLES
- XSPI_WAIT_11_CYCLES
- XSPI_WAIT_12_CYCLES
- XSPI_WAIT_13_CYCLES
- XSPI_WAIT_14_CYCLES
- XSPI_WAIT_15_CYCLES
- XSPI_WAIT_16_CYCLES
- XSPI_WAIT_17_CYCLES
- XSPI_WAIT_18_CYCLES
- XSPI_WAIT_19_CYCLES
- XSPI_WAIT_20_CYCLES
- XSPI_WAIT_21_CYCLES
- XSPI_WAIT_22_CYCLES
- XSPI_WAIT_23_CYCLES
- XSPI_WAIT_24_CYCLES
- XSPI_WAIT_25_CYCLES
- XSPI_WAIT_26_CYCLES
- XSPI_WAIT_27_CYCLES
- XSPI_WAIT_28_CYCLES
- XSPI_WAIT_29_CYCLES
- XSPI_WAIT_30_CYCLES
- XSPI_WAIT_31_CYCLES
- XSPI_WAIT_32_CYCLES
param XipDDREable:
- XSPI_DDR_DISABLE
- XSPI_DDR_ENABLE
param Info:
param Read_XIPInitType:
Note: XIP Read Parameter, Configuration is only needed when reading from XIP
param XipInstructLen:
- XSPI_NO_INST_PHASE
- XSPI_INST_LEN_4BIT
- XSPI_INST_LEN_8BIT
- XSPI_INST_LEN_16BIT
param XipInstrctEnable:
- XSPI_XIP_INSTRUCT_DISABLE
- XSPI_XIP_INSTRUCT_ENABLE
param XipDFSHC:
- XSPI_XIP_DFSHC_DISABLE
- XSPI_XIP_DFSHC_ENABLE
param XipPrefetch:
- XSPI_XIP_PREFETCH_DISABLE
- XSPI_XIP_PREFETCH_ENABLE
param XipModeBit:
- XSPI_XIP_MODE_BIT_DISABLE
- XSPI_XIP_MODE_BIT_ENABLE
param XipModeBitLen:
- XSPI_XIP_MODE_BIT_LEN_2_BIT
- XSPI_XIP_MODE_BIT_LEN_4_BIT
- XSPI_XIP_MODE_BIT_LEN_8_BIT
- XSPI_XIP_MODE_BIT_LEN_16_BIT
param ContinueTransfer:
Note: XIP Read Parameter
param XipContinueTransfer:
- XSPI_XIP_CONTINUE_TRANSFER_DISABLE
- XSPI_XIP_CONTINUE_TRANSFER_ENABLE
param XipWatchDogTimeout:
- 0 ~ 255, in terms of HCLK
param DDR_Info:
param DDR_InitType:
Note: Configuration is only required for XIP DDR reads
param TxdDriverEdge:
- 0 ~ 255, Max value = (BAUD/2) - 1, BAUDR = CLKDIV[14:0] * 2)
param XipInstrucDDR:
- XSPI_INST_DDR_DISABLE
- XSPI_INST_DDR_ENABLE
param XipRxdsSignal:
- XSPI_RXDS_SIGNAL_DISABLE
- XSPI_RXDS_SIGNAL_ENABLE
param Rxds_InitType:
Note: Configuration is only required for XIP Non-DDR reads
param RxdSamplingEdge:
- XSPI_RXD_HCLK_RISING_SAMPLING
- XSPI_RXD_HCLK_FALLING_SAMPLING
param RxdSampleDelay:
- Valid values 0 ~ 255, measured in HCLK
param Write_XIPInitType:
Note: XIP Write Parameter, Configuration is only needed when writing from XIP
param XipInstructLen:
- XSPI_NO_INST_PHASE
- XSPI_INST_LEN_4BIT
- XSPI_INST_LEN_8BIT
- XSPI_INST_LEN_16BIT
param DDR_InitType:
Note: Configuration is only required for XIP DDR writes
param TxdDriverEdge:
- 0 ~ 255, Max value = (BAUD/2) - 1, BAUDR = CLKDIV[14:0] * 2)
param XipInstrucDDR:
- XSPI_INST_DDR_DISABLE
- XSPI_RXDS_SIGNAL_ENABLE
return none
Use note: The name field in the source comment is written as XSPI_InitEnhanced. and differs from the function name XSPI_InitXIP; call it by the function name.
void XSPI_InitHyperbus(XSPI_Module *xSPIx, XSPI_HyperbusInitType* XSPI_HyperbusInitStruct)Initilizes the Hyperbus mode.
Source comment
name XSPI_InitHyperbus.
fun Initilizes the Hyperbus mode.
param Baudr:
- Any even number between 2 and 65534
param TransferMode:
- XSPI_TX_ONLY_MODE
- XSPI_RX_ONLY_MODE
param DataFrameSize:
- XSPI_FRAME_SIZE_4_BIT
- XSPI_FRAME_SIZE_5_BIT
- XSPI_FRAME_SIZE_6_BIT
- XSPI_FRAME_SIZE_7_BIT
- XSPI_FRAME_SIZE_8_BIT
- XSPI_FRAME_SIZE_9_BIT
- XSPI_FRAME_SIZE_10_BIT
- XSPI_FRAME_SIZE_11_BIT
- XSPI_FRAME_SIZE_12_BIT
- XSPI_FRAME_SIZE_13_BIT
- XSPI_FRAME_SIZE_14_BIT
- XSPI_FRAME_SIZE_15_BIT
- XSPI_FRAME_SIZE_16_BIT
- XSPI_FRAME_SIZE_17_BIT
- XSPI_FRAME_SIZE_18_BIT
- XSPI_FRAME_SIZE_19_BIT
- XSPI_FRAME_SIZE_20_BIT
- XSPI_FRAME_SIZE_21_BIT
- XSPI_FRAME_SIZE_22_BIT
- XSPI_FRAME_SIZE_23_BIT
- XSPI_FRAME_SIZE_24_BIT
- XSPI_FRAME_SIZE_25_BIT
- XSPI_FRAME_SIZE_26_BIT
- XSPI_FRAME_SIZE_27_BIT
- XSPI_FRAME_SIZE_28_BIT
- XSPI_FRAME_SIZE_29_BIT
- XSPI_FRAME_SIZE_30_BIT
- XSPI_FRAME_SIZE_31_BIT
- XSPI_FRAME_SIZE_32_BIT
param WaitCycles:
- XSPI_WAIT_0_CYCLES
- XSPI_WAIT_1_CYCLES
- XSPI_WAIT_2_CYCLES
- XSPI_WAIT_3_CYCLES
- XSPI_WAIT_4_CYCLES
- XSPI_WAIT_5_CYCLES
- XSPI_WAIT_6_CYCLES
- XSPI_WAIT_7_CYCLES
- XSPI_WAIT_8_CYCLES
- XSPI_WAIT_9_CYCLES
- XSPI_WAIT_10_CYCLES
- XSPI_WAIT_11_CYCLES
- XSPI_WAIT_12_CYCLES
- XSPI_WAIT_13_CYCLES
- XSPI_WAIT_14_CYCLES
- XSPI_WAIT_15_CYCLES
- XSPI_WAIT_16_CYCLES
- XSPI_WAIT_17_CYCLES
- XSPI_WAIT_18_CYCLES
- XSPI_WAIT_19_CYCLES
- XSPI_WAIT_20_CYCLES
- XSPI_WAIT_21_CYCLES
- XSPI_WAIT_22_CYCLES
- XSPI_WAIT_23_CYCLES
- XSPI_WAIT_24_CYCLES
- XSPI_WAIT_25_CYCLES
- XSPI_WAIT_26_CYCLES
- XSPI_WAIT_27_CYCLES
- XSPI_WAIT_28_CYCLES
- XSPI_WAIT_29_CYCLES
- XSPI_WAIT_30_CYCLES
- XSPI_WAIT_31_CYCLES
- XSPI_WAIT_32_CYCLES
param CAPhaseRxds:
- XSPI_HYPERBUS_CA_RXDS_DISABLE
- XSPI_HYPERBUS_CA_RXDS_ENABLE
param ClockStrech:
- XSPI_CLOCK_STRETCH_DISABLE
- XSPI_CLOCK_STRETCH_ENABLE
param TxdDriverEdge:
- 0 ~ 255, Max value = (BAUD/2) - 1, BAUDR = CLKDIV[14:0] * 2)
param XIPHyperbus:
- XSPI_XIP_HYPERBUS_MODE
- XSPI_NON_XIP_HYPERBUS_MODE
param XIP_ReadHyperbusInitType:
Note: XIP Hyperbus Read Parameters
param XipFixDFS:
- XSPI_XIP_DFSHC_DISABLE
- XSPI_XIP_DFSHC_ENABLE
param XipPrefetch:
- XSPI_XIP_PREFETCH_DISABLE
- XSPI_XIP_PREFETCH_ENABLE
return none
void XSPI_StructBaseInit(XSPI_InitType* XSPI_StandInitStruct)Fills each XSPI_InitType member with its default value.
Source comment
name XSPI_StructBaseInit.
fun Fills each XSPI_InitType member with its default value.
param XSPI_InitType (The input parameters must be the following values):
- SCPH
- SCPOL
- FrameFormat
- DataFrameSize
- TransferMode
- Role
- Baudr
- RxdSamplingEdge
- RxdSampleDelay
- NssToggle
- EnhSlave_ClockStrech
return none
void XSPI_InitEnhancedStruct(XSPI_EnhancedInitType* XSPI_EnhancedInitStruct)Fills each XSPI_EnhancedInitType member with its default value.
Source comment
name XSPI_InitEnhancedStruct.
fun Fills each XSPI_EnhancedInitType member with its default value.
param XSPI_EnhancedInitType (The input parameters must be the following values):
- SCPH
- SCPOL
- FrameFormat
- DataFrameSize
- TransferMode
- Baudr
- RxdSamplingEdge
- RxdSampleDelay
- TransferType
- AddrLen
- InstructLen
- WaitCycles
- ClockStrech
- DDREable
- InstrucDDR
- RxdsSignal
- TxdDataMask
- TxdDriverEdge
return none
void XSPI_InitXIPStruct(XSPI_XIPInitType* XSPI_XIPInitStruct)Fills each XSPI_XIPInitType member with its default value.
Source comment
name XSPI_InitXIPStruct.
fun Fills each XSPI_XIPInitType member with its default value.
param XSPI_XIPInitType (The input parameters must be the following values):
- SCPH
- SCPOL
- DataFrameSize
- TransferMode
- Baudr
- XipFrameFormat
- XipTransferType
- XipAddrLen
- XipWaitCycles
- XipDDREable
- XIP_Info
XIP Read Parameter:
- XipInstructLen
- XipInstrctEnable
- Info
DDR Parameter:
- TxdDriverEdge
- XipInstrucDDR
- XipRxdsSignal
- XipDFSHC
- XipPrefetch
- XipModeBit
- XipModeBitLen
- ContinueTransfer
Continue Transfer Parameter:
- XipContinueTransfer
- XipWatchDogTimeout
return none
void XSPI_InitHyperbusStruct(XSPI_HyperbusInitType* XSPI_HyperbusInitStruct)Fills each XSPI_HyperbusInitType member with its default value.
Source comment
name XSPI_InitHyperbusStruct.
fun Fills each XSPI_HyperbusInitType member with its default value.
param XSPI_HyperbusInitType (The input parameters must be the following values):
- Baudr
- TransferMode
- DataFrameSize
- WaitCycles
- CAPhaseRxds
- ClockStrech
- TxdDriverEdge
- XIPHyperbus
- XIP_ReadHyperbusInitType
XIP Hyperbus Read Parameter:
- XipFixDFS
- XipPrefetch
return none
void XSPI_EnableHyperbus(XSPI_Module* xSPIx, FunctionalState cmd)Control XSPI Hyperbus function switch.
Source comment
name XSPI_EnableHyperbus.
fun Control XSPI Hyperbus function switch.
param cmd
- ENABLE
- DISABLE
return none
void XSPI_EnableXIPHyperbusRead(XSPI_Module* xSPIx, FunctionalState cmd)Control XSPI XIP Hyperbus Read function switch.
Source comment
name XSPI_EnableXIPHyperbusRead.
fun Control XSPI XIP Hyperbus Read function switch.
param cmd
- ENABLE
- DISABLE
return none
void XSPI_EnableXIPHyperbusWrite(XSPI_Module* xSPIx, FunctionalState cmd)Control XSPI XIP Hyperbus Write function switch.
Source comment
name XSPI_EnableXIPHyperbusWrite.
fun Control XSPI XIP Hyperbus Write function switch.
param cmd
- ENABLE
- DISABLE
return none
void XSPI_SetNumberOfDataFrame(XSPI_Module* xSPIx, uint32_t NumDataFrame)Set Number of Data Frames.
Source comment
name XSPI_SetNumberOfDataFrame.
fun Set Number of Data Frames.
param NumDataFrame
- 1 ~ 65536
return none
void XSPI_EnableClockStrech(XSPI_Module* xSPIx, FunctionalState cmd)Control XSPI Clock Strech function switch.
Source comment
name XSPI_EnableClockStrech.
fun Control XSPI Clock Strech function switch.
param cmd
- ENABLE
- DISABLE
return none
void XSPI_EnableDataMask(XSPI_Module* xSPIx, FunctionalState cmd)Control XSPI Data Mask function switch.
Source comment
name XSPI_EnableDataMask.
fun Control XSPI Data Mask function switch.
param cmd
- ENABLE
- DISABLE
return none
void XSPI_Enable(XSPI_Module* xSPIx, FunctionalState cmd)Control XSPI function switch.
Source comment
name XSPI_Enable.
fun Control XSPI function switch.
param cmd
- ENABLE
- DISABLE
return none
void XSPI_Slave_Select(XSPI_Module* xSPIx, uint32_t Slave)Slave Select Enable.
Source comment
name XSPI_Slave_Select.
fun Slave Select Enable.
param Slave:
- XSPI_NO_SELECT_SLAVE
- XSPI_SELECT_SLAVE_1
- XSPI_SELECT_SLAVE_2
return none
void XSPI_XIP_Slave_Select(XSPI_Module* xSPIx, uint32_t Slave)XIP Mode Slave Select Enable.
Source comment
name XSPI_XIP_Slave_Select.
fun XIP Mode Slave Select Enable.
param Slave:
- XSPI_NO_SELECT_SLAVE
- XSPI_SELECT_SLAVE_1
- XSPI_SELECT_SLAVE_2
return none
void XSPI_SetTXStartFIFOThreshold(XSPI_Module* xSPIx, uint32_t fifo_level)Set Transfer start FIFO Threshold
Source comment
name XSPI_SetTXStartFIFOThreshold.
fun Set Transfer start FIFO Threshold
param fifo_level:
- XSPI_FIFO_THRESHOLD_LEVEL0
- XSPI_FIFO_THRESHOLD_LEVEL1
- XSPI_FIFO_THRESHOLD_LEVEL2
- XSPI_FIFO_THRESHOLD_LEVEL3
- XSPI_FIFO_THRESHOLD_LEVEL4
- XSPI_FIFO_THRESHOLD_LEVEL5
- XSPI_FIFO_THRESHOLD_LEVEL6
- XSPI_FIFO_THRESHOLD_LEVEL7
- XSPI_FIFO_THRESHOLD_LEVEL8
- XSPI_FIFO_THRESHOLD_LEVEL9
- XSPI_FIFO_THRESHOLD_LEVEL10
- XSPI_FIFO_THRESHOLD_LEVEL11
- XSPI_FIFO_THRESHOLD_LEVEL12
- XSPI_FIFO_THRESHOLD_LEVEL13
- XSPI_FIFO_THRESHOLD_LEVEL14
- XSPI_FIFO_THRESHOLD_LEVEL15
return none
uint16_t XSPI_GetTXStartFIFOThreshold(XSPI_Module* xSPIx)Get Transfer start FIFO Threshold
Source comment
name XSPI_GetTXStartFIFOThreshold.
fun Get Transfer start FIFO Threshold
param fifo_level:
return Transfer start FIFO Threshold
void XSPI_SetTXFIFOEmptyThreshold(XSPI_Module* xSPIx, uint32_t fifo_level)Set Transmit FIFO Empty Threshold
Source comment
name XSPI_SetTXFIFOEmptyThreshold.
fun Set Transmit FIFO Empty Threshold
not When the value is less than or equal to this threshold, a transmit FIFO empty interrupt is triggered.
param fifo_level:
- XSPI_FIFO_THRESHOLD_LEVEL0
- XSPI_FIFO_THRESHOLD_LEVEL1
- XSPI_FIFO_THRESHOLD_LEVEL2
- XSPI_FIFO_THRESHOLD_LEVEL3
- XSPI_FIFO_THRESHOLD_LEVEL4
- XSPI_FIFO_THRESHOLD_LEVEL5
- XSPI_FIFO_THRESHOLD_LEVEL6
- XSPI_FIFO_THRESHOLD_LEVEL7
- XSPI_FIFO_THRESHOLD_LEVEL8
- XSPI_FIFO_THRESHOLD_LEVEL9
- XSPI_FIFO_THRESHOLD_LEVEL10
- XSPI_FIFO_THRESHOLD_LEVEL11
- XSPI_FIFO_THRESHOLD_LEVEL12
- XSPI_FIFO_THRESHOLD_LEVEL13
- XSPI_FIFO_THRESHOLD_LEVEL14
- XSPI_FIFO_THRESHOLD_LEVEL15
return none
uint16_t XSPI_GetTXFIFOEmptyThreshold(XSPI_Module* xSPIx)Get Transmit FIFO Empty Threshold
Source comment
name XSPI_GetTXFIFOEmptyThreshold.
fun Get Transmit FIFO Empty Threshold
param fifo_level:
return Transmit FIFO Empty Threshold
void XSPI_SetRXFIFOFullThreshold(XSPI_Module* xSPIx, uint32_t fifo_level)Set Receive FIFO Full Threshold
Source comment
name XSPI_SetRXFIFOFullThreshold.
fun Set Receive FIFO Full Threshold
not When the data number is greater than or equal to (this threshold + 1), triggered receive FIFO full interrupt.
param fifo_level:
- XSPI_FIFO_THRESHOLD_LEVEL0
- XSPI_FIFO_THRESHOLD_LEVEL1
- XSPI_FIFO_THRESHOLD_LEVEL2
- XSPI_FIFO_THRESHOLD_LEVEL3
- XSPI_FIFO_THRESHOLD_LEVEL4
- XSPI_FIFO_THRESHOLD_LEVEL5
- XSPI_FIFO_THRESHOLD_LEVEL6
- XSPI_FIFO_THRESHOLD_LEVEL7
- XSPI_FIFO_THRESHOLD_LEVEL8
- XSPI_FIFO_THRESHOLD_LEVEL9
- XSPI_FIFO_THRESHOLD_LEVEL10
- XSPI_FIFO_THRESHOLD_LEVEL11
- XSPI_FIFO_THRESHOLD_LEVEL12
- XSPI_FIFO_THRESHOLD_LEVEL13
- XSPI_FIFO_THRESHOLD_LEVEL14
- XSPI_FIFO_THRESHOLD_LEVEL15
return none
uint16_t XSPI_GetRXFIFOFullThreshold(XSPI_Module* xSPIx)Get Receive FIFO Full Threshold
Source comment
name XSPI_GetRXFIFOFullThreshold.
fun Get Receive FIFO Full Threshold
param fifo_level:
return Receive FIFO Full Threshold
uint16_t XSPI_GetTXFIFODataNum(XSPI_Module* xSPIx)Get Transmit FIFO Data Number
Source comment
name XSPI_GetTXFIFODataNum.
fun Get Transmit FIFO Data Number
note Contains the number of valid data entries in the transmit FIFO
param fifo_level:
return Transmit FIFO Data Number
uint16_t XSPI_GetRXFIFODataNum(XSPI_Module* xSPIx)Get Receive FIFO Data Number
Source comment
name XSPI_GetRXFIFODataNum.
fun Get Receive FIFO Data Number
note Contains the number of valid data entries in the receive FIFO
param fifo_level:
return Receive FIFO Data Number
uint32_t XSPI_GetDataPointer(XSPI_Module* xSPIx)Get Pointer of XSPI DAT0 register.
Source comment
name XSPIGetDataPointer.
fun Get Pointer of XSPI DAT0 register.
return The pointer of XSPI DAT0 register.
Use note: The name field in the source comment is written as XSPIGetDataPointer. and differs from the function name XSPI_GetDataPointer; call it by the function name.
void XSPI_SendData(XSPI_Module* xSPIx, uint32_t SendData)Write one data direct to XSPI DAT register to send.
Source comment
name XSPI_SendData.
fun Write one data direct to XSPI DAT register to send.
param SendData:
- data to be send
return none
uint32_t XSPI_ReceiveData(XSPI_Module* xSPIx)Read one data from XSPI DAT0 register.
Source comment
name XSPI_ReceiveData.
fun Read one data from XSPI DAT0 register.
return The value of XSPI DAT0 register.
void XSPI_ClearRxFIFO(XSPI_Module* xSPIx)Clear RX FIFO
Source comment
name XSPI_ClearRxFIFO.
fun Clear RX FIFO
return none
void XSPI_EnableDma(XSPI_Module* xSPIx, uint16_t XSPI_DMAReq, FunctionalState Cmd)Enables or disables the XSPI DMA interface.
Source comment
name XSPI_EnableDma.
fun Enables or disables the XSPI DMA interface.
param xSPIx :
param XSPI_DMAReq :
- XSPI_DMA_TX
- XSPI_DMA_RX
param Cmd :
- ENABLE
- DISABLE
return none
void XSPI_SetDMATxFIFOThreshold(XSPI_Module* xSPIx, uint32_t fifo_level)Set DMA Tx FIFO Threshold
Source comment
name XSPI_SetDMATxFIFOThreshold.
fun Set DMA Tx FIFO Threshold
param fifo_level:
- XSPI_FIFO_THRESHOLD_LEVEL0
- XSPI_FIFO_THRESHOLD_LEVEL1
- XSPI_FIFO_THRESHOLD_LEVEL2
- XSPI_FIFO_THRESHOLD_LEVEL3
- XSPI_FIFO_THRESHOLD_LEVEL4
- XSPI_FIFO_THRESHOLD_LEVEL5
- XSPI_FIFO_THRESHOLD_LEVEL6
- XSPI_FIFO_THRESHOLD_LEVEL7
- XSPI_FIFO_THRESHOLD_LEVEL8
- XSPI_FIFO_THRESHOLD_LEVEL9
- XSPI_FIFO_THRESHOLD_LEVEL10
- XSPI_FIFO_THRESHOLD_LEVEL11
- XSPI_FIFO_THRESHOLD_LEVEL12
- XSPI_FIFO_THRESHOLD_LEVEL13
- XSPI_FIFO_THRESHOLD_LEVEL14
- XSPI_FIFO_THRESHOLD_LEVEL15
return none
uint16_t XSPI_GetDMATxFIFOThreshold(XSPI_Module* xSPIx)Get DMA Tx FIFO Threshold
Source comment
name XSPI_GetDMATxFIFOThreshold.
fun Get DMA Tx FIFO Threshold
param fifo_level:
return DMA Tx FIFO Threshold
void XSPI_SetDMARxFIFOThreshold(XSPI_Module* xSPIx, uint32_t fifo_level)Set DMA Rx FIFO Threshold
Source comment
name XSPI_SetDMARxFIFOThreshold.
fun Set DMA Rx FIFO Threshold
not dma_rx_req is generated when the number of valid data entries in the receive FIFO is equal to or above this field value + 1
param fifo_level:
- XSPI_FIFO_THRESHOLD_LEVEL0
- XSPI_FIFO_THRESHOLD_LEVEL1
- XSPI_FIFO_THRESHOLD_LEVEL2
- XSPI_FIFO_THRESHOLD_LEVEL3
- XSPI_FIFO_THRESHOLD_LEVEL4
- XSPI_FIFO_THRESHOLD_LEVEL5
- XSPI_FIFO_THRESHOLD_LEVEL6
- XSPI_FIFO_THRESHOLD_LEVEL7
- XSPI_FIFO_THRESHOLD_LEVEL8
- XSPI_FIFO_THRESHOLD_LEVEL9
- XSPI_FIFO_THRESHOLD_LEVEL10
- XSPI_FIFO_THRESHOLD_LEVEL11
- XSPI_FIFO_THRESHOLD_LEVEL12
- XSPI_FIFO_THRESHOLD_LEVEL13
- XSPI_FIFO_THRESHOLD_LEVEL14
- XSPI_FIFO_THRESHOLD_LEVEL15
return none
uint16_t XSPI_GetDMARxFIFOThreshold(XSPI_Module* xSPIx)Get DMA Rx FIFO Threshold
Source comment
name XSPI_GetDMARxFIFOThreshold.
fun Get DMA Rx FIFO Threshold
param fifo_level:
return DMA Rx FIFO Threshold
uint32_t XSPI_GetDMACompletedDataFrameNum(XSPI_Module* xSPIx)Get Completed Data frames.
Source comment
name XSPI_GetDMACompletedDataFrameNum.
fun Get Completed Data frames.
note indicates total data frames transferred in the previous internal DMA transfer
param Flag:
return The new state of XSPI_FLAG (SET or RESET).
uint32_t XSPI_GetIdentification(XSPI_Module* xSPIx)Get Identification code
Source comment
name XSPI_GetIdentification.
fun Get Identification code
param fifo_level:
return Identification code
uint32_t XSPI_GetComponentVersion(XSPI_Module* xSPIx)Get component version
Source comment
name XSPI_GetComponentVersion.
fun Get component version
param fifo_level:
return component version
void XSPI_SetXIPModeBit(XSPI_Module* xSPIx, uint16_t mode_bit)Set XIP mode bits to be sent after address phase of XIP transfer
Source comment
name XSPI_SetXIPModeBit.
fun Set XIP mode bits to be sent after address phase of XIP transfer
param mode_bit: 0x0000 ~ 0xFFFF
return none
void XSPI_SetXIPReadIncrOpcode(XSPI_Module* xSPIx, uint16_t opcode)Set instruction op-code to be sent when an INCR type transfer is requested on AHB bus.
Source comment
name XSPI_SetXIPReadIncrOpcode.
fun Set instruction op-code to be sent when an INCR type transfer is requested on AHB bus.
param opcode: 0x0000 ~ 0xFFFF
note The effective length of the op-code is configured by XIP_CTRL.INSTL[1:0]
return none
void XSPI_SetXIPReadWrapOpcode(XSPI_Module* xSPIx, uint16_t opcode)Set instruction op-code to be sent when an WRAP type transfer is requested on AHB bus.
Source comment
name XSPI_SetXIPReadWrapOpcode.
fun Set instruction op-code to be sent when an WRAP type transfer is requested on AHB bus.
param opcode: 0x0000 ~ 0xFFFF
note The effective length of the op-code is configured by XIP_CTRL.INSTL[1:0]
return none
void XSPI_SetXIPWriteIncrOpcode(XSPI_Module* xSPIx, uint16_t opcode)Set the instruction op-code to be sent when an INCR type XIP Write transfer is requested on AHB bus.
Source comment
name XSPI_SetXIPReadIncrOpcode.
fun Set the instruction op-code to be sent when an INCR type XIP Write transfer is requested on AHB bus.
param opcode: 0x0000 ~ 0xFFFF
note The effective length of the op-code is configured by XIP_CTRL.INSTL[1:0]
return none
Use note: The name field in the source comment is written as XSPI_SetXIPReadIncrOpcode. and differs from the function name XSPI_SetXIPWriteIncrOpcode; call it by the function name.
void XSPI_SetXIPWriteWrapOpcode(XSPI_Module* xSPIx, uint16_t opcode)Set the instruction op-code to be sent when an WRAP type XIP Write transfer is requested on AHB bus.
Source comment
name XSPI_SetXIPWriteWrapOpcode.
fun Set the instruction op-code to be sent when an WRAP type XIP Write transfer is requested on AHB bus.
param opcode: 0x0000 ~ 0xFFFF
note The effective length of the op-code is configured by XIP_CTRL.INSTL[1:0]
return none
FlagStatus XSPI_GetFlagStatus(XSPI_Module* xSPIx, uint32_t Flag)Checks whether the specified XSPI flag is set or not.
Source comment
name XSPI_GetFlagStatus.
fun Checks whether the specified XSPI flag is set or not.
param Flag:
- XSPI_BUSY_FLAG
- XSPI_TXFNF_FLAG
- XSPI_TXFE_FLAG
- XSPI_RXFNF_FLAG
- XSPI_RXFF_FLAG
- XSPI_TXE_FLAG
- XSPI_DCERR_FLAG
return The new state of XSPI_FLAG (SET or RESET).
void XSPI_DisbaleAllInt(XSPI_Module* xSPIx)Disables the all XSPI interrupts.
Source comment
name XSPI_DisbaleAllInt.
fun Disables the all XSPI interrupts.
param XSPI_IT:
return none.
void XSPI_EnableInt(XSPI_Module* xSPIx, uint32_t XSPI_IT, FunctionalState Cmd)Enables or disables the specified XSPI interrupts.
Source comment
name XSPI_ConfigInt.
fun Enables or disables the specified XSPI interrupts.
param XSPI_IT:
- XSPI_INT_TXFEMPTY
- XSPI_INT_TXFOVER
- XSPI_INT_RXFUNDER
- XSPI_INT_RXFOVER
- XSPI_INT_RXFFULL
- XSPI_INT_MMCONTENTION
- XSPI_INT_XIP_RXFOVER
- XSPI_INT_TXFUNDER
param Cmd:
- ENABLE
- DISABLE
return none.
Use note: The name field in the source comment is written as XSPI_ConfigInt. and differs from the function name XSPI_EnableInt; call it by the function name.
INTStatus XSPI_GetINTStatus(XSPI_Module* xSPIx, uint32_t XSPI_IT)Checks whether the specified XSPI interrupt has occurred or not.
Source comment
name XSPI_GetINTStatus.
fun Checks whether the specified XSPI interrupt has occurred or not.
param XSPI_IT:
- XSPI_INT_TXFEMPTY
- XSPI_INT_TXFOVER
- XSPI_INT_RXFUNDER
- XSPI_INT_RXFOVER
- XSPI_INT_RXFFULL
- XSPI_INT_MMCONTENTION
- XSPI_INT_XIP_RXFOVER
- XSPI_INT_TXFUNDER
return The new state of XSPI_IT (SET or RESET).
INTStatus XSPI_GetINTRawStatus(XSPI_Module* xSPIx, uint32_t XSPI_IT)Get XSPI Raw Interrupt Status.
Source comment
name XSPI_GetINTRawStatus.
fun Get XSPI Raw Interrupt Status.
param XSPI_IT:
- XSPI_INT_TXFEMPTY
- XSPI_INT_TXFOVER
- XSPI_INT_RXFUNDER
- XSPI_INT_RXFOVER
- XSPI_INT_RXFFULL
- XSPI_INT_MMCONTENTION
- XSPI_INT_XIP_RXFOVER
- XSPI_INT_TXFUNDER
return The new state of XSPI_IT (SET or RESET).
void XSPI_ClrITPendingBit(XSPI_Module* xSPIx, uint32_t XSPI_IT)Clears the XSPI interrupt pending bit.
Source comment
name XSPI_ClrITPendingBit.
fun Clears the XSPI interrupt pending bit.
param XSPI_IT:
- XSPI_INT_TXFOVER
- XSPI_INT_RXFUNDER
- XSPI_INT_RXFOVER
- XSPI_INT_MMCONTENTION
- XSPI_INT_XIP_RXFOVER
- XSPI_INT_TXFUNDER
return none.
void XSPI_ClrITAllPendingBit(XSPI_Module* xSPIx)Clears the XSPI interrupt all pending bit.
Source comment
name XSPI_ClrITAllPendingBit.
fun Clears the XSPI interrupt all pending bit.
param XSPI_IT:
return none.
5.34.3 Demo descriptions
This section describes the 2 XSPI_V2 examples: XSPI_Enhanced_Mode reads and writes external Flash in enhanced mode through polling, interrupt and DMA paths, and XSPI_XIP_Mode reads and writes external Flash in memory-mapped mode.
5.34.3.1 XSPI_Enhanced_Mode enhanced-mode read and write of external Flash
Example directory: projects/n32h49x_EVAL/examples/XSPI_V2/XSPI_Enhanced_Mode/
Initialize the log, clocks and GPIO→Set QE to enable quad and erase a sector→Write and read back with polling and compare→Read back with interrupt and compare→Write and read with DMA and compare
| Item | Source analysis |
|---|---|
| Function | Performs erase, write and read of external Flash in enhanced SPI mode; reads back through the polling, interrupt and DMA paths and compares the read and write consistency of each. |
| Source files | src/main.c: main, Delay;src/xspi_flash.c: RCC_Configuration, Hardware_Configuration, DMA_Configuration, XSPI_Standard_Mode_Config, XSPI_Enhanced_Mode_Config, Flash_Read_Buffer_DMA and others;src/n32h49x_it.c: XSPI_IRQHandler;inc/main.h, inc/xspi_flash.h: macros and declarations;readme.txt, MDK-ARM/, EWARM/: notes and project files. |
| Key configuration | Standard mode: XSPI_InitBase with XSPI_FRAME_SIZE_8_BIT and the transfer mode;Enhanced mode: XSPI_InitEnhanced with XSPI_QUAD_LINE_MODE, XSPI_FRAME_SIZE_32_BIT and XSPI_RX_ONLY_MODE;Interrupt: XSPI_EnableInt(XSPI, XSPI_INT_RXFFULL, ENABLE) with XSPI_SetRXFIFOFullThreshold;DMA: XSPI_EnableDma with DMA_Configuration (DMA1_CH1/DMA1_CH2). |
| Program and data path | main configures the clocks and pins and then sets QE to enable quad;it erases a sector, writes data and reads back with polling to compare; it reads back with the receive FIFO full interrupt and takes data in the interrupt service routine; it writes and reads with DMA and compares the buffers. |
| Main APIs | XSPI_InitBase, XSPI_InitEnhanced, XSPI_EnableInt, XSPI_EnableDma, XSPI_SendData, XSPI_ReceiveData |
| Verification | The UART prints Write data and Read data succeed, Interrupt-Read data succeed and DMA Write data and DMA Read data succeed when the three paths hold consistent data;any failed comparison prints the corresponding error message. |
| Use note | Standard mode and enhanced mode each require XSPI_Standard_Mode_Config and XSPI_Enhanced_Mode_Config to be called again for configuration;interrupt read relies on XSPI_IRQHandler and XSPI_INT_RXFFULL, and DMA read waits for DMA_FLAG_TC2;the example assumes a P25Q40 external Flash and the full-featured board. |
Core-code walkthrough and porting
The example reads and writes external Flash through three paths, polling, interrupt and DMA, on the same data and compares the results one by one.
Data path: XSPI_Standard_Mode_Config enters standard mode → Flash_Quad_Mode_Enable sets QE → Flash_Sector_Erase erases a sector → Flash_Write_Buffer writes and Flash_Read_Buffer reads back with polling → Flash_Read_Buffer_Int reads with the interrupt service routine → Flash_Write_Buffer_DMA and Flash_Read_Buffer_DMA move data with DMA
1. Standard mode initialization. XSPI_Standard_Mode_Config fills the basic initialization structure and calls XSPI_InitBase for single-line access in the register stage.
src/xspi_flash.csrc/xspi_flash.c · XSPI_Standard_Mode_Config
void XSPI_Standard_Mode_Config(uint32_t DataFrameSize, uint32_t TransferMode, uint32_t Baudr)
{
XSPI_InitType StandInitStruct;
XSPI_Enable(XSPI, DISABLE);
XSPI_StructBaseInit(&StandInitStruct);
StandInitStruct.Role = XSPI_MASTER_ROLE;
StandInitStruct.DataFrameSize = DataFrameSize;
StandInitStruct.SCPH = XSPI_SCPH_FIRST_EDGE;
StandInitStruct.SCPOL = XSPI_SCPOL_LOW_LEVEL;
StandInitStruct.TransferMode = TransferMode;
StandInitStruct.Baudr = Baudr;
StandInitStruct.NssToggle = XSPI_NSS_TOGGLE_DISABLE;
StandInitStruct.RxdSamplingEdge = XSPI_RXD_HCLK_RISING_SAMPLING;
StandInitStruct.RxdSampleDelay = Baudr / 2;
XSPI_InitBase(XSPI, &StandInitStruct);
XSPI_Slave_Select(XSPI, XSPI_SELECT_SLAVE_1);
}
2. Enhanced mode initialization. On top of the basic configuration, XSPI_Enhanced_Mode_Config also sets the frame format, transfer type and wait cycles for quad data access.
src/xspi_flash.csrc/xspi_flash.c · XSPI_Enhanced_Mode_Config
void XSPI_Enhanced_Mode_Config(uint32_t DataFrameSize, uint32_t TransferMode, uint32_t FrameFormat, uint32_t TransferType, uint32_t Baudr, uint32_t WaitCycles)
{
XSPI_EnhancedInitType EnhancedInitStruct;
XSPI_Enable(XSPI, DISABLE);
XSPI_InitEnhancedStruct(&EnhancedInitStruct);
EnhancedInitStruct.SCPH = XSPI_SCPH_FIRST_EDGE;
EnhancedInitStruct.SCPOL = XSPI_SCPOL_LOW_LEVEL;
EnhancedInitStruct.FrameFormat = FrameFormat;
EnhancedInitStruct.DataFrameSize = DataFrameSize;
EnhancedInitStruct.TransferMode = TransferMode;
EnhancedInitStruct.Baudr = Baudr;
EnhancedInitStruct.RxdSamplingEdge = XSPI_RXD_HCLK_RISING_SAMPLING;
EnhancedInitStruct.RxdSampleDelay = 3U;
EnhancedInitStruct.TransferType = TransferType;
EnhancedInitStruct.AddrLen = XSPI_ADDR_LEN_24BIT;
EnhancedInitStruct.InstructLen = XSPI_INST_LEN_8BIT;
EnhancedInitStruct.WaitCycles = WaitCycles;
EnhancedInitStruct.ClockStrech = XSPI_CLOCK_STRETCH_ENABLE;
EnhancedInitStruct.DDREable = XSPI_DDR_DISABLE;
XSPI_InitEnhanced(XSPI, &EnhancedInitStruct);
XSPI_Slave_Select(XSPI, XSPI_SELECT_SLAVE_1);
}
3. Interrupt read and the interrupt service routine. Flash_Read_Buffer_Int enables the receive FIFO full interrupt and configures the receive mode, and each received data item is taken by the interrupt service routine.
src/xspi_flash.csrc/xspi_flash.c · Flash_Read_Buffer_Int
void Flash_Read_Buffer_Int(uint32_t* pBuffer, uint32_t ReadAddr, uint32_t NumWordToRead)
{
XSPI_DisbaleAllInt(XSPI);
NVIC_Initialize();
XSPI_EnableInt(XSPI, XSPI_INT_RXFFULL, ENABLE);
#ifdef P25Q40
/* Quad SPI Format Mode */
#if (READ_SPI_FORMAT_MODE == READ_QUAD_SPI_FORMAT)
#ifdef ADDR_MUTTI_WIRE_TX
/* Instruction will be sent in Standard SPI Mode and Address will be sent in the Quad-wire mode */
XSPI_Enhanced_Mode_Config(XSPI_FRAME_SIZE_32_BIT, XSPI_RX_ONLY_MODE, XSPI_QUAD_LINE_MODE, XSPI_INST_SINGLE_LINE_ADDR_MULTI_LINE, TEST_WR_CLKDIV, FAST_READ_QUAD_IO_WAIT_CYCLES);
#else
/* Instruction and Address will be sent in Standard SPI Mode */
XSPI_Enhanced_Mode_Config(XSPI_FRAME_SIZE_32_BIT, XSPI_RX_ONLY_MODE, XSPI_QUAD_LINE_MODE, XSPI_INST_ADDR_SINGLE_LINE, TEST_WR_CLKDIV, FAST_READ_QUAD_OUTPUT_WAIT_CYCLES);
#endif
The interrupt service routine reads the data into the buffer and increments the count on the receive FIFO full interrupt.
src/n32h49x_it.csrc/n32h49x_it.c · XSPI_IRQHandler
void XSPI_IRQHandler(void)
{
if (XSPI_GetINTStatus(XSPI, XSPI_INT_RXFFULL) == SET)
{
XSPI_Rbuffer[rSize] = XSPI_ReceiveData(XSPI);
rSize++;
}
}
4. DMA page write. After disabling XSPI, Flash_Write_Page_DMA sets the DMA transmit thresholds and enables the transmit request, then starts the DMA transfer and waits for it to finish.
src/xspi_flash.csrc/xspi_flash.c · Flash_Write_Page_DMA
void Flash_Write_Page_DMA(uint32_t* pBuffer, uint32_t WriteAddr, uint32_t NumWordToWrite)
{
if(NumWordToWrite != 0)
{
Flash_Write_Enable();
XSPI_Enhanced_Mode_Config(XSPI_FRAME_SIZE_32_BIT, XSPI_TX_ONLY_MODE, XSPI_QUAD_LINE_MODE, XSPI_INST_ADDR_SINGLE_LINE, TEST_WR_CLKDIV, QUAD_INPUT_PAGE_PROGRAM_WAIT_CYCLES);
XSPI_SetNumberOfDataFrame(XSPI, NumWordToWrite);
XSPI_SetTXStartFIFOThreshold(XSPI, XSPI_FIFO_THRESHOLD_LEVEL4);
XSPI_SetDMATxFIFOThreshold(XSPI, XSPI_FIFO_THRESHOLD_LEVEL5);
XSPI_EnableDma(XSPI, XSPI_DMA_TX, ENABLE);
XSPI_Enable(XSPI, ENABLE);
XSPI_Waie_Tx_Compelete();
DMA_Configuration((uint32_t)&XSPI->DAT0, (uint32_t)pBuffer, NumWordToWrite, DMA_TX, DISABLE);
#ifdef P25Q40
XSPI_SendData(XSPI, SPIFLASH_QuadPage_Pro);
XSPI_SendData(XSPI, WriteAddr);
#else
/* Other Flash Operation */
#endif
DMA_RequestRemap(DMA_REMAP_XSPI_TX, DMA1_CH1, ENABLE);
DMA_EnableChannel(DMA1_CH1, ENABLE);
while (XSPI_GetFlagStatus(XSPI, XSPI_TXFE_FLAG) == RESET)
{
}
/*wait TX end */
while(DMA_GetFlagStatus(DMA_FLAG_TC1,DMA1) == RESET) /*wait DMA transfer complete*/
{
}
DMA_ClearFlag(DMA_FLAG_TC1, DMA1);
XSPI_Enable(XSPI, DISABLE);
DMA_Configuration((uint32_t)&XSPI->DAT0, (uint32_t)pBuffer, NumWordToWrite, DMA_TX, DISABLE);
XSPI_Enable(XSPI, ENABLE);
Flash_Check_Busy();
}
}
Corresponding source files: src/xspi_flash.c, src/n32h49x_it.c
5.34.3.2 XSPI_XIP_Mode memory-mapped read and write of external Flash
Example directory: projects/n32h49x_EVAL/examples/XSPI_V2/XSPI_XIP_Mode/
Initialize the log, clocks and GPIO→Set QE to enable quad and erase a sector→Configure XIP read and read from the mapped address→Configure XIP write and write word by word→Read back, compare and print the result
| Item | Source analysis |
|---|---|
| Function | Accesses external Flash in XIP (memory-mapped) mode; read operations fetch data directly from the mapping base address while write operations issue the XIP write opcode word by word. |
| Source files | src/main.c: main, Delay;src/xspi_flash.c: RCC_Configuration, Hardware_Configuration, XSPI_Standard_Mode_Config, XSPI_XIP_Mode_Config, Flash_XIP_Read_Buffer, Flash_XIP_Write_Buffer and others;inc/main.h, inc/xspi_flash.h: macros and declarations;readme.txt, MDK-ARM/, EWARM/: notes and project files. |
| Key configuration | Mapping base: XIP_REMAP_BASE_ADDR is 0x90000000;XIP read: the read-mode configuration plus XSPI_SetXIPReadIncrOpcode;XIP write: the write-mode configuration plus XSPI_SetXIPWriteIncrOpcode with XSPI_SetNumberOfDataFrame set to 1. |
| Program and data path | main configures the clocks and pins, sets QE and erases a sector;Flash_XIP_Read_Buffer configures XIP read and reads the mapped address to verify the erase result;Flash_XIP_Write_Buffer configures XIP write word by word, writes the mapped address and reads back;main compares the readback with the written data and prints the conclusion. |
| Main APIs | XSPI_InitXIP, XSPI_SetXIPModeBit, XSPI_SetXIPReadIncrOpcode, XSPI_SetXIPWriteIncrOpcode, XSPI_SetNumberOfDataFrame |
| Verification | The UART prints XIP-Write data and XIP-Read data succeed when the written and read-back data match;a readback containing data other than 0xFFFFFFFF after erase prints an XIP read error. |
| Use note | XIP read fetches data directly through XIP_REMAP_BASE_ADDR plus an offset without word-by-word movement;XIP write must be configured word by word with the data frame count set to 1; the example assumes a P25Q40 external Flash and the full-featured board. |
Core-code walkthrough and porting
The example maps the external Flash to a fixed base address in XIP mode, so reads fetch data by address and writes are completed word by word through the XIP write opcode.
Data path: XSPI_Standard_Mode_Config enters standard mode → Flash_Quad_Mode_Enable sets QE and Flash_Sector_Erase erases → XSPI_XIP_Mode_Config configures XIP read and XSPI_SetXIPReadIncrOpcode sets the read opcode → Flash_XIP_Read_Buffer reads back from the mapped address → Flash_XIP_Write_Buffer configures XIP write and writes the mapped address word by word → compare the readback
1. XIP mode configuration. XSPI_XIP_Mode_Config fills the XIP initialization structure and sets the receive-only or transmit-only mode and related parameters for read or write respectively.
src/xspi_flash.csrc/xspi_flash.c · XSPI_XIP_Mode_Config
void XSPI_XIP_Mode_Config(uint32_t TransferMode, uint32_t FrameFormat, uint32_t TransferType, uint32_t Baudr, uint32_t WaitCycles, uint32_t XipModeBit)
{
XSPI_XIPInitType XIPInitStruct;
XSPI_Enable(XSPI, DISABLE);
XSPI_InitXIPStruct(&XIPInitStruct);
XIPInitStruct.SCPH = XSPI_SCPH_FIRST_EDGE;
XIPInitStruct.SCPOL = XSPI_SCPOL_LOW_LEVEL;
XIPInitStruct.DataFrameSize = XSPI_FRAME_SIZE_32_BIT;
XIPInitStruct.Baudr = Baudr;
XIPInitStruct.XipFrameFormat = FrameFormat;
XIPInitStruct.XipTransferType = TransferType;
XIPInitStruct.XipAddrLen = XSPI_ADDR_LEN_24BIT;
XIPInitStruct.XipWaitCycles = WaitCycles;
XIPInitStruct.XipDDREable = XSPI_DDR_DISABLE;
if (TransferMode == XSPI_RX_ONLY_MODE)
{
XIPInitStruct.TransferMode = XSPI_RX_ONLY_MODE;
XIPInitStruct.XIP_Info.Read_XIPInitType.XipInstructLen = XSPI_INST_LEN_8BIT;
XIPInitStruct.XIP_Info.Read_XIPInitType.XipInstrctEnable = XSPI_XIP_INSTRUCT_ENABLE;
XIPInitStruct.XIP_Info.Read_XIPInitType.XipDFSHC = XSPI_XIP_DFSHC_ENABLE;
XIPInitStruct.XIP_Info.Read_XIPInitType.XipPrefetch = XSPI_XIP_PREFETCH_ENABLE;
XIPInitStruct.XIP_Info.Read_XIPInitType.XipModeBit = XipModeBit;
XIPInitStruct.XIP_Info.Read_XIPInitType.XipModeBitLen = XSPI_XIP_MODE_BIT_LEN_8_BIT;
XIPInitStruct.XIP_Info.Read_XIPInitType.ContinueTransfer.XipContinueTransfer = XSPI_XIP_CONTINUE_TRANSFER_ENABLE;
XIPInitStruct.XIP_Info.Read_XIPInitType.ContinueTransfer.XipWatchDogTimeout = 100U;
XIPInitStruct.XIP_Info.Read_XIPInitType.Info.Rxds_InitType.RxdSamplingEdge = XSPI_RXD_HCLK_RISING_SAMPLING;
XIPInitStruct.XIP_Info.Read_XIPInitType.Info.Rxds_InitType.RxdSampleDelay = 3U;
}
else
{
XIPInitStruct.TransferMode = XSPI_TX_ONLY_MODE;
XIPInitStruct.XIP_Info.Write_XIPInitType.XipInstructLen = XSPI_INST_LEN_8BIT;
}
XSPI_InitXIP(XSPI, &XIPInitStruct);
XSPI_XIP_Slave_Select(XSPI, XSPI_SELECT_SLAVE_1);
}
2. XIP readback. After enabling XSPI, Flash_XIP_Read_Buffer reads the mapped address word by word through XIP_REMAP_BASE_ADDR plus an offset.
src/xspi_flash.csrc/xspi_flash.c · Flash_XIP_Read_Buffer
XSPI_SetRXFIFOFullThreshold(XSPI, XSPI_FIFO_THRESHOLD_LEVEL13);
XSPI_Enable(XSPI, ENABLE);
while (number < NumWordToRead)
{
pBuffer[number] = *((uint32_t *)(XIP_REMAP_BASE_ADDR + ReadAddr + number * 4));
number++;
}
3. XIP write. Flash_XIP_Write_Buffer reconfigures XIP write mode for each data item with the data frame count set to 1 and then writes the mapped address.
src/xspi_flash.csrc/xspi_flash.c · Flash_XIP_Write_Buffer
void Flash_XIP_Write_Buffer(uint32_t* pBuffer, uint32_t WriteAddr, uint32_t NumWordToWrite)
{
uint32_t number = 0;
while (number < NumWordToWrite)
{
Flash_Write_Enable();
XSPI_XIP_Mode_Config(XSPI_TX_ONLY_MODE, XSPI_QUAD_LINE_MODE, XSPI_INST_ADDR_SINGLE_LINE, TEST_WR_CLKDIV, QUAD_INPUT_PAGE_PROGRAM_WAIT_CYCLES, 0);
XSPI_SetXIPWriteIncrOpcode(XSPI, SPIFLASH_QuadPage_Pro);
XSPI_SetNumberOfDataFrame(XSPI, 1);
XSPI_Enable(XSPI, ENABLE);
XSPI_Waie_Tx_Compelete();
*((uint32_t *)(XIP_REMAP_BASE_ADDR + WriteAddr + number * 4)) = pBuffer[number];
number++;
Flash_Check_Busy();
}
}
Corresponding source files: src/xspi_flash.c
5.34.4 Notes and troubleshooting
| Scenario | Check & action | Source |
|---|---|---|
| Command phases | A command has the Instruction, Address, Mode bits, Wait cycles and Data phases, and any phase can be skipped as long as at least one of them is kept. | User manual |
| Mode bits | The Mode bits phase is used only in XIP mode; once enabled, mode bits are inserted after the address phase with a width of 2, 4, 8 or 16. |
User manual |
| DDR baud rate | In DDR mode the baud rate value should be a multiple of 4. | User manual |
| XIP frame format | XIP operation supports only Dual, Quad and Octal mode, and XSPI_CTRL0.SPIFRF must not be configured as 0. |
User manual |
| Tx and Rx mode | Tx and Rx mode can be used only in standard SPI mode (XSPI_CTRL0.SPIFRF equal to 00). |
User manual |
| EEPROM read mode | EEPROM read mode can be used only in standard SPI mode (XSPI_CTRL0.SPIFRF equal to 00), and the number of bytes to read is specified in XSPI_CTRL1.NDF. |
User manual |
| Instruction and address | One instruction occupies one FIFO location while the address may occupy several FIFO locations, and both the instruction and the address must be written to XSPI_DATx registers. |
User manual |
| XIP receive FIFO overflow | During XIP transfer an RX FIFO that is too shallow may overflow and corrupt data, so after detecting the RX FIFO overflow the software must retry the data transfer. | User manual |