5.22 RCC Guide

name    RCC_DeInit.
fun     Reset the RCC registers.
param   none
return  none

name    RCC_ConfigHse.
fun     Configures the External High Speed oscillator (HSE).
param   RCC_HSE :
          - RCC_HSE_DISABLE    HSE oscillator OFF
          - RCC_HSE_ENABLE     HSE oscillator ON
          - RCC_HSE_BYPASS     HSE oscillator bypassed with external clock
return  none:
note    HSE can not be stopped if it is used directly or through the PLL as system clock

name    RCC_EnableHSEClockSecuritySystem.
fun     Enables the HSE Clock Security System.
param   Cmd:
          - ENABLE
          - DISABLE
return  none.

name    RCC_EnableHSECSSChktype.
fun     Enable different HSE CSS detection type .
param   Chk_type :
         - RCC_CSSEN_HSEPOEN     HSE phase shift out of range enable
         - RCC_CSSEN_HSEFHEN     HSE frequency out of high limit enable
         - RCC_CSSEN_HSEFLEN     HSE frequency out of low limit enable
param   Cmd:
          - ENABLE
          - DISABLE
return none.

name    RCC_SetHSECSSPhaseOffsetLimit.
fun     Adjusts HSE Phase Offset Limit value.
param   limit_value(the Limit value):
        This parameter must be a number between 0x0 and 0xF
return  none
note    Error when phase offset Δt is greater than (tHSI*limit_value/32)us

name    RCC_SetHSECSSFrequencyHighLimit.
fun     Adjusts HSE Frequency High Limit value.
param   limit_value(the Limit value):
        This parameter must be a number between 0x0 and 0xF
return  none
note    Error when the frequency is greater than (2*32/limit_value)MHz

name    RCC_SetHSECSSFrequencyLowLimit.
fun     Adjusts HSE Frequency Low Limit value.
param   limit_value(the Limit value):
        This parameter must be a number between 0x0 and 0xF
return  none
note    Error when the frequency is less than (32/limit_value)MHz

name    RCC_SetHsiCalibValue.
fun     Adjusts the Internal High Speed oscillator (HSI) calibration value.
param   calibration_value(the calibration trimming value):
        This parameter must be a number between 0 and 0x7F
return  none

name    RCC_EnableHsi.
fun     Enables the Internal High Speed oscillator (HSI).
param   Cmd:
          - ENABLE
          - DISABLE
return  none
note   HSI can not be stopped if it is used directly or through the PLL as system clock.

name    RCC_EnableHSIClockSecuritySystem.
fun     Enables the HSI Clock Security System.
param   Cmd:
          - ENABLE
          - DISABLE
return  none.

name    RCC_ConfigPll.
fun     Configures the PLL clock source and multiplication factor.
param   PLL_source(PLL entry clock source):
          - RCC_PLL_SRC_HSI         HSI oscillator clock selected as PLL clock entry
          - RCC_PLL_SRC_HSI_DIV2    HSI oscillator divider 2 clock selected as PLL clock entry
          - RCC_PLL_SRC_HSE         HSE oscillator clock selected as PLL clock entry
          - RCC_PLL_SRC_HSE_DIV2    HSE oscillator divider 2 clock selected as PLL clock entry
param   PLL_prescaler(PLL input divider):
          - RCC_PLL_PRE_1
          - RCC_PLL_PRE_2
          - RCC_PLL_PRE_3
          - RCC_PLL_PRE_4
param   PLL_multiplication(PLL multiplication factor):
          - RCC_PLL_MUL_8
          - RCC_PLL_MUL_10
          - RCC_PLL_MUL_12
          - RCC_PLL_MUL_14
          - RCC_PLL_MUL_16
          - RCC_PLL_MUL_18
          - RCC_PLL_MUL_20
          - RCC_PLL_MUL_22
          - RCC_PLL_MUL_24
          - RCC_PLL_MUL_26
          - RCC_PLL_MUL_28
          - RCC_PLL_MUL_30
          - RCC_PLL_MUL_32
          - RCC_PLL_MUL_34
          - RCC_PLL_MUL_36
          - RCC_PLL_MUL_38
          - RCC_PLL_MUL_40
          - RCC_PLL_MUL_42
          - RCC_PLL_MUL_44
          - RCC_PLL_MUL_46
          - RCC_PLL_MUL_48
          - RCC_PLL_MUL_50
          - RCC_PLL_MUL_52
          - RCC_PLL_MUL_54
          - RCC_PLL_MUL_56
          - RCC_PLL_MUL_58
          - RCC_PLL_MUL_60
          - RCC_PLL_MUL_62
          - RCC_PLL_MUL_64
          - RCC_PLL_MUL_66
          - RCC_PLL_MUL_68
          - RCC_PLL_MUL_70
          - RCC_PLL_MUL_72
          - RCC_PLL_MUL_74
          - RCC_PLL_MUL_76
param   PLL_outdivider(PLL out divider):
          - RCC_PLLOUT_DIV_1
          - RCC_PLLOUT_DIV_2
          - RCC_PLLOUT_DIV_4
          - RCC_PLLOUT_DIV_8
return  none
note    This function must be used only when the PLL is disabled.
note    Fin frequency requirement is in the range of 4MHz ~ 50MHz,
        Fref frequency requirement is in the range of 4MHz ~ 25MHz,
        Fvco frequency requirement is in the range of 64MHz ~ 500MHz.

name    RCC_EnablePll.
fun     Enables the PLL.
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name    RCC_ConfigEXTPll.
fun     Configures the EXTPLL clock source and multiplication factor.
param   EXTPLL_source(EXTPLL entry clock source):
          - RCC_EXTPLL_SRC_HSI         HSI oscillator clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_HSI_DIV2    HSI oscillator divider 2 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_HSE         HSE oscillator clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_HSE_DIV2    HSE oscillator divider 2 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV16   PLL divider 16 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV17   PLL divider 17 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV18   PLL divider 18 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV19   PLL divider 19 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV20   PLL divider 20 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV21   PLL divider 21 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV22   PLL divider 22 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV23   PLL divider 23 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV24   PLL divider 24 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV25   PLL divider 25 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV26   PLL divider 26 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV27   PLL divider 27 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV28   PLL divider 28 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV29   PLL divider 29 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV30   PLL divider 30 clock selected as EXTPLL clock entry
          - RCC_EXTPLL_SRC_PLL_DIV31   PLL divider 31 clock selected as EXTPLL clock entry
param   EXTPLL_prescaler(EXTPLL input divider):
          - RCC_EXTPLL_PRE_1
          - RCC_EXTPLL_PRE_2
          - RCC_EXTPLL_PRE_3
          - RCC_EXTPLL_PRE_4
param   EXTPLL_mul(EXTPLL multiplication factor):
          - RCC_EXTPLL_MUL_8
          - RCC_EXTPLL_MUL_10
          - RCC_EXTPLL_MUL_12
          - RCC_EXTPLL_MUL_14
          - RCC_EXTPLL_MUL_16
          - RCC_EXTPLL_MUL_18
          - RCC_EXTPLL_MUL_20
          - RCC_EXTPLL_MUL_22
          - RCC_EXTPLL_MUL_24
          - RCC_EXTPLL_MUL_26
          - RCC_EXTPLL_MUL_28
          - RCC_EXTPLL_MUL_30
          - RCC_EXTPLL_MUL_32
          - RCC_EXTPLL_MUL_34
          - RCC_EXTPLL_MUL_36
          - RCC_EXTPLL_MUL_38
          - RCC_EXTPLL_MUL_40
          - RCC_EXTPLL_MUL_42
          - RCC_EXTPLL_MUL_44
          - RCC_EXTPLL_MUL_46
          - RCC_EXTPLL_MUL_48
          - RCC_EXTPLL_MUL_50
          - RCC_EXTPLL_MUL_52
          - RCC_EXTPLL_MUL_54
          - RCC_EXTPLL_MUL_56
          - RCC_EXTPLL_MUL_58
          - RCC_EXTPLL_MUL_60
          - RCC_EXTPLL_MUL_62
          - RCC_EXTPLL_MUL_64
          - RCC_EXTPLL_MUL_66
          - RCC_EXTPLL_MUL_68
          - RCC_EXTPLL_MUL_70
          - RCC_EXTPLL_MUL_72
          - RCC_EXTPLL_MUL_74
          - RCC_EXTPLL_MUL_76
param   EXTPLL_outdivider(EXTPLL out divider):
          - RCC_EXTPLLOUT_DIV_1
          - RCC_EXTPLLOUT_DIV_2
          - RCC_EXTPLLOUT_DIV_4
          - RCC_EXTPLLOUT_DIV_8
return  none
note    This function must be used only when the EXTPLL is disabled.
note    Fin frequency requirement is in the range of 4MHz ~ 50MHz,
        Fref frequency requirement is in the range of 4MHz ~ 25MHz,
        Fvco frequency requirement is in the range of 64MHz ~ 500MHz.

name    RCC_EnableEXTPll.
fun     Enables the EXTPLL.
param   Cmd:
          - ENABLE
          - DISABLE
return  none
note  The RCC_CTRL.PLLEN bit must be enabled when using EXTPLL.

name    RCC_GetSysclkSrc.
fun     Returns the clock source used as system clock.
param   none
return  (The clock source used as system clock):
         - RCC_CFG_SCLKSTS_HSI    HSI used as system clock
         - RCC_CFG_SCLKSTS_HSE    HSE used as system clock
         - RCC_CFG_SCLKSTS_PLL    PLL used as system clock
         - RCC_CFG_SRC_EXTPLL     SHRPLL selected as system clock
         - RCC_CFG_SRC_USBHS240M  USBHS240M selected as system clock

name    RCC_ConfigSysclk.
fun     Configures the system clock (SYSCLK).
param   sysclk_source(clock source used as system clock):
         - RCC_SYSCLK_SRC_HSI           HSI selected as system clock
         - RCC_SYSCLK_SRC_HSE           HSE selected as system clock
         - RCC_SYSCLK_SRC_PLL           PLL selected as system clock
         - RCC_SYSCLK_SRC_EXTPLL        SHRPLL selected as system clock
         - RCC_SYSCLK_SRC_USBHS240M     USBHS240M selected as system clock
return  none

name    RCC_ConfigHclk.
fun     Configures the AHB clock (HCLK).
param   sysclk_div(AHB clock is derived from the system clock (SYSCLK)):
         - RCC_SYSCLK_DIV1      AHB clock = SYSCLK
         - RCC_SYSCLK_DIV2      AHB clock = SYSCLK/2
         - RCC_SYSCLK_DIV4      AHB clock = SYSCLK/4
         - RCC_SYSCLK_DIV8      AHB clock = SYSCLK/8
         - RCC_SYSCLK_DIV16     AHB clock = SYSCLK/16
         - RCC_SYSCLK_DIV64     AHB clock = SYSCLK/64
         - RCC_SYSCLK_DIV128    AHB clock = SYSCLK/128
         - RCC_SYSCLK_DIV256    AHB clock = SYSCLK/256
         - RCC_SYSCLK_DIV512    AHB clock = SYSCLK/512
return  none

name    RCC_ConfigPclk1.
fun     Configures the Low Speed APB clock (PCLK1).
param   hclk_div(APB1 clock is derived from the AHB clock (HCLK)):
         - RCC_HCLK_DIV1     APB1 clock = HCLK
         - RCC_HCLK_DIV2     APB1 clock = HCLK/2
         - RCC_HCLK_DIV4     APB1 clock = HCLK/4
         - RCC_HCLK_DIV8     APB1 clock = HCLK/8
         - RCC_HCLK_DIV16    APB1 clock = HCLK/16
return  none

name    RCC_ConfigPclk2.
fun     Configures the High Speed APB clock (PCLK2).
param   hclk_div(APB2 clock is derived from the AHB clock (HCLK)):
         - RCC_HCLK_DIV1     APB2 clock = HCLK
         - RCC_HCLK_DIV2     APB2 clock = HCLK/2
         - RCC_HCLK_DIV4     APB2 clock = HCLK/4
         - RCC_HCLK_DIV8     APB2 clock = HCLK/8
         - RCC_HCLK_DIV16    APB2 clock = HCLK/16
return  none

name    RCC_ConfigInt.
fun     Enables the specified RCC interrupts.
param   Interrupt(the RCC interrupt sources to be enabled):
         - RCC_INT_LSIRDIF     LSI ready interrupt
         - RCC_INT_LSERDIF     LSI ready interrupt
         - RCC_INT_HSIRDIF     HSI ready interrupt
         - RCC_INT_HSERDIF     HSE ready interrupt
         - RCC_INT_PLLRDIF     PLL ready interrupt
         - RCC_INT_LSECSSIF    LSE CSS interrupt
         - RCC_INT_HSECSSIF    HSE CSS interrupt
         - RCC_INT_HSICSSIF    HSI CSS interrupt
         - RCC_INT_BORIF       BOR interrupt
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name    RCC_ConfigATimClk.
fun     Configures the ATIM1/2/3 clock source(ATIMCLK).
param   timer_clksrc(ATIM clock source):
         - RCC_ATIM_CLKSRC_HCLK
         - RCC_ATIM_CLKSRC_SYSCLK
return  none

name    RCC_ConfigGTimClk.
fun     Configures the GTIM8/9/10 clock source(GTIMCLK).
param   timer_clksrc(GTIM clock source):
        - RCC_GTIM_CLKSRC_SYSCLKDIV
        - RCC_GTIM_CLKSRC_SYSCLK
return  none

name    RCC_ConfigI2S3Clk_.
fun     Configures the I2S3 clock source(I2S3CLK).
param   I2S_clksrc(I2S3 clock source):
         - RCC_I2S3_CLKSRC_SYSCLK
         - RCC_I2S3_CLKSRC_EXTPLL
         - RCC_I2S3_CLKSRC_CLKIN
         - RCC_I2S3_CLKSRC_HSI
return  none

name    RCC_ConfigI2S2Clk_.
fun     Configures the I2S2 clock source(I2S2CLK).
param   I2S_clksrc(I2S2 clock source):
         - RCC_I2S2_CLKSRC_SYSCLK
         - RCC_I2S2_CLKSRC_EXTPLL
         - RCC_I2S2_CLKSRC_CLKIN
         - RCC_I2S2_CLKSRC_HSI
return  none

name    RCC_ConfigRngcClk.
fun     Configures the RNGCCLK prescaler.
param   RNG_prescaler (specifies the RNGCCLK prescaler):
        - RCC_RNGCCLK_SYSCLK_DIV1     SYSCLK Divided By 1
        - RCC_RNGCCLK_SYSCLK_DIV2     SYSCLK Divided By 2
        - RCC_RNGCCLK_SYSCLK_DIV3     SYSCLK Divided By 3
        - RCC_RNGCCLK_SYSCLK_DIV4     SYSCLK Divided By 4
        - RCC_RNGCCLK_SYSCLK_DIV5     SYSCLK Divided By 5
        - RCC_RNGCCLK_SYSCLK_DIV6     SYSCLK Divided By 6
        - RCC_RNGCCLK_SYSCLK_DIV7     SYSCLK Divided By 7
        - RCC_RNGCCLK_SYSCLK_DIV8     SYSCLK Divided By 8
        - RCC_RNGCCLK_SYSCLK_DIV9     SYSCLK Divided By 9
        - RCC_RNGCCLK_SYSCLK_DIV10    SYSCLK Divided By 10
        - RCC_RNGCCLK_SYSCLK_DIV11    SYSCLK Divided By 11
        - RCC_RNGCCLK_SYSCLK_DIV12    SYSCLK Divided By 12
        - RCC_RNGCCLK_SYSCLK_DIV13    SYSCLK Divided By 13
        - RCC_RNGCCLK_SYSCLK_DIV14    SYSCLK Divided By 14
        - RCC_RNGCCLK_SYSCLK_DIV15    SYSCLK Divided By 15
        - RCC_RNGCCLK_SYSCLK_DIV16    SYSCLK Divided By 16
        - RCC_RNGCCLK_SYSCLK_DIV17    SYSCLK Divided By 17
        - RCC_RNGCCLK_SYSCLK_DIV18    SYSCLK Divided By 18
        - RCC_RNGCCLK_SYSCLK_DIV19    SYSCLK Divided By 19
        - RCC_RNGCCLK_SYSCLK_DIV20    SYSCLK Divided By 20
        - RCC_RNGCCLK_SYSCLK_DIV21    SYSCLK Divided By 21
        - RCC_RNGCCLK_SYSCLK_DIV22    SYSCLK Divided By 22
        - RCC_RNGCCLK_SYSCLK_DIV23    SYSCLK Divided By 23
        - RCC_RNGCCLK_SYSCLK_DIV24    SYSCLK Divided By 24
        - RCC_RNGCCLK_SYSCLK_DIV25    SYSCLK Divided By 25
        - RCC_RNGCCLK_SYSCLK_DIV26    SYSCLK Divided By 26
        - RCC_RNGCCLK_SYSCLK_DIV27    SYSCLK Divided By 27
        - RCC_RNGCCLK_SYSCLK_DIV28    SYSCLK Divided By 28
        - RCC_RNGCCLK_SYSCLK_DIV29    SYSCLK Divided By 29
        - RCC_RNGCCLK_SYSCLK_DIV30    SYSCLK Divided By 30
        - RCC_RNGCCLK_SYSCLK_DIV31    SYSCLK Divided By 31
        - RCC_RNGCCLK_SYSCLK_DIV32    SYSCLK Divided By 32
return  none
note    The RNGCCLK must not exceed interface clock(config by RCC_ConfigPeriphClk()).

name    RCC_ConfigTrng1mClk.
fun     Configures the TRNG 1M clock .
param   TRNG1M_clksrc(TRNG 1M clock source):
         - RCC_TRNG1MCLK_SRC_HSI
         - RCC_TRNG1MCLK_SRC_HSE
param   TRNG1M_prescaler(TRNG 1M clock prescaler):
         - RCC_TRNG1MCLK_DIV2
         - RCC_TRNG1MCLK_DIV4
         - RCC_TRNG1MCLK_DIV6
         - RCC_TRNG1MCLK_DIV8
         - RCC_TRNG1MCLK_DIV10
         - RCC_TRNG1MCLK_DIV12
         - RCC_TRNG1MCLK_DIV14
         - RCC_TRNG1MCLK_DIV16
         - RCC_TRNG1MCLK_DIV18
         - RCC_TRNG1MCLK_DIV20
         - RCC_TRNG1MCLK_DIV22
         - RCC_TRNG1MCLK_DIV24
         - RCC_TRNG1MCLK_DIV26
         - RCC_TRNG1MCLK_DIV28
         - RCC_TRNG1MCLK_DIV30
         - RCC_TRNG1MCLK_DIV32
return  none

name    RCC_EnableTrng1mClk.
fun     Enables or disable the TRNGCLK.
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name    RCC_EnableBORReset.
fun     Enables or disable the BOR reset.
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name    RCC_ConfigFDCANPllClk.
fun     Configures the FDCAN PLL clock prescaler.
param   FDCAN_prescaler (specifies the CANCCLK prescaler):
        - RCC_FDCAN_PLLSRC_DIV2     FDCAN PLL clock source Divided By 2
        - RCC_FDCAN_PLLSRC_DIV3     FDCAN PLL clock source Divided By 3
        - RCC_FDCAN_PLLSRC_DIV4     FDCAN PLL clock source Divided By 4
        - RCC_FDCAN_PLLSRC_DIV5     FDCAN PLL clock source Divided By 5
        - RCC_FDCAN_PLLSRC_DIV6     FDCAN PLL clock source Divided By 6
        - RCC_FDCAN_PLLSRC_DIV7     FDCAN PLL clock source Divided By 7
        - RCC_FDCAN_PLLSRC_DIV8     FDCAN PLL clock source Divided By 8
        - RCC_FDCAN_PLLSRC_DIV9     FDCAN PLL clock source Divided By 9
        - RCC_FDCAN_PLLSRC_DIV10    FDCAN PLL clock source Divided By 10
        - RCC_FDCAN_PLLSRC_DIV11    FDCAN PLL clock source Divided By 11
        - RCC_FDCAN_PLLSRC_DIV12    FDCAN PLL clock source Divided By 12
        - RCC_FDCAN_PLLSRC_DIV13    FDCAN PLL clock source Divided By 13
        - RCC_FDCAN_PLLSRC_DIV14    FDCAN PLL clock source Divided By 14
        - RCC_FDCAN_PLLSRC_DIV15    FDCAN PLL clock source Divided By 15
return  none

name    RCC_ConfigFDCANClksrc.
fun     Configures the FDCAN clock source(CANCLK).
param   FDCAN_clksrc(FDCAN clock source):
         - RCC_FDCAN_CLKSRC_PLL
         - RCC_FDCAN_CLKSRC_EXTPLL
         - RCC_FDCAN_CLKSRC_HSE
return  none
note  The divider needs to be configured first when selecting the PLL or EXTPLL

name    RCC_ConfigTraceClk.
fun     Configures the Trace clock prescaler.
param   TRACE_prescaler (specifies the prescaler):
        - RCC_TRACECLK_DIV1     HCLK Divided By 1
        - RCC_TRACECLK_DIV2     HCLK Divided By 2
        - RCC_TRACECLK_DIV4     HCLK Divided By 4
        - RCC_TRACECLK_DIV8     HCLK Divided By 8
return  none

name    RCC_ConfigUSBPLLPresClk.
fun     Configures the USB PLL clock (USBPLLCLK).
param   USBPLL_clksrc(USBPLL clock source):
         - RCC_USBPLLCLK_SRC_PLL
         - RCC_USBPLLCLK_SRC_EXTPLL
param   USBPLL_prescaler(USBPLL clock prescaler):
         - RCC_USBPLLCLK_DIV1
         - RCC_USBPLLCLK_DIV2
         - RCC_USBPLLCLK_DIV3
         - RCC_USBPLLCLK_DIV4
         - RCC_USBPLLCLK_DIV5
         - RCC_USBPLLCLK_DIV6
         - RCC_USBPLLCLK_DIV7
         - RCC_USBPLLCLK_DIV8
         - RCC_USBPLLCLK_DIV9
         - RCC_USBPLLCLK_DIV10
         - RCC_USBPLLCLK_DIV11
         - RCC_USBPLLCLK_DIV12
         - RCC_USBPLLCLK_DIV13
         - RCC_USBPLLCLK_DIV14
         - RCC_USBPLLCLK_DIV15
return  none

name    RCC_ConfigUSBFSClk_.
fun     Configures the USBFS clock source(USBFSCLK).
param   USBFS_clksrc(USBFS clock source):
         - RCC_USBFS_CLKSRC_UCDR
         - RCC_USBFS_CLKSRC_PLLPRES
         - RCC_USBFS_CLKSRC_USBHS48M
return  none
note  The PLL clock source and prescaler are first configured
      by RCC_ConfigUSBPLLPresClk() function when selecting the RCC_USBFS_CLKSRC_PLLPRES.

name    RCC_ConfigUSBHSClk_.
fun     Configures the USBHS clock source(USBHSCLK).
param   USBHS_clksrc(USBHS clock source):
         - RCC_USBHS_CLKSRC_HSE
         - RCC_USBHS_CLKSRC_PLLPRES
return  none
note  The PLL clock source and prescaler are first configured
      by RCC_ConfigUSBPLLPresClk() function when selecting the RCC_USBHS_CLKSRC_PLLPRES.
note  The input clock frequency must be ensured to be 16M/19.2M/20M/24M/26M/32M.

name    RCC_ConfigUSBHSClk_.
fun     Configures the USBHS clock source(USBHSCLK).
param   USBHS_bw(USBHS band width):
         - RCC_USBHS_BW_16M    Select this bit when input clock frequency is 16M
         - RCC_USBHS_BW_OTHER  Select this bit when input clock frequency is 19.2M/20M/24M/26M/32M
return  none
note    none

name    RCC_ConfigUSBHSFrequency.
fun     Configures the USBHS clock source(USBHSCLK).
param   USBHS_bw(USBHS band width):
         - RCC_USBHS_FREQ_19_2M      Select this bit when input clock frequency is 19.2M
         - RCC_USBHS_FREQ_20M        Select this bit when input clock frequency is 20M
         - RCC_USBHS_FREQ_24M        Select this bit when input clock frequency is 24M
         - RCC_USBHS_FREQ_16_OR_32M  Select this bit when input clock frequency is16 or 32M
         - RCC_USBHS_FREQ_26M        Select this bit when input clock frequency is 26M
return  none
note    none

name    RCC_ConfigAdc1mClk.
fun     Configures the ADCx 1M clock (ADC1MCLK).
param   ADC1M_clksrc(ADC1M clock source):
         - RCC_ADC1MCLK_SRC_HSI
         - RCC_ADC1MCLK_SRC_HSE
param   ADC1M_prescaler(ADC1M clock prescaler):
         - RCC_ADC1MCLK_DIV1
         - RCC_ADC1MCLK_DIV2
         - RCC_ADC1MCLK_DIV3
         - RCC_ADC1MCLK_DIV4
         - RCC_ADC1MCLK_DIV5
         - RCC_ADC1MCLK_DIV6
         - RCC_ADC1MCLK_DIV7
         - RCC_ADC1MCLK_DIV8
         - RCC_ADC1MCLK_DIV9
         - RCC_ADC1MCLK_DIV10
         - RCC_ADC1MCLK_DIV11
         - RCC_ADC1MCLK_DIV12
         - RCC_ADC1MCLK_DIV13
         - RCC_ADC1MCLK_DIV14
         - RCC_ADC1MCLK_DIV15
         - RCC_ADC1MCLK_DIV16
         - RCC_ADC1MCLK_DIV17
         - RCC_ADC1MCLK_DIV18
         - RCC_ADC1MCLK_DIV19
         - RCC_ADC1MCLK_DIV20
         - RCC_ADC1MCLK_DIV21
         - RCC_ADC1MCLK_DIV22
         - RCC_ADC1MCLK_DIV23
         - RCC_ADC1MCLK_DIV24
         - RCC_ADC1MCLK_DIV25
         - RCC_ADC1MCLK_DIV26
         - RCC_ADC1MCLK_DIV27
         - RCC_ADC1MCLK_DIV28
         - RCC_ADC1MCLK_DIV29
         - RCC_ADC1MCLK_DIV30
         - RCC_ADC1MCLK_DIV31
         - RCC_ADC1MCLK_DIV32
return  none

name    RCC_ConfigAdcPllClk.
fun     Configures the ADC clock source(ADCCLK).
param   ADC_PLLsource(ADC PLL clock source):
         - RCC_ADCPLLCLK_SRC_PLL
         - RCC_ADCPLLCLK_SRC_USBHS240M
param   ADC_PLLprescaler(ADC PLLCLK prescaler):
         - RCC_ADCPLLCLK_DIV1
         - RCC_ADCPLLCLK_DIV2
         - RCC_ADCPLLCLK_DIV3
         - RCC_ADCPLLCLK_DIV4
         - RCC_ADCPLLCLK_DIV6
         - RCC_ADCPLLCLK_DIV8
         - RCC_ADCPLLCLK_DIV10
         - RCC_ADCPLLCLK_DIV12
param   ADC_PLLenable:
          - RCC_ADCPLLCLK_DISABLE
          - RCC_ADCPLLCLK_ENABLE
return  none

name    RCC_ConfigAdcHclk.
fun     Configures the ADCHCLK prescaler.
param   ADC_hclk_prescaler(ADCHCLK prescaler):
         - RCC_ADCHCLK_DIV1
         - RCC_ADCHCLK_DIV2
         - RCC_ADCHCLK_DIV3
         - RCC_ADCHCLK_DIV4
         - RCC_ADCHCLK_DIV6
         - RCC_ADCHCLK_DIV8
         - RCC_ADCHCLK_DIV10
         - RCC_ADCHCLK_DIV12
         - RCC_ADCHCLK_DIV16
         - RCC_ADCHCLK_DIV32
return  none

name    RCC_ConfigSDRAMClk.
fun     Configures the SDRAM HCLK prescaler.
param   SDRAM_prescaler(SDRAM HCLK prescaler):
         - RCC_SDRAM_HCLK_DIV1
         - RCC_SDRAM_HCLK_DIV2
         - RCC_SDRAM_HCLK_DIV3
         - RCC_SDRAM_HCLK_DIV4
         - RCC_SDRAM_HCLK_DIV5
         - RCC_SDRAM_HCLK_DIV6
         - RCC_SDRAM_HCLK_DIV7
         - RCC_SDRAM_HCLK_DIV8
return  none

name    RCC_ConfigDSMUFilterClk.
fun     Configures the DSMU filter prescaler.
param   DSMU_prescaler(DSMU filter prescaler):
         - RCC_DSMU_FLT_DIV1
         - RCC_DSMU_FLT_DIV2
         - RCC_DSMU_FLT_DIV4
         - RCC_DSMU_FLT_DIV6
return  none

name    RCC_ConfigPeriphClk.
fun     Configures the SAC/SDIO/USBHS/ETH/FEMC/XSPI/CORDIC Peripheral HCLK prescaler.
param   Periph_prescaler(Periph HCLK prescaler):
         - RCC_PERIPH_HCLK_DIV1
         - RCC_PERIPH_HCLK_DIV2
return  none
note    The interface clock must not exceed 120 MHz.

name    RCC_EnableLsi.
fun     Enables the Internal Low Speed oscillator (LSI).
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name    RCC_ConfigLse.
fun     Configures the External High Speed oscillator (LSE).
param   RCC_LSE :
          - RCC_LSE_DISABLE    LSE oscillator OFF
          - RCC_LSE_ENABLE     LSE oscillator ON
          - RCC_LSE_BYPASS     LSE oscillator bypassed with external clock
return  none:
note BDCTRL is protected, you need to enable the PWR clock first,
     then configure PWR_CTRL.DBKP to 1 to change it.

name    RCC_EnableLSEClockSecuritySystem.
fun     Enables the LSE Clock Security System.
param   Cmd:
          - ENABLE
          - DISABLE
return  none
note BDCTRL is protected, you need to enable the PWR clock first,
     then configure PWR_CTRL.DBKP to 1 to change it.

name    RCC_ConfigRtcClk.
fun     Configures the RTC clock (RTCCLK).
param   rtcclk_source(the RTC clock source):
         - RCC_RTCCLK_SRC_LSE           LSE selected as RTC clock
         - RCC_RTCCLK_SRC_LSI           LSI selected as RTC clock
         - RCC_RTCCLK_SRC_HSE_DIV128    HSE clock divided by 128 selected as RTC clock
return  none
note    Once the RTC clock is selected it can't be changed unless the Backup domain is reset.
note    BDCTRL is protected, you need to enable the PWR clock first,
       then configure PWR_CTRL.DBKP to 1 to change it.

name    RCC_EnableRtcClk.
fun     Enables the RTC clock.
param   Cmd:
          - ENABLE
          - DISABLE
return  none
note    This function must be used only after the RTC clock was selected
        using the RCC_ConfigRtcClk function.
note    BDCTRL is protected, you need to enable the PWR clock first,
        then configure PWR_CTRL.DBKP to 1 to change it.

name  RCC_ConfigLPTIM1Clk.
fun   Configures the LPTIM1 clock (LPTIMCLK).
param clock_source  (specifies the LPTIM1 clock source).
     - RCC_LPTIMCLK_SRC_LSI   LSI selected as LPTIM1 clock
     - RCC_LPTIMCLK_SRC_LSE   LSE selected as LPTIM1 clock
     - RCC_LPTIMCLK_SRC_HSI   HSI selected as LPTIM1 clock
     - RCC_LPTIMCLK_SRC_HSE   HSE selected as LPTIM1 clock
     - RCC_LPTIMCLK_SRC_PCLK1 PLCK1 clock selected as LPTIM1 clock
return  none
note BDCTRL is protected, you need to enable the PWR clock first,
     then configure PWR_CTRL.DBKP to 1 to change it.

name  RCC_ConfigLPTIM2Clk.
fun   Configures the LPTIM2 clock (LPTIMCLK).
param clock_source  (specifies the LPTIM2 clock source).
     - RCC_LPTIMCLK_SRC_LSI   LSI selected as LPTIM2 clock
     - RCC_LPTIMCLK_SRC_LSE   LSE selected as LPTIM2 clock
     - RCC_LPTIMCLK_SRC_HSI   HSI selected as LPTIM2 clock
     - RCC_LPTIMCLK_SRC_HSE   HSE selected as LPTIM2 clock
     - RCC_LPTIMCLK_SRC_PCLK1 PLCK1 clock selected as LPTIM2 clock
return  none
note BDCTRL is protected, you need to enable the PWR clock first,
     then configure PWR_CTRL.DBKP to 1 to change it.

name    RCC_EnableLPTIMPeriphClk.
fun     Enables the LPTIM1 and LPTIM2 clock.
param   LPTIM_periph (LPTIM peripheral to gates its clock):
        - RCC_LPTIM1_PERIPH_EN
        - RCC_LPTIM2_PERIPH_EN
param   Cmd:
          - ENABLE
          - DISABLE
return none.
note    BDCTRL is protected, you need to enable the PWR clock first,
        then configure PWR_CTRL.DBKP to 1 to change it.

name    RCC_EnableLPTIMPeriphReset.
fun     LPTIM1 and LPTIM2 clock reset.
param   LPTIM_periph specifies the LPTIM peripheral to reset.
        - RCC_LPTIM1_PERIPH_RST
        - RCC_LPTIM2_PERIPH_RST
return none.
note    BDCTRL is protected, you need to enable the PWR clock first,
        then configure PWR_CTRL.DBKP to 1 to change it.

name    RCC_EnableBackupReset.
fun     Reset Backup domain .
param   none
return  none.
note    BDCTRL is protected, you need to enable the PWR clock first,
        then configure PWR_CTRL.DBKP to 1 to change it.

name    RCC_GetClocksFreqValue.
fun     Returns the frequencies of different on chip clocks.
param   RCC_clocks pointer to a RCC_ClocksType structure which will hold
        the clocks frequencies.
return  none
note    The result of this function could be not correct when using
        fractional value for HSE crystal.

name    RCC_EnableFDCANOffRequest.
fun     Sending a off request to the FDCAN module when enabled.
param   FDCAN_sel :
        -RCC_OFFEN_FDCAN1
        -RCC_OFFEN_FDCAN2
        -RCC_OFFEN_FDCAN3
param   Cmd:
          - ENABLE
          - DISABLE
return  none
note    Hardware clears this bit after receiving a shutdown answer from the CAN module

name    RCC_EnableAHBPeriphClk.
fun     Enables the AHB peripheral clock.
param   AHB_periph (AHB peripheral to gates its clock):
        - RCC_AHB_PERIPHEN_ATIM3
        - RCC_AHB_PERIPHEN_ATIM2
        - RCC_AHB_PERIPHEN_ATIM1
        - RCC_AHB_PERIPHEN_DVP
        - RCC_AHB_PERIPHEN_CORDIC
        - RCC_AHB_PERIPHEN_SDRAM
        - RCC_AHB_PERIPHEN_USBHS
        - RCC_AHB_PERIPHEN_ETH
        - RCC_AHB_PERIPHEN_CRC
        - RCC_AHB_PERIPHEN_DMA2
        - RCC_AHB_PERIPHEN_DMA1
        - RCC_AHB_PERIPHEN_SDIO
        - RCC_AHB_PERIPHEN_XSPI
        - RCC_AHB_PERIPHEN_RNGC
        - RCC_AHB_PERIPHEN_BKPSRAM
        - RCC_AHB_PERIPHEN_FEMC
        - RCC_AHB_PERIPHEN_FLITF
        - RCC_AHB_PERIPHEN_SRAM
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name    RCC_EnableAHB1PeriphClk.
fun     Enables the AHB peripheral clock.
param   AHB_periph (AHB peripheral to gates its clock):
        -RCC_AHB_PERIPHEN_SAC
        -RCC_AHB_PERIPHEN_ADC3
        -RCC_AHB_PERIPHEN_ADC2
        -RCC_AHB_PERIPHEN_ADC1
        -RCC_AHB_PERIPHEN_GPIOH
        -RCC_AHB_PERIPHEN_GPIOG
        -RCC_AHB_PERIPHEN_GPIOF
        -RCC_AHB_PERIPHEN_GPIOE
        -RCC_AHB_PERIPHEN_GPIOD
        -RCC_AHB_PERIPHEN_GPIOC
        -RCC_AHB_PERIPHEN_GPIOB
        -RCC_AHB_PERIPHEN_GPIOA
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name    RCC_EnableAPB2PeriphClk.
fun     Enables the High Speed APB (APB2) peripheral clock.
param   APB2_periph (APB2 peripheral to gates its clock):
        - RCC_APB2_PERIPHEN_USART4
        - RCC_APB2_PERIPHEN_UART10
        - RCC_APB2_PERIPHEN_USART9
        - RCC_APB2_PERIPHEN_GTIM10
        - RCC_APB2_PERIPHEN_GTIM9
        - RCC_APB2_PERIPHEN_GTIM8
        - RCC_APB2_PERIPHEN_UART7
        - RCC_APB2_PERIPHEN_UART6
        - RCC_APB2_PERIPHEN_USART1
        - RCC_APB2_PERIPHEN_SPI1
        - RCC_APB2_PERIPHEN_SPI4
        - RCC_APB2_PERIPHEN_SPI5
        - RCC_APB2_PERIPHEN_SPI6
        - RCC_APB2_PERIPHEN_AFIO
param   Cmd:
          - ENABLE
          - DISABLE
return none.

name    RCC_EnableAPB1PeriphClk.
fun     Enables the High Speed APB (APB1) peripheral clock.
param   APB1_periph (APB1 peripheral to gates its clock):
        - RCC_APB1_PERIPHEN_DSMU
        - RCC_APB1_PERIPHEN_DAC12
        - RCC_APB1_PERIPHEN_WWDG
        - RCC_APB1_PERIPHEN_I2C4
        - RCC_APB1_PERIPHEN_I2C3
        - RCC_APB1_PERIPHEN_BTIM2
        - RCC_APB1_PERIPHEN_BTIM1
        - RCC_APB1_PERIPHEN_FDCAN3
        - RCC_APB1_PERIPHEN_FDCAN2
        - RCC_APB1_PERIPHEN_FDCAN1
        - RCC_APB1_PERIPHEN_USBFS
        - RCC_APB1_PERIPHEN_UCDR
        - RCC_APB1_PERIPHEN_GTIM7
        - RCC_APB1_PERIPHEN_GTIM6
        - RCC_APB1_PERIPHEN_GTIM5
        - RCC_APB1_PERIPHEN_GTIM4
        - RCC_APB1_PERIPHEN_GTIM3
        - RCC_APB1_PERIPHEN_GTIM2
        - RCC_APB1_PERIPHEN_GTIM1
        - RCC_APB1_PERIPHEN_SPI3
        - RCC_APB1_PERIPHEN_SPI2
        - RCC_APB1_PERIPHEN_I2C2
        - RCC_APB1_PERIPHEN_I2C1
        - RCC_APB1_PERIPHEN_UART5
        - RCC_APB1_PERIPHEN_UART8
        - RCC_APB1_PERIPHEN_USART3
        - RCC_APB1_PERIPHEN_USART2
        - RCC_APB1_PERIPHEN_BKP
        - RCC_APB1_PERIPHEN_PWR
param   Cmd:
          - ENABLE
          - DISABLE
return none.

name    RCC_EnableAHBPeriphReset.
fun     AHB peripheral reset.
param   AHB_periph specifies the AHB peripheral to reset.
        - RCC_AHB_PERIPHRST_ETH
        - RCC_AHB_PERIPHRST_USBHS
        - RCC_AHB_PERIPHRST_SDRAM
        - RCC_AHB_PERIPHRST_CORDIC
        - RCC_AHB_PERIPHRST_ATIM3
        - RCC_AHB_PERIPHRST_ATIM2
        - RCC_AHB_PERIPHRST_ATIM1
        - RCC_AHB_PERIPHRST_DVP
        - RCC_AHB_PERIPHRST_ADC3
        - RCC_AHB_PERIPHRST_ADC2
        - RCC_AHB_PERIPHRST_ADC1
        - RCC_AHB_PERIPHRST_GPIOH
        - RCC_AHB_PERIPHRST_GPIOG
        - RCC_AHB_PERIPHRST_GPIOF
        - RCC_AHB_PERIPHRST_GPIOE
        - RCC_AHB_PERIPHRST_GPIOD
        - RCC_AHB_PERIPHRST_GPIOC
        - RCC_AHB_PERIPHRST_GPIOB
        - RCC_AHB_PERIPHRST_GPIOA
        - RCC_AHB_PERIPHRST_FEMC
        - RCC_AHB_PERIPHRST_SDIO
        - RCC_AHB_PERIPHRST_USBHSPHY
        - RCC_AHB_PERIPHRST_XSPI
        - RCC_AHB_PERIPHRST_RNGC
        - RCC_AHB_PERIPHRST_SAC
return none.

name    RCC_EnableAPB2PeriphReset.
fun     High Speed APB (APB2) peripheral reset.
param   APB2_periph specifies the APB2 peripheral to reset.
        - RCC_APB2_PERIPHRST_USART4
        - RCC_APB2_PERIPHRST_GTIM10
        - RCC_APB2_PERIPHRST_GTIM9
        - RCC_APB2_PERIPHRST_GTIM8
        - RCC_APB2_PERIPHRST_UART7
        - RCC_APB2_PERIPHRST_UART6
        - RCC_APB2_PERIPHRST_USART1
        - RCC_APB2_PERIPHRST_SPI1
        - RCC_APB2_PERIPHRST_SPI4
        - RCC_APB2_PERIPHRST_SPI5
        - RCC_APB2_PERIPHRST_SPI6
        - RCC_APB2_PERIPHRST_AFIO
return none.

name    RCC_EnableAPB1PeriphReset.
fun     Low Speed APB (APB1) peripheral reset.
param   APB1_periph specifies the APB1 peripheral to reset.
        - RCC_APB1_PERIPHRST_DAC12
        - RCC_APB1_PERIPHRST_WWDG
        - RCC_APB1_PERIPHRST_I2C4
        - RCC_APB1_PERIPHRST_I2C3
        - RCC_APB1_PERIPHRST_DSMU
        - RCC_APB1_PERIPHRST_UART10
        - RCC_APB1_PERIPHRST_USART9
        - RCC_APB1_PERIPHRST_BTIM2
        - RCC_APB1_PERIPHRST_BTIM1
        - RCC_APB1_PERIPHRST_FDCAN3
        - RCC_APB1_PERIPHRST_FDCAN2
        - RCC_APB1_PERIPHRST_FDCAN1
        - RCC_APB1_PERIPHRST_USBFS
        - RCC_APB1_PERIPHRST_UCDR
        - RCC_APB1_PERIPHRST_GTIM7
        - RCC_APB1_PERIPHRST_GTIM6
        - RCC_APB1_PERIPHRST_GTIM5
        - RCC_APB1_PERIPHRST_GTIM4
        - RCC_APB1_PERIPHRST_GTIM3
        - RCC_APB1_PERIPHRST_GTIM2
        - RCC_APB1_PERIPHRST_GTIM1
        - RCC_APB1_PERIPHRST_SPI3
        - RCC_APB1_PERIPHRST_SPI2
        - RCC_APB1_PERIPHRST_I2C2
        - RCC_APB1_PERIPHRST_I2C1
        - RCC_APB1_PERIPHRST_UART5
        - RCC_APB1_PERIPHRST_UART8
        - RCC_APB1_PERIPHRST_USART3
        - RCC_APB1_PERIPHRST_USART2
        - RCC_APB1_PERIPHRST_BKP
        - RCC_APB1_PERIPHRST_PWR
return none.

name   RCC_ConfigMco1.
fun    Selects the clock source to output on MCO1 pin.
param  MCO_source(clock source to output):
     - RCC_MCO_SYSCLK
     - RCC_MCO_HSI
     - RCC_MCO_HSE
     - RCC_MCO_LSI
     - RCC_MCO_LSE
     - RCC_MCO_USBHS48M
     - RCC_MCO_PLL
     - RCC_MCO_EXTPLL
     - RCC_MCO_USBHS240M
param  MCO_prescaler(MCO clock prescaler):
     - RCC_MCOCLK_DIV1
     - RCC_MCOCLK_DIV2
     - RCC_MCOCLK_DIV3
     - RCC_MCOCLK_DIV4
     - RCC_MCOCLK_DIV5
     - RCC_MCOCLK_DIV6
     - RCC_MCOCLK_DIV7
     - RCC_MCOCLK_DIV8
     - RCC_MCOCLK_DIV9
     - RCC_MCOCLK_DIV10
     - RCC_MCOCLK_DIV11
     - RCC_MCOCLK_DIV12
     - RCC_MCOCLK_DIV13
     - RCC_MCOCLK_DIV14
     - RCC_MCOCLK_DIV15
     - RCC_MCOCLK_DIV16
return  none.

name    RCC_EnableMco1.
fun     Enables the MCO1.
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name   RCC_ConfigMco2.
fun    Selects the clock source to output on MCO2 pin.
param  MCO_source(clock source to output):
     - RCC_MCO_SYSCLK
     - RCC_MCO_HSI
     - RCC_MCO_HSE
     - RCC_MCO_LSI
     - RCC_MCO_LSE
     - RCC_MCO_USBHS48M
     - RCC_MCO_PLL
     - RCC_MCO_EXTPLL
     - RCC_MCO_USBHS240M
param  MCO_prescaler(MCO clock prescaler):
     - RCC_MCOCLK_DIV1
     - RCC_MCOCLK_DIV2
     - RCC_MCOCLK_DIV3
     - RCC_MCOCLK_DIV4
     - RCC_MCOCLK_DIV5
     - RCC_MCOCLK_DIV6
     - RCC_MCOCLK_DIV7
     - RCC_MCOCLK_DIV8
     - RCC_MCOCLK_DIV9
     - RCC_MCOCLK_DIV10
     - RCC_MCOCLK_DIV11
     - RCC_MCOCLK_DIV12
     - RCC_MCOCLK_DIV13
     - RCC_MCOCLK_DIV14
     - RCC_MCOCLK_DIV15
     - RCC_MCOCLK_DIV16
return  none.

name    RCC_EnableMco2.
fun     Enables the MCO2.
param   Cmd:
          - ENABLE
          - DISABLE
return  none

name    RCC_EnableRemap.
fun     Enables the system remap.
param   none
return  none

name   RCC_ConfigRemapMode.
fun    Remap boot mode selection.
param  Remap_mode:
        - RCC_REMAP_SYS       boot from system memory
        - RCC_REMAP_BFLASH    boot from bank before flash main
        - RCC_REMAP_AFLASH    boot from bank after flash main
        - RCC_REMAP_SRAM      boot from SRAM
        - RCC_REMAP_FEMC      boot from FEMC
        - RCC_REMAP_XSPI      boot from XSPI
        - RCC_REMAP_SDRAM     boot from SDRAM
return  none.

name    RCC_ClearResetFlag.
fun     Clears the RCC reset flags.
param   none
return  none
note  Clear the following flags:
          - RCC_FLAG_BORRSTF       BOR reset flag
          - RCC_FLAG_MAINEMCF      MAIN_EMC reset flag
          - RCC_FLAG_BKPEMCF       BKP_EMC reset flag
          - RCC_FLAG_RAMERSTF      RAM or FLASH ECC error reset flag
          - RCC_FLAG_SMPURSTF      SMPU reset flag
          - RCC_FLAG_PINRSTF       Pin reset flag
          - RCC_FLAG_PORRSTF       POR/PDR reset flag
          - RCC_FLAG_SFTRSTF       Software reset flag
          - RCC_FLAG_IWDGRSTF      Independent Watchdog reset flag
          - RCC_FLAG_WWDGRSTF      Window Watchdog reset flag
          - RCC_FLAG_LPWRRSTF      Low Power reset flag

name    RCC_ClrIntPendingBit.
fun     Clears the RCC's interrupt pending bits.
param   interrupt_clear(interrupt pending bit to clear):
         - RCC_CLR_LSIRDIF     LSI ready interrupt
         - RCC_CLR_LSERDIF     LSI ready interrupt
         - RCC_CLR_HSIRDIF     HSI ready interrupt
         - RCC_CLR_HSERDIF     HSE ready interrupt
         - RCC_CLR_PLLRDIF     PLL ready interrupt
         - RCC_CLR_LSECSSIF    LSE CSS interrupt
         - RCC_CLR_HSECSSIF    HSE CSS interrupt
         - RCC_CLR_HSICSSIF    HSE CSS interrupt
         - RCC_CLR_BORIF       BOR interrupt
return  none

name    RCC_WaitHseStable.
fun     Waits for HSE start-up.
param   none
return  ErrorStatus:
         - SUCCESS    HSE oscillator is stable and ready to use
         - ERROR      HSE oscillator not yet ready

name    RCC_WaitHsiStable.
fun     Waits for HSI start-up.
param   none
return  ErrorStatus:
         - SUCCESS    HSI oscillator is stable and ready to use
         - ERROR      HSI oscillator not yet ready

name    RCC_WaitLsiStable.
fun     Waits for LSI start-up.
param   none
return  ErrorStatus:
         - SUCCESS    LSI oscillator is stable and ready to use
         - ERROR      LSI oscillator not yet ready

name    RCC_WaitLseStable.
fun     Waits for LSE start-up.
param   none
return  ErrorStatus:
         - SUCCESS    LSE oscillator is stable and ready to use
         - ERROR      LSE oscillator not yet ready

name    RCC_GetHSECSSStatus.
fun     Checks whether the specified HSE CSS flag has occurred or not.
param   interrupt_flag(RCC interrupt source to check):
         - RCC_CSSFLAG_HSEPOF     HSE phase shift out of range flag
         - RCC_CSSFLAG_HSEFHF     HSE frequency out of high limit flag
         - RCC_CSSFLAG_HSEFLF     HSE frequency out of low limit flag
return  FlagStatus:
          - SET
          - RESET

name    RCC_GetFlagStatus.
fun     Checks whether the specified RCC flag is set or not.
param   RCC_flag:
          - RCC_FLAG_PLLRDF        PLL clock ready
          - RCC_FLAG_HSIRDF        HSI oscillator clock ready
          - RCC_FLAG_HSERDF        HSE oscillator clock ready
          - RCC_FLAG_RPINTF        LSI oscillator clock ready
          - RCC_FLAG_LSECSSF       LSE Clock Safety System flag
          - RCC_FLAG_HSECSSF       HSE Clock Safety System flag
          - RCC_FLAG_HSICSSF       HSI Clock Safety System flag
          - RCC_FLAG_LSIRDF        LSI oscillator clock ready
          - RCC_FLAG_BORRSTF       BOR reset flag
          - RCC_FLAG_MAINEMCF       MAIN_EMC reset flag
          - RCC_FLAG_BKPEMCF       BKP_EMC reset flag
          - RCC_FLAG_RAMERSTF      RAM or FLASH ECC error reset flag
          - RCC_FLAG_SMPURSTF       SMPU reset flag
          - RCC_FLAG_PINRSTF       Pin reset flag
          - RCC_FLAG_PORRSTF       POR/PDR reset flag
          - RCC_FLAG_SFTRSTF       Software reset flag
          - RCC_FLAG_IWDGRSTF      Independent Watchdog reset flag
          - RCC_FLAG_WWDGRSTF      Window Watchdog reset flag
          - RCC_FLAG_LPWRRSTF      Low Power reset flag
          - RCC_FLAG_LSERDF        LSE oscillator clock ready
          - RCC_FLAG_HSEFLF        HSE frequency out of low limit flag
          - RCC_FLAG_HSEFHF        HSE frequency out of high limit flag
          - RCC_FLAG_HSEPOF        HSE phase shift out of range flag
          - RCC_FLAG_APBALIGNF     APB1 and APB2 Subdivided Clock Rising Edge Alignment flag
          - RCC_FLAG_VIOPORRSTF    VDDIO POR Reset flag
          - RCC_FLAG_EXTPLLRDF     EXTPLL clock ready
return  FlagStatus:
          - SET
          - RESET

name    RCC_GetIntStatus.
fun     Checks whether the specified RCC interrupt has occurred or not.
param   interrupt_flag(RCC interrupt source to check):
         - RCC_INT_LSIRDIF     LSI ready interrupt
         - RCC_INT_LSERDIF     LSI ready interrupt
         - RCC_INT_HSIRDIF     HSI ready interrupt
         - RCC_INT_HSERDIF     HSE ready interrupt
         - RCC_INT_PLLRDIF     PLL ready interrupt
         - RCC_INT_LSECSSIF    LSE CSS interrupt
         - RCC_INT_HSECSSIF    HSE CSS interrupt
         - RCC_INT_HSICSSIF    HSI CSS interrupt
         - RCC_INT_BORIF       BOR interrupt
return  The new state of RccInt
         - SET
         - RESET

name    RCC_EnableVDDIOPORReset.
fun     Enables the VDDIO POR Reset request.
param   Cmd:
          - ENABLE
          - DISABLE
return  none