AI FAE Platform5.12 FDCAN Guide
This chapter describes the file layout of the FDCAN driver in the N32H49x standard peripheral library, its 81 public functions, and the 6 examples FDCAN_Classic, FDCAN_Interrupt, FDCAN_Loopback, FDCAN_Polling, TTCAN_Level1, and TTCAN_Level2. FDCAN supports classic CAN and CAN FD frame formats and provides time-triggered communication (TTCAN); read this chapter together with the “Controller Area Network with flexible data-rate (FDCAN)” chapter of the user manual for message RAM allocation, bit timing, and TTCAN scheduling register definitions.
5.12.1 Related files
| Relative path | Purpose |
|---|---|
firmware/n32h49x_std_periph_driver/inc/n32h49x_fdcan.h |
Defines FDCAN_InitType, FDCAN_FilterType, FDCAN_TxHeaderType, FDCAN_RxHeaderType, FDCAN_TT_InitType, FDCAN_TriggerType and other structures, together with macros for frame format, working mode, data length, interrupt and TT flags;declares 81 public functions grouped into 13 sections, from reset and configuration to time-triggered interrupts and flags |
firmware/n32h49x_std_periph_driver/src/n32h49x_fdcan.c |
Implements the 81 functions above: initialization and working mode, message RAM and reception filter configuration, Rx FIFO and receive buffer, timestamp and timeout counter, transmitter delay compensation, Tx buffer and Tx FIFO/queue, time-triggered communication (TTCAN), and interrupt and flag management |
projects/n32h49x_EVAL/examples/FDCAN/ |
FDCAN example root, containing the 6 examples FDCAN_Classic, FDCAN_Interrupt, FDCAN_Loopback, FDCAN_Polling, TTCAN_Level1, and TTCAN_Level2 |
projects/n32h49x_EVAL/examples/FDCAN/FDCAN_Classic/ |
Directory composition of this example: MDK-ARM/, EWARM/, inc/, src/, readme.txt |
projects/n32h49x_EVAL/bsp/ |
Board support files shared by several examples: serial log printing and delay |
5.12.2 API reference
The following 81 public functions are listed in the declaration order of n32h49x_fdcan.h in 13 groups; each entry gives a summary and the original comment above the function in n32h49x_fdcan.c.
Reset
FDCAN_DeInit
Initialization and configuration
FDCAN_Init, FDCAN_EnterSleep, FDCAN_ExitSleep, FDCAN_EnableISOMode, FDCAN_DisableISOMode, FDCAN_EnableEdgeFilter, FDCAN_DisableEdgeFilter, FDCAN_Start, FDCAN_Stop
Protocol status and error counters
FDCAN_GetProtocolStatus, FDCAN_GetErrorCounters
Watchdog and restricted mode
FDCAN_ConfigRamWatchdog, FDCAN_CheckRestrictedMode, FDCAN_ExitRestrictedMode
Reception filtering
FDCAN_ConfigFilter, FDCAN_ConfigGlobalFilter, FDCAN_ConfigExtIdMask
Rx FIFO and receive buffer
FDCAN_ConfigRxFifoMode, FDCAN_ConfigFifoWatermark, FDCAN_GetRxFifoFillLevel, FDCAN_GetRxMsg, FDCAN_GetHpMsgStatus, FDCAN_CheckNewRxBufMsg
Timestamp
FDCAN_ConfigTSPrescaler, FDCAN_Config_TS, FDCAN_Get_TS, FDCAN_Reset_TS, FDCAN_ConfigExtTSDivider, FDCAN_EnableExtTS
Timeout counter
FDCAN_ConfigTimeoutCounter, FDCAN_EnableTimeoutCounter, FDCAN_DisableTimeoutCounter, FDCAN_GetTimeoutCounter, FDCAN_ResetTimeoutCounter
Transmitter delay compensation
FDCAN_ConfigTxDelayCompensation, FDCAN_EnableTxDelayCompensation, FDCAN_DisableTxDelayCompensation
Transmission
FDCAN_AddMsgToTxFifoQ, FDCAN_AddMsgToTxBuffer, FDCAN_EnableTxBufferRequest, FDCAN_GetLastTxFifoQReqBuf, FDCAN_AbortTxRequest, FDCAN_GetTxEvent, FDCAN_CheckTxBufRequest, FDCAN_CheckBufTxResult, FDCAN_CheckBufTxCancel, FDCAN_GetTxFifoFreeLevel
Time-triggered communication
FDCAN_TT_Init, FDCAN_TT_ConfigRefMsg, FDCAN_TT_ConfigTrigger, FDCAN_TT_SetGlobalTime, FDCAN_TT_SetClockSync, FDCAN_TT_ConfigStopWatch, FDCAN_TT_ConfigRegTimeMark, FDCAN_TT_EnableRegTMPulse, FDCAN_TT_EnableTrigTMPulse, FDCAN_TT_EnableGapPinCtrl, FDCAN_TT_EnableTMGapCtrl, FDCAN_TT_SetNextIsGap, FDCAN_TT_SetEndOfGap, FDCAN_TT_ConfigExtSyncPhase, FDCAN_TT_EnableExtSync, FDCAN_TT_GetStatus
Interrupts and flags
FDCAN_GetFlag, FDCAN_ClearFlag, FDCAN_ConfigIntLine, FDCAN_EnableInt, FDCAN_DisableInt, FDCAN_GetIntFlag, FDCAN_ActivateInt, FDCAN_DeactivateInt
Time-triggered interrupts and flags
FDCAN_TT_GetIntFlag, FDCAN_TT_GetFlag, FDCAN_TT_ClearFlag, FDCAN_TT_ConfigIntLine, FDCAN_TT_EnableInt, FDCAN_TT_DisableInt, FDCAN_TT_GetInt, FDCAN_TT_ActivateInt, FDCAN_TT_DeactivateInt
void FDCAN_DeInit(FDCAN_Module* FDCANx)Reset the FDCANx peripheral registers to their default reset values.
Source comment
name FDCAN_DeInit.
fun Reset the FDCANx peripheral registers to their default reset values.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
ErrorStatus FDCAN_Init(FDCAN_Module* FDCANx, FDCAN_InitType *FDCAN_InitParam)Initializes the FDCAN peripheral according to the specified parameters in the FDCAN_InitParam..
Source comment
name FDCAN_Init.
fun Initializes the FDCAN peripheral according to the specified
parameters in the FDCAN_InitParam..
param FDCANx pointer to specified FDCAN,must be one of the following value:
- FDCAN1
- FDCAN2
- FDCAN3
param FDCAN_InitParam: pointer to a FDCAN_InitType structure.
- FrameFormat:
- FDCAN_FRAME_CLASSIC
- FDCAN_FRAME_FD_NO_BRS
- FDCAN_FRAME_FD_BRS
- Mode:
- FDCAN_MODE_NORMAL
- FDCAN_MODE_RESTRICTED_OPERATION
- FDCAN_MODE_BUS_MONITORING
- FDCAN_MODE_INTERNAL_LOOPBACK
- FDCAN_MODE_EXTERNAL_LOOPBACK
- Prescaler: Must be a value between 1 and 512.
- SyncJumpWidth: Must be a value between 1 and 128.
- TimeSeg1: Must be a value between 2 and 256.
- TimeSeg2: Must be a value between 2 and 128.
- DataPrescaler: Must be a value between 1 and 32.
- DataSyncJumpWidth: Must be a value between 1 and 16.
- DataTimeSeg1: Must be a value between 1 and 32.
- DataTimeSeg2: Must be a value between 1 and 16.
- MsgRamStrAddr: Must be a value between 0x20000000 and 0x2008FFFF,
or between 0x10000000 and 0x1008FFFF.
- MsgRamOffset: Must be a value between 0 and 4480.
- StdFilterSize: Must be a value between 0 and 128.
- ExtFilterSize: Must be a value between 0 and 64.
- RxFifo0Size: Must be a value between 0 and 64.
- RxFifo1Size: Must be a value between 0 and 64.
- RxBufferSize: Must be a value between 0 and 64.
- TxEventSize: Must be a value between 0 and 32.
- TxBufferSize: Must be a value between 0 and 32.
- RxFifo0DataSize:
- FDCAN_DATA_BYTES_8
- FDCAN_DATA_BYTES_12
- FDCAN_DATA_BYTES_16
- FDCAN_DATA_BYTES_20
- FDCAN_DATA_BYTES_24
- FDCAN_DATA_BYTES_32
- FDCAN_DATA_BYTES_48
- FDCAN_DATA_BYTES_64
- RxFifo1DataSize:
- FDCAN_DATA_BYTES_8
- FDCAN_DATA_BYTES_12
- FDCAN_DATA_BYTES_16
- FDCAN_DATA_BYTES_20
- FDCAN_DATA_BYTES_24
- FDCAN_DATA_BYTES_32
- FDCAN_DATA_BYTES_48
- FDCAN_DATA_BYTES_64
- RxBufferDataSize:
- FDCAN_DATA_BYTES_8
- FDCAN_DATA_BYTES_12
- FDCAN_DATA_BYTES_16
- FDCAN_DATA_BYTES_20
- FDCAN_DATA_BYTES_24
- FDCAN_DATA_BYTES_32
- FDCAN_DATA_BYTES_48
- FDCAN_DATA_BYTES_64
- TxBufferDataSize:
- FDCAN_DATA_BYTES_8
- FDCAN_DATA_BYTES_12
- FDCAN_DATA_BYTES_16
- FDCAN_DATA_BYTES_20
- FDCAN_DATA_BYTES_24
- FDCAN_DATA_BYTES_32
- FDCAN_DATA_BYTES_48
- FDCAN_DATA_BYTES_64
- TxFifoQueueMode:
- FDCAN_TX_FIFO_MODE
- FDCAN_TX_QUEUE_MODE
- TxFifoQueueSize: Must be a value between 0 and 32.
- AutoRetransmission:
- ENABLE
- DISABLE
- TransmitPause:
- ENABLE
- DISABLE
- ProtocolException:
- ENABLE
- DISABLE
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_EnterSleep(FDCAN_Module *FDCANx)Enter sleep mode.
Source comment
name FDCAN_EnterSleep.
fun Enter sleep mode.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_ExitSleep(FDCAN_Module *FDCANx)Exit sleep mode
Source comment
name FDCAN_ExitSleep.
fun Exit sleep mode
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return ErrorStatus
- SUCCESS
- ERROR
void FDCAN_EnableISOMode(FDCAN_Module *FDCANx)Enable ISO 11898-1 protocol mode. CAN FD frame format is according to ISO 11898-1 standard.
Source comment
name FDCAN_EnableISOMode.
fun Enable ISO 11898-1 protocol mode.
CAN FD frame format is according to ISO 11898-1 standard.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_DisableISOMode(FDCAN_Module *FDCANx)Disable ISO 11898-1 protocol mode. CAN FD frame format is according to Bosch CAN FD specification V1.0.
Source comment
name FDCAN_DisableISOMode.
fun Disable ISO 11898-1 protocol mode.
CAN FD frame format is according to Bosch CAN FD specification V1.0.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_EnableEdgeFilter(FDCAN_Module *FDCANx)Enable edge filtering during bus integration. Two consecutive dominant tq are required to detect an edge for hard synchronization.
Source comment
name FDCAN_EnableEdgeFilter.
fun Enable edge filtering during bus integration.
Two consecutive dominant tq are required to detect an edge for hard synchronization.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_DisableEdgeFilter(FDCAN_Module *FDCANx)Disable edge filtering during bus integration. One dominant tq is required to detect an edge for hard synchronization.
Source comment
name FDCAN_DisableEdgeFilter.
fun Disable edge filtering during bus integration.
One dominant tq is required to detect an edge for hard synchronization.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_Start(FDCAN_Module *FDCANx)Start the FDCAN module.
Source comment
name FDCAN_Start.
fun Start the FDCAN module.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
ErrorStatus FDCAN_Stop(FDCAN_Module *FDCANx)Stop the FDCAN module and enable access to configuration registers.
Source comment
name FDCAN_Stop.
fun Stop the FDCAN module and enable access to configuration registers.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return ErrorStatus
- SUCCESS
- ERROR
void FDCAN_GetProtocolStatus(FDCAN_Module *FDCANx, FDCAN_ProtocolStatus *ProtocolStatus)Get protocol status.
Source comment
name FDCAN_GetProtocolStatus.
fun Get protocol status.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param ProtocolStatus pointer to an FDCAN_ProtocolStatus structure.
- uint32_t LastError
- FDCAN_LAST_ERROR_NONE
- FDCAN_LAST_ERROR_STUFF
- FDCAN_LAST_ERROR_FORM
- FDCAN_LAST_ERROR_ACK
- FDCAN_LAST_ERROR_BIT1
- FDCAN_LAST_ERROR_BIT0
- FDCAN_LAST_ERROR_CRC
- FDCAN_LAST_ERROR_NO_CHANGE
- uint32_t LastDataError
- FDCAN_LAST_DATA_ERROR_NONE
- FDCAN_LAST_DATA_ERROR_STUFF
- FDCAN_LAST_DATA_ERROR_FORM
- FDCAN_LAST_DATA_ERROR_ACK
- FDCAN_LAST_DATA_ERROR_BIT1
- FDCAN_LAST_DATA_ERROR_BIT0
- FDCAN_LAST_DATA_ERROR_CRC
- FDCAN_LAST_DATA_ERROR_NO_CHANGE
- uint32_t Activity
- FDCAN_COM_STATE_SYNC
- FDCAN_COM_STATE_IDLE
- FDCAN_COM_STATE_RX
- FDCAN_COM_STATE_TX
- uint32_t Error
- FDCAN_ERROR_ACTIVE
- FDCAN_ERROR_PASSIVE
- uint32_t Warning
- FDCAN_WARNING_BELOW_96
- FDCAN_WARNING_REACH_96
- uint32_t BusOff
- FDCAN_BUS_ON
- FDCAN_BUS_OFF
- uint32_t RxESIflag
- FDCAN_ESI_NOT_SET
- FDCAN_ESI_SET
- uint32_t RxBRSflag
- FDCAN_BRS_NOT_SET
- FDCAN_BRS_SET
- uint32_t RxFDFflag
- FDCAN_FDMSG_NOT_RECEIVED
- FDCAN_FDMSG_RECEIVED
- uint32_t Exception
- FDCAN_NO_EXCEPTION
- FDCAN_HAVE_EXCEPTION
- uint32_t TDCvalue
This parameter can be a value between 0 and 127
return none
void FDCAN_GetErrorCounters(FDCAN_Module *FDCANx, FDCAN_ErrorCounters *ErrorCounters)Get error counter values.
Source comment
name FDCAN_GetErrorCounters.
fun Get error counter values.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param ErrorCounters pointer to an FDCAN_ErrorCounters structure.
- TxErrorCnt
This parameter can be a value between 0 and 255
- RxErrorCnt
This parameter can be a value between 0 and 127
- RxErrorPassive
- FDCAN_RX_ERROR_BELOW_128
- FDCAN_RX_ERROR_REACH_128
- ErrorLogging
This parameter can be a value between 0 and 255.
return none
void FDCAN_ConfigRamWatchdog(FDCAN_Module *FDCANx, uint32_t Value)Configure the RAM watchdog.
Source comment
name FDCAN_ConfigRamWatchdog.
fun Configure the RAM watchdog.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Value Start value of the Message RAM Watchdog Counter.
This parameter must be a number between 0x00 and 0xFF
return none
uint32_t FDCAN_CheckRestrictedMode(FDCAN_Module *FDCANx)Check if the FDCAN peripheral entered Restricted Operation Mode.
Source comment
name FDCAN_CheckRestrictedMode.
fun Check if the FDCAN peripheral entered Restricted Operation Mode.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return Status
- FDCAN_MODE_NORMAL : Normal FDCAN operation.
- FDCAN_MODE_RESTRICTED_OPERATION : Restricted Operation Mode active.
void FDCAN_ExitRestrictedMode(FDCAN_Module *FDCANx)Exit Restricted Operation Mode.
Source comment
name FDCAN_ExitRestrictedMode.
fun Exit Restricted Operation Mode.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_ConfigFilter(FDCAN_Module *FDCANx, FDCAN_FilterType *sFilterConfig)Configure the FDCAN reception filter according to the specified parameters in the FDCAN_FilterType structure.
Source comment
name FDCAN_ConfigFilter.
fun Configure the FDCAN reception filter according to the specified
parameters in the FDCAN_FilterType structure.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param sFilterConfig pointer to an FDCAN_FilterTypeDef structure
- IdType
- FDCAN_STANDARD_ID
- FDCAN_EXTENDED_ID
- FilterIndex
This parameter must be a value between:
- 0 and 127, if IdType is FDCAN_STANDARD_ID
- 0 and 63, if IdType is FDCAN_EXTENDED_ID
- FilterType
- FDCAN_FILTER_RANGE
- FDCAN_FILTER_DUAL
- FDCAN_FILTER_MASK
- FDCAN_FILTER_RANGE_NO_EIDM
- FilterConfig
-FDCAN_FILTER_DISABLE
-FDCAN_FILTER_TO_RXFIFO0
-FDCAN_FILTER_TO_RXFIFO1
-FDCAN_FILTER_REJECT
-FDCAN_FILTER_HP
-FDCAN_FILTER_TO_RXFIFO0_HP
-FDCAN_FILTER_TO_RXFIFO1_HP
-FDCAN_FILTER_TO_RXBUFFER
- FilterID1
This parameter must be a value between:
- 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID
- 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID
- FilterID2
This parameter must be a value between:
- 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID
- 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID
This parameter is ignored if FilterConfig is set to FDCAN_FILTER_TO_RXBUFFER
- RxBufferIndex
This parameter must be a value between 0 and 63.
And it is ignored if FilterConfig is not FDCAN_FILTER_TO_RXBUFFER
return none
void FDCAN_ConfigGlobalFilter(FDCAN_Module *FDCANx, uint32_t NonMatchingStd, uint32_t NonMatchingExt, uint32_t RejectRemoteStd, uint32_t RejectRemoteExt)Configure the FDCAN global filter.
Source comment
name FDCAN_ConfigGlobalFilter.
fun Configure the FDCAN global filter.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param NonMatchingStd :
- FDCAN_ACCEPT_STD_IN_RX_FIFO0
- FDCAN_ACCEPT_STD_IN_RX_FIFO1
- FDCAN_REJECT_STD
param NonMatchingExt :
- FDCAN_ACCEPT_EXT_IN_RX_FIFO0
- FDCAN_ACCEPT_EXT_IN_RX_FIFO1
- FDCAN_REJECT_EXT
param RejectRemoteStd :
- FDCAN_FILTER_STD_REMOTE
- FDCAN_REJECT_STD_REMOTE
param RejectRemoteExt :
- FDCAN_FILTER_EXT_REMOTE
- FDCAN_REJECT_EXT_REMOTE
return
void FDCAN_ConfigExtIdMask(FDCAN_Module *FDCANx, uint32_t Mask)CConfigure the extended ID mask.
Source comment
name FDCAN_ConfigExtIdMask.
fun CConfigure the extended ID mask.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Mask :Extended ID Mask.
This parameter must be a number between 0 and 0x1FFFFFFF
return none
void FDCAN_ConfigRxFifoMode(FDCAN_Module *FDCANx, uint32_t RxFifo, uint32_t Mode)Configure the Rx FIFO operation mode.
Source comment
name FDCAN_ConfigRxFifoMode.
fun Configure the Rx FIFO operation mode.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param RxFifo
- FDCAN_RX_FIFO0
- FDCAN_RX_FIFO1
param Mode
- FDCAN_RX_FIFO_BLOCKING
- FDCAN_RX_FIFO_OVERWRITE
return none
void FDCAN_ConfigFifoWatermark(FDCAN_Module *FDCANx, uint32_t FIFO, uint32_t Watermark)Configure the Tx/RX FIFO watermark.
Source comment
name FDCAN_ConfigFifoWatermark.
fun Configure the Tx/RX FIFO watermark.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param FIFO
- FDCAN_RX_FIFO0
- FDCAN_RX_FIFO1
- FDCAN_TX_EVENT_FIFO
param Watermark level for FIFO watermark interrupt.
This parameter must be a number between:
- 0 and 32, if FIFO is FDCAN_TX_EVENT_FIFO
- 0 and 64, if FIFO is FDCAN_RX_FIFO0 or FDCAN_RX_FIFO1
return none
uint32_t FDCAN_GetRxFifoFillLevel(FDCAN_Module *FDCANx, uint32_t RxFifo)Return Rx FIFO fill level.
Source comment
name FDCAN_GetRxFifoFillLevel.
fun Return Rx FIFO fill level.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param RxFifo :
- FDCAN_RX_FIFO0
- FDCAN_RX_FIFO1
return Rx FIFO fill level.
ErrorStatus FDCAN_GetRxMsg(FDCAN_Module *FDCANx, uint32_t RxLocation, FDCAN_RxHeaderType *pRxHeader, uint8_t *pRxData)Get an FDCAN frame from the Rx Buffer/FIFO zone into the message RAM.
Source comment
name FDCAN_GetRxMsg.
fun Get an FDCAN frame from the Rx Buffer/FIFO zone into the message RAM.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param RxLocation :
- FDCAN_RX_FIFO0
- FDCAN_RX_FIFO1
- FDCAN_RX_BUFFER0
- FDCAN_RX_BUFFER1
- FDCAN_RX_BUFFER2
- FDCAN_RX_BUFFER3
- FDCAN_RX_BUFFER4
- FDCAN_RX_BUFFER5
- FDCAN_RX_BUFFER6
- FDCAN_RX_BUFFER7
- FDCAN_RX_BUFFER8
- FDCAN_RX_BUFFER9
- FDCAN_RX_BUFFER10
- FDCAN_RX_BUFFER11
- FDCAN_RX_BUFFER12
- FDCAN_RX_BUFFER13
- FDCAN_RX_BUFFER14
- FDCAN_RX_BUFFER15
- FDCAN_RX_BUFFER16
- FDCAN_RX_BUFFER17
- FDCAN_RX_BUFFER18
- FDCAN_RX_BUFFER19
- FDCAN_RX_BUFFER20
- FDCAN_RX_BUFFER21
- FDCAN_RX_BUFFER22
- FDCAN_RX_BUFFER23
- FDCAN_RX_BUFFER24
- FDCAN_RX_BUFFER25
- FDCAN_RX_BUFFER26
- FDCAN_RX_BUFFER27
- FDCAN_RX_BUFFER28
- FDCAN_RX_BUFFER29
- FDCAN_RX_BUFFER30
- FDCAN_RX_BUFFER31
- FDCAN_RX_BUFFER32
- FDCAN_RX_BUFFER33
- FDCAN_RX_BUFFER34
- FDCAN_RX_BUFFER35
- FDCAN_RX_BUFFER36
- FDCAN_RX_BUFFER37
- FDCAN_RX_BUFFER38
- FDCAN_RX_BUFFER39
- FDCAN_RX_BUFFER40
- FDCAN_RX_BUFFER41
- FDCAN_RX_BUFFER42
- FDCAN_RX_BUFFER43
- FDCAN_RX_BUFFER44
- FDCAN_RX_BUFFER45
- FDCAN_RX_BUFFER46
- FDCAN_RX_BUFFER47
- FDCAN_RX_BUFFER48
- FDCAN_RX_BUFFER49
- FDCAN_RX_BUFFER50
- FDCAN_RX_BUFFER51
- FDCAN_RX_BUFFER52
- FDCAN_RX_BUFFER53
- FDCAN_RX_BUFFER54
- FDCAN_RX_BUFFER55
- FDCAN_RX_BUFFER56
- FDCAN_RX_BUFFER57
- FDCAN_RX_BUFFER58
- FDCAN_RX_BUFFER59
- FDCAN_RX_BUFFER60
- FDCAN_RX_BUFFER61
- FDCAN_RX_BUFFER62
- FDCAN_RX_BUFFER63
param pRxHeader :pointer to a FDCAN_RxHeaderType structure.
- IdType
- FDCAN_STANDARD_ID
- FDCAN_EXTENDED_ID
- ID
This parameter must be a value between:
- 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID
- 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID
- RxFrameType
- FDCAN_DATA_FRAME
- FDCAN_REMOTE_FRAME
- DataLength
- FDCAN_DLC_BYTES_0
- FDCAN_DLC_BYTES_1
- FDCAN_DLC_BYTES_2
- FDCAN_DLC_BYTES_3
- FDCAN_DLC_BYTES_4
- FDCAN_DLC_BYTES_5
- FDCAN_DLC_BYTES_6
- FDCAN_DLC_BYTES_7
- FDCAN_DLC_BYTES_8
- FDCAN_DLC_BYTES_12
- FDCAN_DLC_BYTES_16
- FDCAN_DLC_BYTES_20
- FDCAN_DLC_BYTES_24
- FDCAN_DLC_BYTES_32
- FDCAN_DLC_BYTES_48
- FDCAN_DLC_BYTES_64
- ErrorState
- FDCAN_ESI_ACTIVE
- FDCAN_ESI_PASSIVE
- BitRateSwitch
- FDCAN_BRS_OFF
- FDCAN_BRS_ON
- FDFormat
- FDCAN_CLASSIC_CAN
- FDCAN_FD_CAN
- RxTimestamp
This parameter must be a value between 0 and 0xFFFF
- FilterIndex
This parameter must be a value between:
- 0 and 127, if IdType is FDCAN_STANDARD_ID
- 0 and 63, if IdType is FDCAN_EXTENDED_ID
- Matching
- FDCAN_ACCEPT_MACHING_FIDX
- FDCAN_ACCEPT_NON_MATCHING
param pRxData :pointer to a buffer containing the payload of the Rx frame.
return ErrorStatus
- SUCCESS
- ERROR
void FDCAN_GetHpMsgStatus(FDCAN_Module *FDCANx, FDCAN_HpMsgStatus *HpMsgStatus)Get high priority message status.
Source comment
name FDCAN_GetHpMsgStatus.
fun Get high priority message status.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param HpMsgStatus pointer to an FDCAN_HpMsgStatus structure.
- FilterList
- FDCAN_HP_STANDARD_FILTER_LIST
- FDCAN_HP_EXTENDED_FILTER_LIST
- FilterIndex
This parameter can be a value between:
- 0 and 127, if FilterList is FDCAN_HP_STANDARD_FILTER_LIST
- 0 and 63, if FilterList is FDCAN_HP_EXTENDED_FILTER_LIST
- MsgStore
- FDCAN_HP_STORAGE_NO_FIFO
- FDCAN_HP_STORAGE_MSG_LOST
- FDCAN_HP_STORAGE_RXFIFO0
- FDCAN_HP_STORAGE_RXFIFO1
- MsgIndex
- FDCAN_HP_STORAGE_RXFIFO0
- FDCAN_HP_STORAGE_RXFIFO1
return none
FlagStatus FDCAN_CheckNewRxBufMsg(FDCAN_Module *FDCANx, uint32_t Index)Check if a new message is received in the selected Rx buffer.
Source comment
name FDCAN_CheckNewRxBufMsg.
fun Check if a new message is received in the selected Rx buffer.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Index Rx buffer index.
- FDCAN_RX_BUFFER0
- FDCAN_RX_BUFFER1
- FDCAN_RX_BUFFER2
- FDCAN_RX_BUFFER3
- FDCAN_RX_BUFFER4
- FDCAN_RX_BUFFER5
- FDCAN_RX_BUFFER6
- FDCAN_RX_BUFFER7
- FDCAN_RX_BUFFER8
- FDCAN_RX_BUFFER9
- FDCAN_RX_BUFFER10
- FDCAN_RX_BUFFER11
- FDCAN_RX_BUFFER12
- FDCAN_RX_BUFFER13
- FDCAN_RX_BUFFER14
- FDCAN_RX_BUFFER15
- FDCAN_RX_BUFFER16
- FDCAN_RX_BUFFER17
- FDCAN_RX_BUFFER18
- FDCAN_RX_BUFFER19
- FDCAN_RX_BUFFER20
- FDCAN_RX_BUFFER21
- FDCAN_RX_BUFFER22
- FDCAN_RX_BUFFER23
- FDCAN_RX_BUFFER24
- FDCAN_RX_BUFFER25
- FDCAN_RX_BUFFER26
- FDCAN_RX_BUFFER27
- FDCAN_RX_BUFFER28
- FDCAN_RX_BUFFER29
- FDCAN_RX_BUFFER30
- FDCAN_RX_BUFFER31
- FDCAN_RX_BUFFER32
- FDCAN_RX_BUFFER33
- FDCAN_RX_BUFFER34
- FDCAN_RX_BUFFER35
- FDCAN_RX_BUFFER36
- FDCAN_RX_BUFFER37
- FDCAN_RX_BUFFER38
- FDCAN_RX_BUFFER39
- FDCAN_RX_BUFFER40
- FDCAN_RX_BUFFER41
- FDCAN_RX_BUFFER42
- FDCAN_RX_BUFFER43
- FDCAN_RX_BUFFER44
- FDCAN_RX_BUFFER45
- FDCAN_RX_BUFFER46
- FDCAN_RX_BUFFER47
- FDCAN_RX_BUFFER48
- FDCAN_RX_BUFFER49
- FDCAN_RX_BUFFER50
- FDCAN_RX_BUFFER51
- FDCAN_RX_BUFFER52
- FDCAN_RX_BUFFER53
- FDCAN_RX_BUFFER54
- FDCAN_RX_BUFFER55
- FDCAN_RX_BUFFER56
- FDCAN_RX_BUFFER57
- FDCAN_RX_BUFFER58
- FDCAN_RX_BUFFER59
- FDCAN_RX_BUFFER60
- FDCAN_RX_BUFFER61
- FDCAN_RX_BUFFER62
- FDCAN_RX_BUFFER63
return FlagStatus
- RESET : No new message on RxBufferIndex.
- SET : New message received on RxBufferIndex.
void FDCAN_ConfigTSPrescaler(FDCAN_Module *FDCANx, uint32_t Prescaler)Configure the timestamp counter Prescaler.
Source comment
name FDCAN_ConfigTSPrescaler.
fun Configure the timestamp counter Prescaler.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Prescaler
- FDCAN_TIMESTAMP_PRESC_1
- FDCAN_TIMESTAMP_PRESC_2
- FDCAN_TIMESTAMP_PRESC_3
- FDCAN_TIMESTAMP_PRESC_4
- FDCAN_TIMESTAMP_PRESC_5
- FDCAN_TIMESTAMP_PRESC_6
- FDCAN_TIMESTAMP_PRESC_7
- FDCAN_TIMESTAMP_PRESC_8
- FDCAN_TIMESTAMP_PRESC_9
- FDCAN_TIMESTAMP_PRESC_10
- FDCAN_TIMESTAMP_PRESC_11
- FDCAN_TIMESTAMP_PRESC_12
- FDCAN_TIMESTAMP_PRESC_13
- FDCAN_TIMESTAMP_PRESC_14
- FDCAN_TIMESTAMP_PRESC_15
- FDCAN_TIMESTAMP_PRESC_16
return none
void FDCAN_Config_TS(FDCAN_Module *FDCANx, uint32_t Select)Config the timestamp mode.
Source comment
name FDCAN_Config_TS.
fun Config the timestamp mode.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Select
- FDCAN_TIMESTAMP_DISABLE
- FDCAN_TIMESTAMP_INTERNAL
- FDCAN_TIMESTAMP_EXTERNAL
return none
uint16_t FDCAN_Get_TS(FDCAN_Module *FDCANx)Get the timestamp counter value.
Source comment
name FDCAN_Get_TS.
fun Get the timestamp counter value.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return Value Timestamp counter value
void FDCAN_Reset_TS(FDCAN_Module *FDCANx)Reset the internal timestamp counter to zero.
Source comment
name FDCAN_Reset_TS.
fun Reset the internal timestamp counter to zero.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_ConfigExtTSDivider(FDCAN_Module *FDCANx, uint32_t Div)Config the clock diveder of external timestamp clock.
Source comment
name FDCAN_ConfigExtTSDivider.
fun Config the clock diveder of external timestamp clock.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Div :
- FDCAN_EXT_TIMESTAMP_DIV_4
- FDCAN_EXT_TIMESTAMP_DIV_8
- FDCAN_EXT_TIMESTAMP_DIV_16
- FDCAN_EXT_TIMESTAMP_DIV_32
- FDCAN_EXT_TIMESTAMP_DIV_64
- FDCAN_EXT_TIMESTAMP_DIV_128
- FDCAN_EXT_TIMESTAMP_DIV_256
- FDCAN_EXT_TIMESTAMP_DIV_512
return none
void FDCAN_EnableExtTS(FDCAN_Module *FDCANx, FunctionalState Cmd)Enalbe or disable the external timestamp.
Source comment
name FDCAN_EnableExtTS.
fun Enalbe or disable the external timestamp.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Cmd :
- ENABLE
- DISABLE
return none
void FDCAN_ConfigTimeoutCounter(FDCAN_Module *FDCANx, uint32_t TimeoutSelect, uint32_t TimeoutPeriod)Configure the timeout counter.
Source comment
name FDCAN_ConfigTimeoutCounter.
fun Configure the timeout counter.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param TimeoutSelect :
- FDCAN_TIMEOUT_CONTINUOUS
- FDCAN_TIMEOUT_TX_EVENT_FIFO
- FDCAN_TIMEOUT_RX_FIFO0
- FDCAN_TIMEOUT_RX_FIFO1
param TimeoutPeriod :Start value of the timeout down-counter.
This parameter must be a number between 0x0000 and 0xFFFF
return none
void FDCAN_EnableTimeoutCounter(FDCAN_Module *FDCANx)Enable the timeout counter.
Source comment
name FDCAN_EnableTimeoutCounter.
fun Enable the timeout counter.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_DisableTimeoutCounter(FDCAN_Module *FDCANx)Disable the timeout counter.
Source comment
name FDCAN_DisableTimeoutCounter.
fun Disable the timeout counter.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
uint16_t FDCAN_GetTimeoutCounter(FDCAN_Module *FDCANx)Get the timeout counter value.
Source comment
name FDCAN_GetTimeoutCounter.
fun Get the timeout counter value.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return Timeout counter value
void FDCAN_ResetTimeoutCounter(FDCAN_Module *FDCANx)Reset the timeout counter to its start value.
Source comment
name FDCAN_ResetTimeoutCounter.
fun Reset the timeout counter to its start value.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_ConfigTxDelayCompensation(FDCAN_Module *FDCANx, uint32_t Offset, uint32_t Filter)Configure the transmitter delay compensation.
Source comment
name FDCAN_ConfigTxDelayCompensation.
fun Configure the transmitter delay compensation.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Offset :Transmitter Delay Compensation Offset.
This parameter must be a number between 0x00 and 0x7F.
param Filter :Transmitter Delay Compensation Filter Window Length.
This parameter must be a number between 0x00 and 0x7F.
return none
void FDCAN_EnableTxDelayCompensation(FDCAN_Module *FDCANx)Enable the transmitter delay compensation.
Source comment
name FDCAN_EnableTxDelayCompensation.
fun Enable the transmitter delay compensation.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
void FDCAN_DisableTxDelayCompensation(FDCAN_Module *FDCANx)Disable the transmitter delay compensation.
Source comment
name FDCAN_DisableTxDelayCompensation.
fun Disable the transmitter delay compensation.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return none
ErrorStatus FDCAN_AddMsgToTxFifoQ(FDCAN_Module *FDCANx, FDCAN_TxHeaderType *pTxHeader, uint8_t *pTxData)Add a message to the Tx FIFO/Queue and activate the corresponding transmission request
Source comment
name FDCAN_AddMsgToTxFifoQ.
fun Add a message to the Tx FIFO/Queue and activate the corresponding transmission request
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param pTxHeader :pointer to a FDCAN_TxHeaderType structure.
- IdType
- FDCAN_STANDARD_ID
- FDCAN_EXTENDED_ID
- ID
This parameter must be a value between:
- 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID
- 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID
- TxFrameType
- FDCAN_DATA_FRAME
- FDCAN_REMOTE_FRAME
- DataLength
- FDCAN_DLC_BYTES_0
- FDCAN_DLC_BYTES_1
- FDCAN_DLC_BYTES_2
- FDCAN_DLC_BYTES_3
- FDCAN_DLC_BYTES_4
- FDCAN_DLC_BYTES_5
- FDCAN_DLC_BYTES_6
- FDCAN_DLC_BYTES_7
- FDCAN_DLC_BYTES_8
- FDCAN_DLC_BYTES_12
- FDCAN_DLC_BYTES_16
- FDCAN_DLC_BYTES_20
- FDCAN_DLC_BYTES_24
- FDCAN_DLC_BYTES_32
- FDCAN_DLC_BYTES_48
- FDCAN_DLC_BYTES_64
- ErrorState
- FDCAN_ESI_ACTIVE
- FDCAN_ESI_PASSIVE
- BitRateSwitch
- FDCAN_BRS_OFF
- FDCAN_BRS_ON
- FDFormat
- FDCAN_CLASSIC_CAN
- FDCAN_FD_CAN
- TxEventFifo
- FDCAN_NO_TX_EVENTS
- FDCAN_STORE_TX_EVENTS
- MsgMarker
This parameter must be a value between 0 and 0xFF
param pTxData :pointer to a buffer containing the payload of the Tx frame.
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_AddMsgToTxBuffer(FDCAN_Module *FDCANx, FDCAN_TxHeaderType *pTxHeader, uint8_t *pTxData, uint32_t BufferIndex)Add a message to a dedicated Tx buffer
Source comment
name FDCAN_AddMsgToTxBuffer.
fun Add a message to a dedicated Tx buffer
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param pTxHeader :pointer to a FDCAN_TxHeaderType structure.
- IdType
- FDCAN_STANDARD_ID
- FDCAN_EXTENDED_ID
- ID
This parameter must be a value between:
- 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID
- 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID
- TxFrameType
- FDCAN_DATA_FRAME
- FDCAN_REMOTE_FRAME
- DataLength
- FDCAN_DLC_BYTES_0
- FDCAN_DLC_BYTES_1
- FDCAN_DLC_BYTES_2
- FDCAN_DLC_BYTES_3
- FDCAN_DLC_BYTES_4
- FDCAN_DLC_BYTES_5
- FDCAN_DLC_BYTES_6
- FDCAN_DLC_BYTES_7
- FDCAN_DLC_BYTES_8
- FDCAN_DLC_BYTES_12
- FDCAN_DLC_BYTES_16
- FDCAN_DLC_BYTES_20
- FDCAN_DLC_BYTES_24
- FDCAN_DLC_BYTES_32
- FDCAN_DLC_BYTES_48
- FDCAN_DLC_BYTES_64
- ErrorState
- FDCAN_ESI_ACTIVE
- FDCAN_ESI_PASSIVE
- BitRateSwitch
- FDCAN_BRS_OFF
- FDCAN_BRS_ON
- FDFormat
- FDCAN_CLASSIC_CAN
- FDCAN_FD_CAN
- TxEventFifo
- FDCAN_NO_TX_EVENTS
- FDCAN_STORE_TX_EVENTS
- MsgMarker
This parameter must be a value between 0 and 0xFF
param pTxData :pointer to a buffer containing the payload of the Tx frame.
param BufferIndex :
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
return ErrorStatus
- SUCCESS
- ERROR
void FDCAN_EnableTxBufferRequest(FDCAN_Module *FDCANx, uint32_t BufferIndex)Enable transmission request.
Source comment
name FDCAN_EnableTxBufferRequest.
fun Enable transmission request.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param BufferIndex :
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
return none
uint32_t FDCAN_GetLastTxFifoQReqBuf(FDCAN_Module *FDCANx)Get Tx buffer index of latest Tx FIFO/Queue request.
Source comment
name FDCAN_GetLastTxFifoQReqBuf.
fun Get Tx buffer index of latest Tx FIFO/Queue request.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return Tx buffer index of last Tx FIFO/Queue request
- 0: no Tx FIFO/Queue request have been submitted
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
void FDCAN_AbortTxRequest(FDCAN_Module *FDCANx, uint32_t BufferIndex)Abort transmission request.
Source comment
name FDCAN_AbortTxRequest.
fun Abort transmission request.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param BufferIndex :
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
return none
ErrorStatus FDCAN_GetTxEvent(FDCAN_Module *FDCANx, FDCAN_TxEventFifoType *pTxEvent)Get an FDCAN Tx event from the Tx Event FIFO zone into the message RAM.
Source comment
name FDCAN_GetTxEvent.
fun Get an FDCAN Tx event from the Tx Event FIFO zone into the message RAM.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param pTxEvent pointer to a FDCAN_TxEventFifoType structure.
- IdType
- FDCAN_STANDARD_ID
- FDCAN_EXTENDED_ID
- ID
This parameter must be a value between:
- 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID
- 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID
- TxFrameType
- FDCAN_DATA_FRAME
- FDCAN_REMOTE_FRAME
- DataLength
- FDCAN_DLC_BYTES_0
- FDCAN_DLC_BYTES_1
- FDCAN_DLC_BYTES_2
- FDCAN_DLC_BYTES_3
- FDCAN_DLC_BYTES_4
- FDCAN_DLC_BYTES_5
- FDCAN_DLC_BYTES_6
- FDCAN_DLC_BYTES_7
- FDCAN_DLC_BYTES_8
- FDCAN_DLC_BYTES_12
- FDCAN_DLC_BYTES_16
- FDCAN_DLC_BYTES_20
- FDCAN_DLC_BYTES_24
- FDCAN_DLC_BYTES_32
- FDCAN_DLC_BYTES_48
- FDCAN_DLC_BYTES_64
- ErrorState
- FDCAN_ESI_ACTIVE
- FDCAN_ESI_PASSIVE
- BitRateSwitch;
- FDCAN_BRS_OFF
- FDCAN_BRS_ON
- FDFormat;
- FDCAN_CLASSIC_CAN
- FDCAN_FD_CAN
- TxTimestamp;
This parameter must be a value between 0 and 0xFFFF
- MsgMarker;
This parameter must be a value between 0 and 0xFF
- EventType;
- FDCAN_TX_EVENT
- FDCAN_TX_IN_SPITE_OF_ABORT
return ErrorStatus
- SUCCESS
- ERROR
FlagStatus FDCAN_CheckTxBufRequest(FDCAN_Module *FDCANx, uint32_t IndexBit)Check if a transmission request is pending on the selected Tx buffer.
Source comment
name FDCAN_CheckTxBufRequest.
fun Check if a transmission request is pending on the selected Tx buffer.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param IndexBit Rx buffer index bit.
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
return FlagStatus
- RESET : No request pending on TxBufferIndex.
- SET : Have request pending on TxBufferIndex.
FlagStatus FDCAN_CheckBufTxResult(FDCAN_Module *FDCANx, uint32_t IndexBit)Check if a transmission is sent or not.
Source comment
name FDCAN_CheckBufTxResult.
fun Check if a transmission is sent or not.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param IndexBit Rx buffer index bit.
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
return FlagStatus
- RESET : Transmission is not finished or cacelled.
- SET : Transmission is finished.
FlagStatus FDCAN_CheckBufTxCancel(FDCAN_Module *FDCANx, uint32_t IndexBit)Check if a transmission is cancelled.
Source comment
name FDCAN_CheckBufTxCancel.
fun Check if a transmission is cancelled.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param IndexBit Rx buffer index bit.
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
return FlagStatus
- RESET : Transmission is not cacelled.
- SET : Transmission is cacelled.
uint32_t FDCAN_GetTxFifoFreeLevel(FDCAN_Module *FDCANx)Return Tx FIFO free level: number of consecutive free Tx FIFO.
Source comment
name FDCAN_GetTxFifoFreeLevel.
fun Return Tx FIFO free level: number of consecutive free Tx FIFO.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
return Tx FIFO free level.
ErrorStatus FDCAN_TT_Init(FDCAN_Module *FDCANx, FDCAN_TT_InitType *pTTParams)Initialize TT operation parameters.
Source comment
name FDCAN_TT_Init.
fun Initialize TT operation parameters.
param FDCANx :
- FDCAN1
- FDCAN2
param pTTParams pointer to a FDCAN_TT_InitType structure.
- uint32_t OperationMode
- FDCAN_TT_COMMUNICATION_LEVEL1
- FDCAN_TT_COMMUNICATION_LEVEL2
- FDCAN_TT_COMMUNICATION_LEVEL0
- uint32_t GapEnable
- FDCAN_STRICTLY_TT_OPERATION
- FDCAN_EXT_EVT_SYNC_TT_OPERATION
- uint32_t TimeMaster
- FDCAN_TT_SLAVE
- FDCAN_TT_POTENTIAL_MASTER
- uint32_t SyncDevLimit
This parameter must be a value between 0 and 7
- uint32_t InitRefTrigOffset
This parameter must be a value between 0 and 127
- uint32_t ExternalClkSync
- FDCAN_TT_EXT_CLK_SYNC_DISABLE
- FDCAN_TT_EXT_CLK_SYNC_ENABLE
This parameter is ignored if OperationMode is FDCAN_TT_COMMUNICATION_LEVEL1
- uint32_t AppWdgLimit
This parameter must be a value between 0 and 255.
This parameter is ignored if OperationMode is FDCAN_TT_COMMUNICATION_LEVEL0
- uint32_t GlobalTimeFilter
- FDCAN_TT_GLOB_TIME_FILT_DISABLE
- FDCAN_TT_GLOB_TIME_FILT_ENABLE
This parameter is ignored if OperationMode is set to FDCAN_TT_COMMUNICATION_LEVEL1
- uint32_t ClockCalibration
- FDCAN_TT_AUTO_CLK_CALIB_DISABLE
- FDCAN_TT_AUTO_CLK_CALIB_ENABLE
This parameter is ignored if OperationMode is set to FDCAN_TT_COMMUNICATION_LEVEL1
- uint32_t EvtTrigPolarity
- FDCAN_TT_EVT_TRIG_POL_RISING
- FDCAN_TT_EVT_TRIG_POL_FALLING
This parameter is ignored if OperationMode is set to FDCAN_TT_COMMUNICATION_LEVEL0
- uint32_t BasicCycles
- FDCAN_TT_CYCLES_PER_MATRIX_1
- FDCAN_TT_CYCLES_PER_MATRIX_2
- FDCAN_TT_CYCLES_PER_MATRIX_4
- FDCAN_TT_CYCLES_PER_MATRIX_8
- FDCAN_TT_CYCLES_PER_MATRIX_16
- FDCAN_TT_CYCLES_PER_MATRIX_32
- FDCAN_TT_CYCLES_PER_MATRIX_64
- uint32_t CycleStartSync
- FDCAN_TT_NO_SYNC_PULSE
- FDCAN_TT_SYNC_BASIC_CYCLE_START
- FDCAN_TT_SYNC_MATRIX_START
- uint32_t TxEnableWindow
This parameter must be a value between 1 and 16
- uint32_t ExpTxTrigSize
This parameter must be a value between 0 and 4095
- uint32_t TURNumerator
This parameter must be a value between 0x10000 and 0x1FFFF
- uint32_t TURDenominator
This parameter must be a value between 0x0001 and 0x3FFF
- uint32_t TrigMemorySize
This parameter must be a value between 0 and 64
- uint32_t StopWatchTrigSel
- FDCAN_TT_STOP_WATCH_TRIGGER_0
- FDCAN_TT_STOP_WATCH_TRIGGER_1
- FDCAN_TT_STOP_WATCH_TRIGGER_2
- FDCAN_TT_STOP_WATCH_TRIGGER_3
- uint32_t EventTrigSel
- FDCAN_TT_EVENT_TRIGGER_0
- FDCAN_TT_EVENT_TRIGGER_1
- FDCAN_TT_EVENT_TRIGGER_2
- FDCAN_TT_EVENT_TRIGGER_3
return ErrorStatus
- SUCCESS
- ERROR
void FDCAN_TT_ConfigRefMsg(FDCAN_Module *FDCANx, uint32_t IdType, uint32_t ID, uint32_t Payload)Configure the reference message.
Source comment
name FDCAN_TT_ConfigRefMsg.
fun Configure the reference message.
param FDCANx :
- FDCAN1
- FDCAN2
param IdType :
- FDCAN_STANDARD_ID
- FDCAN_EXTENDED_ID
param ID Reference Identifier.
This parameter must be a number between:
- 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID
- 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID
param Payload Enable or disable the additional payload.
- FDCAN_TT_REF_MSG_NO_PAYLOAD
- FDCAN_TT_REF_MSG_ADD_PAYLOAD
return none
void FDCAN_TT_ConfigTrigger(FDCAN_Module *FDCANx, FDCAN_TriggerType *sTriggerConfig)Configure the FDCAN trigger according to the specified parameters in the FDCAN_TriggerType structure.
Source comment
name FDCAN_TT_ConfigTrigger.
fun Configure the FDCAN trigger according to the specified parameters
in the FDCAN_TriggerType structure.
param FDCANx :
- FDCAN1
- FDCAN2
param sTriggerConfig :pointer to an FDCAN_TriggerType structure
- TriggerIndex
This parameter must be a number between 0 and 63
- TimeMark
This parameter must be a number between 0 and 0xFFFF
- RepeatFactor
- FDCAN_TT_REPEAT_EVERY_CYCLE
- FDCAN_TT_REPEAT_EVERY_2ND_CYCLE
- FDCAN_TT_REPEAT_EVERY_4TH_CYCLE
- FDCAN_TT_REPEAT_EVERY_8TH_CYCLE
- FDCAN_TT_REPEAT_EVERY_16TH_CYCLE
- FDCAN_TT_REPEAT_EVERY_32ND_CYCLE
- FDCAN_TT_REPEAT_EVERY_64TH_CYCLE
- StartCycle
This parameter must be a value between 0 and RepeatFactor.
This parameter is ignored if RepeatFactor is set to FDCAN_TT_REPEAT_EVERY_CYCLE.
- TmEventInt
- FDCAN_TT_TM_NO_INTERNAL_EVENT
- FDCAN_TT_TM_GEN_INTERNAL_EVENT
- TmEventExt
- FDCAN_TT_TM_NO_EXTERNAL_EVENT
- FDCAN_TT_TM_GEN_EXTERNAL_EVENT
- TriggerType;
- FDCAN_TT_TX_REF_TRIGGER
- FDCAN_TT_TX_REF_TRIGGER_GAP
- FDCAN_TT_TX_TRIGGER_SINGLE
- FDCAN_TT_TX_TRIGGER_CONTINUOUS
- FDCAN_TT_TX_TRIGGER_ARBITRATION
- FDCAN_TT_TX_TRIGGER_MERGED
- FDCAN_TT_WATCH_TRIGGER
- FDCAN_TT_WATCH_TRIGGER_GAP
- FDCAN_TT_RX_TRIGGER
- FDCAN_TT_TIME_BASE_TRIGGER
- FDCAN_TT_END_OF_LIST
- FilterType
- FDCAN_STANDARD_ID
- FDCAN_EXTENDED_ID
- TxBufferIndex
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
- FilterIndex
This parameter must be a number between:
- 0 and 127, if FilterType is FDCAN_STANDARD_ID
- 0 and 63, if FilterType is FDCAN_EXTENDED_ID
return none
ErrorStatus FDCAN_TT_SetGlobalTime(FDCAN_Module *FDCANx, uint32_t TimePreset)Schedule global time adjustment for the next reference message.
Source comment
name FDCAN_TT_SetGlobalTime.
fun Schedule global time adjustment for the next reference message.
param FDCANx :
- FDCAN1
- FDCAN2
param TimePreset :time preset value.
This parameter must be a number between:
- 0x0000 and 0x7FFF, Next_Master_Ref_Mark = Current_Master_Ref_Mark + TimePreset
or
- 0x8001 and 0xFFFF, Next_Master_Ref_Mark = Current_Master_Ref_Mark - (0x10000 - TimePreset)
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_SetClockSync(FDCAN_Module *FDCANx, uint32_t NewTURNumerator)Schedule TUR numerator update for the next reference message.
Source comment
name FDCAN_TT_SetClockSync.
fun Schedule TUR numerator update for the next reference message.
param FDCANx :
- FDCAN1
- FDCAN2
param NewTURNumerator :new value of the TUR numerator.
This parameter must be a number between 0x10000 and 0x1FFFF.
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_ConfigStopWatch(FDCAN_Module *FDCANx, uint32_t Source, uint32_t Polarity)Configure stop watch source and polarity.
Source comment
name FDCAN_TT_ConfigStopWatch.
fun Configure stop watch source and polarity.
param FDCANx :
- FDCAN1
- FDCAN2
param Source :
- FDCAN_TT_STOP_WATCH_DISABLED
- FDCAN_TT_STOP_WATCH_CYCLE_TIME
- FDCAN_TT_STOP_WATCH_LOCAL_TIME
- FDCAN_TT_STOP_WATCH_GLOBAL_TIME
param Polarity :
- FDCAN_TT_STOP_WATCH_RISING
- FDCAN_TT_STOP_WATCH_FALLING
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_ConfigRegTimeMark(FDCAN_Module *FDCANx, uint32_t TimeMarkSource, uint32_t TimeMarkValue, uint32_t RepeatFactor, uint32_t StartCycle)Configure register time mark pulse generation.
Source comment
name FDCAN_TT_ConfigRegTimeMark.
fun Configure register time mark pulse generation.
param FDCANx :
- FDCAN1
- FDCAN2
param TimeMarkSource :
- FDCAN_TT_REG_TIMEMARK_DIABLED
- FDCAN_TT_REG_TIMEMARK_CYCLE_TIME
- FDCAN_TT_REG_TIMEMARK_LOCAL_TIME
- FDCAN_TT_REG_TIMEMARK_GLOBAL_TIME
param TimeMarkValue :time mark value (reference).
This parameter must be a number between 0 and 0xFFFF.
param RepeatFactor :
- FDCAN_TT_REPEAT_EVERY_CYCLE
- FDCAN_TT_REPEAT_EVERY_2ND_CYCLE
- FDCAN_TT_REPEAT_EVERY_4TH_CYCLE
- FDCAN_TT_REPEAT_EVERY_8TH_CYCLE
- FDCAN_TT_REPEAT_EVERY_16TH_CYCLE
- FDCAN_TT_REPEAT_EVERY_32ND_CYCLE
- FDCAN_TT_REPEAT_EVERY_64TH_CYCLE
param StartCycle :index of the first cycle in which the time mark becomes valid.
This parameter is ignored if RepeatFactor is set to FDCAN_TT_REPEAT_EVERY_CYCLE.
This parameter must be a number between 0 and RepeatFactor.
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_EnableRegTMPulse(FDCAN_Module *FDCANx, FunctionalState Cmd)Enables or disables register time mark pulse generation.
Source comment
name FDCAN_TT_EnableRegTMPulse.
fun Enables or disables register time mark pulse generation.
param FDCANx :
- FDCAN1
- FDCAN2
param Cmd (The input parameters must be the following values):
- ENABLE
- DISABLE
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_EnableTrigTMPulse(FDCAN_Module *FDCANx, FunctionalState Cmd)Enables or disables trigger time mark pulse generation.
Source comment
name FDCAN_TT_EnableTrigTMPulse.
fun Enables or disables trigger time mark pulse generation.
param FDCANx :
- FDCAN1
- FDCAN2
param Cmd (The input parameters must be the following values):
- ENABLE
- DISABLE
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_EnableGapPinCtrl(FDCAN_Module *FDCANx, FunctionalState Cmd)Enables or disables gap control by input pin fdcan_evt.
Source comment
name FDCAN_TT_EnableGapPinCtrl.
fun Enables or disables gap control by input pin fdcan_evt.
param FDCANx :
- FDCAN1
- FDCAN2
param Cmd (The input parameters must be the following values):
- ENABLE
- DISABLE
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_EnableTMGapCtrl(FDCAN_Module *FDCANx, FunctionalState Cmd)Enables or disables gap control (finish only) by register time mark interrupt.
Source comment
name FDCAN_TT_EnableTMGapCtrl.
fun Enables or disables gap control (finish only) by register time mark interrupt.
param FDCANx :
- FDCAN1
- FDCAN2
param Cmd (The input parameters must be the following values):
- ENABLE
- DISABLE
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_SetNextIsGap(FDCAN_Module *FDCANx)Transmit next reference message with Next_is_Gap = “1”.
Source comment
name FDCAN_TT_SetNextIsGap.
fun Transmit next reference message with Next_is_Gap = "1".
param FDCANx :
- FDCAN1
- FDCAN2
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_SetEndOfGap(FDCAN_Module *FDCANx)Finish a Gap by requesting start of reference message.
Source comment
name FDCAN_TT_SetEndOfGap.
fun Finish a Gap by requesting start of reference message.
param FDCANx :
- FDCAN1
- FDCAN2
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_ConfigExtSyncPhase(FDCAN_Module *FDCANx, uint32_t TargetPhase)Configure target phase used for external synchronization by event trigger input pin.
Source comment
name FDCAN_TT_ConfigExtSyncPhase.
fun Configure target phase used for external synchronization by event
trigger input pin.
param FDCANx :
- FDCAN1
- FDCAN2
param TargetPhase :defines target value of cycle time when a rising edge
of fdcan_evt is expected.
This parameter must be a number between 0 and 0xFFFF.
return ErrorStatus
- SUCCESS
- ERROR
ErrorStatus FDCAN_TT_EnableExtSync(FDCAN_Module *FDCANx, FunctionalState Cmd)Enable or disable external schedule synchronization.
Source comment
name FDCAN_TT_EnableExtSync.
fun Enable or disable external schedule synchronization.
param FDCANx :
- FDCAN1
- FDCAN2
param Cmd (The input parameters must be the following values):
- ENABLE
- DISABLE
return ErrorStatus
- SUCCESS
- ERROR
void FDCAN_TT_GetStatus(FDCAN_Module *FDCANx, FDCAN_TT_Status *TTStatus)Get TT operation status.
Source comment
name FDCAN_TT_GetStatus.
fun Get TT operation status.
param FDCANx :
- FDCAN1
- FDCAN2
param TTStatus pointer to an FDCAN_TT_Status structure.
- ErrorLevel
- FDCAN_TT_NO_ERROR
- FDCAN_TT_WARNING
- FDCAN_TT_ERROR
- FDCAN_TT_SEVERE_ERROR
- MasterState
- FDCAN_TT_MASTER_OFF
- FDCAN_TT_TIME_SLAVE
- FDCAN_TT_BACKUP_TIME_MASTER
- FDCAN_TT_CURRENT_TIME_MASTER
- SyncState
- FDCAN_TT_OUT_OF_SYNC
- FDCAN_TT_SYNCHRONIZING
- FDCAN_TT_IN_GAP
- FDCAN_TT_IN_SCHEDULE
- GTimeQuality
- FDCAN_TT_GTIME_NOT_VALID
- FDCAN_TT_GTIME_IN_MASTER_PHASE
- ClockQuality
- FDCAN_TT_LOCAL_CLOCK_NOT_SYNC
- FDCAN_TT_SYNC_DEV_LESS_THAN_SDL
- RefTrigOffset
This parameter can be a number between 0 and 0xFF
- GTimeDiscPending
- FDCAN_TT_NO_GTIME_PENDING
- FDCAN_TT_WATI_GTIMESYNC_PRESENT
- GapFinished
- FDCAN_TT_GAP_RESET
- FDCAN_TT_GAP_FINISHED
- MasterPriority
This parameter can be a number between 0 and 0x7
- GapStarted
- FDCAN_TT_NO_GAP
- FDCAN_TT_GAP_STARTED
- WaitForEvt
- FDCAN_TT_GAP_NOT_ANNOUNCED
- FDCAN_TT_REF_MSG_RECEIVED
- AppWdgEvt
- FDCAN_TT_WATCHDOG_VALID
- FDCAN_TT_WATCHDOG_INVALID
- ECSPending
- FDCAN_TT_NO_EXT_CLOCK_SYNC
- FDCAN_TT_WAIT_EXT_CLOCK_SYNC
- PhaseLock
- FDCAN_TT_PHASE_OUT_OF_RANGE
- FDCAN_TT_PHASE_IN_RANGE
return none
FlagStatus FDCAN_GetFlag(FDCAN_Module *FDCANx, uint32_t Flag)Check whether the specified FDCAN flag is set or not.
Source comment
name FDCAN_GetFlag.
fun Check whether the specified FDCAN flag is set or not.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Flag :
- FDCAN_FLAG_RESERVED_ADDRESS_ACCESS
- FDCAN_FLAG_DATA_PROTOCOL_ERROR
- FDCAN_FLAG_ARB_PROTOCOL_ERROR
- FDCAN_FLAG_RAM_WATCHDOG
- FDCAN_FLAG_BUS_OFF
- FDCAN_FLAG_ERROR_WARNING
- FDCAN_FLAG_ERROR_PASSIVE
- FDCAN_FLAG_ERROR_LOGGING_OVERFLOW
- FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE
- FDCAN_FLAG_TIMEOUT_OCCURRED
- FDCAN_FLAG_RAM_ACCESS_FAILURE
- FDCAN_FLAG_TIMESTAMP_WRAPAROUND
- FDCAN_FLAG_TX_EVT_FIFO_ELT_LOST
- FDCAN_FLAG_TX_EVT_FIFO_FULL
- FDCAN_FLAG_TX_EVT_FIFO_WATERMARK
- FDCAN_FLAG_TX_EVT_FIFO_NEW_DATA
- FDCAN_FLAG_TX_FIFO_EMPTY
- FDCAN_FLAG_TX_ABORT_COMPLETE
- FDCAN_FLAG_TX_COMPLETE
- FDCAN_FLAG_RX_HIGH_PRIORITY_MSG
- FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST
- FDCAN_FLAG_RX_FIFO1_FULL
- FDCAN_FLAG_RX_FIFO1_WATERMARK
- FDCAN_FLAG_RX_FIFO1_NEW_MESSAGE
- FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST
- FDCAN_FLAG_RX_FIFO0_FULL
- FDCAN_FLAG_RX_FIFO0_WATERMARK
- FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE
return FlagStatus
- RESET
- SET
void FDCAN_ClearFlag(FDCAN_Module *FDCANx, uint32_t Flag)Clear the specified FDCAN flags.
Source comment
name FDCAN_ClearFlag.
fun Clear the specified FDCAN flags.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Flag :
- FDCAN_FLAG_RESERVED_ADDRESS_ACCESS
- FDCAN_FLAG_DATA_PROTOCOL_ERROR
- FDCAN_FLAG_ARB_PROTOCOL_ERROR
- FDCAN_FLAG_RAM_WATCHDOG
- FDCAN_FLAG_BUS_OFF
- FDCAN_FLAG_ERROR_WARNING
- FDCAN_FLAG_ERROR_PASSIVE
- FDCAN_FLAG_ERROR_LOGGING_OVERFLOW
- FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE
- FDCAN_FLAG_TIMEOUT_OCCURRED
- FDCAN_FLAG_RAM_ACCESS_FAILURE
- FDCAN_FLAG_TIMESTAMP_WRAPAROUND
- FDCAN_FLAG_TX_EVT_FIFO_ELT_LOST
- FDCAN_FLAG_TX_EVT_FIFO_FULL
- FDCAN_FLAG_TX_EVT_FIFO_WATERMARK
- FDCAN_FLAG_TX_EVT_FIFO_NEW_DATA
- FDCAN_FLAG_TX_FIFO_EMPTY
- FDCAN_FLAG_TX_ABORT_COMPLETE
- FDCAN_FLAG_TX_COMPLETE
- FDCAN_FLAG_RX_HIGH_PRIORITY_MSG
- FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST
- FDCAN_FLAG_RX_FIFO1_FULL
- FDCAN_FLAG_RX_FIFO1_WATERMARK
- FDCAN_FLAG_RX_FIFO1_NEW_MESSAGE
- FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST
- FDCAN_FLAG_RX_FIFO0_FULL
- FDCAN_FLAG_RX_FIFO0_WATERMARK
- FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE
return none
void FDCAN_ConfigIntLine(FDCAN_Module *FDCANx, uint32_t Int, uint32_t IntLine)Assign interrupts to either Interrupt line 0 or 1.
Source comment
name FDCAN_ConfigIntLine.
fun Assign interrupts to either Interrupt line 0 or 1.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Int :
- FDCAN_INT_RX_FIFO0_NEW_MESSAGE
- FDCAN_INT_RX_FIFO0_WATERMARK
- FDCAN_INT_RX_FIFO0_FULL
- FDCAN_INT_RX_FIFO0_MESSAGE_LOST
- FDCAN_INT_RX_FIFO1_NEW_MESSAGE
- FDCAN_INT_RX_FIFO1_WATERMARK
- FDCAN_INT_RX_FIFO1_FULL
- FDCAN_INT_RX_FIFO1_MESSAGE_LOST
- FDCAN_INT_RX_HIGH_PRIORITY_MSG
- FDCAN_INT_TX_COMPLETE
- FDCAN_INT_TX_ABORT_COMPLETE
- FDCAN_INT_TX_FIFO_EMPTY
- FDCAN_INT_TX_EVT_FIFO_NEW_DATA
- FDCAN_INT_TX_EVT_FIFO_WATERMARK
- FDCAN_INT_TX_EVT_FIFO_FULL
- FDCAN_INT_TX_EVT_FIFO_ELT_LOST
- FDCAN_INT_TIMESTAMP_WRAPAROUND
- FDCAN_INT_RAM_ACCESS_FAILURE
- FDCAN_INT_TIMEOUT_OCCURRED
- FDCAN_INT_RX_BUFFER_NEW_MESSAGE
- FDCAN_INT_ERROR_LOGGING_OVERFLOW
- FDCAN_INT_ERROR_PASSIVE
- FDCAN_INT_ERROR_WARNING
- FDCAN_INT_BUS_OFF
- FDCAN_INT_RAM_WATCHDOG
- FDCAN_INT_ARB_PROTOCOL_ERROR
- FDCAN_INT_DATA_PROTOCOL_ERROR
- FDCAN_INT_RESERVED_ADDRESS_ACCESS
param IntLine :
- FDCAN_INTERRUPT_LINE0
- FDCAN_INTERRUPT_LINE1
return none
void FDCAN_EnableInt(FDCAN_Module *FDCANx, uint32_t Int)Enable the specified FDCAN interrupts.
Source comment
name FDCAN_EnableInt.
fun Enable the specified FDCAN interrupts.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Int :
- FDCAN_INT_RX_FIFO0_NEW_MESSAGE
- FDCAN_INT_RX_FIFO0_WATERMARK
- FDCAN_INT_RX_FIFO0_FULL
- FDCAN_INT_RX_FIFO0_MESSAGE_LOST
- FDCAN_INT_RX_FIFO1_NEW_MESSAGE
- FDCAN_INT_RX_FIFO1_WATERMARK
- FDCAN_INT_RX_FIFO1_FULL
- FDCAN_INT_RX_FIFO1_MESSAGE_LOST
- FDCAN_INT_RX_HIGH_PRIORITY_MSG
- FDCAN_INT_TX_COMPLETE
- FDCAN_INT_TX_ABORT_COMPLETE
- FDCAN_INT_TX_FIFO_EMPTY
- FDCAN_INT_TX_EVT_FIFO_NEW_DATA
- FDCAN_INT_TX_EVT_FIFO_WATERMARK
- FDCAN_INT_TX_EVT_FIFO_FULL
- FDCAN_INT_TX_EVT_FIFO_ELT_LOST
- FDCAN_INT_TIMESTAMP_WRAPAROUND
- FDCAN_INT_RAM_ACCESS_FAILURE
- FDCAN_INT_TIMEOUT_OCCURRED
- FDCAN_INT_RX_BUFFER_NEW_MESSAGE
- FDCAN_INT_ERROR_LOGGING_OVERFLOW
- FDCAN_INT_ERROR_PASSIVE
- FDCAN_INT_ERROR_WARNING
- FDCAN_INT_BUS_OFF
- FDCAN_INT_RAM_WATCHDOG
- FDCAN_INT_ARB_PROTOCOL_ERROR
- FDCAN_INT_DATA_PROTOCOL_ERROR
- FDCAN_INT_RESERVED_ADDRESS_ACCESS
return none
void FDCAN_DisableInt(FDCAN_Module *FDCANx, uint32_t Int)Disable the specified FDCAN interrupts.
Source comment
name FDCAN_DisableInt.
fun Disable the specified FDCAN interrupts.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Int :
- FDCAN_INT_RX_FIFO0_NEW_MESSAGE
- FDCAN_INT_RX_FIFO0_WATERMARK
- FDCAN_INT_RX_FIFO0_FULL
- FDCAN_INT_RX_FIFO0_MESSAGE_LOST
- FDCAN_INT_RX_FIFO1_NEW_MESSAGE
- FDCAN_INT_RX_FIFO1_WATERMARK
- FDCAN_INT_RX_FIFO1_FULL
- FDCAN_INT_RX_FIFO1_MESSAGE_LOST
- FDCAN_INT_RX_HIGH_PRIORITY_MSG
- FDCAN_INT_TX_COMPLETE
- FDCAN_INT_TX_ABORT_COMPLETE
- FDCAN_INT_TX_FIFO_EMPTY
- FDCAN_INT_TX_EVT_FIFO_NEW_DATA
- FDCAN_INT_TX_EVT_FIFO_WATERMARK
- FDCAN_INT_TX_EVT_FIFO_FULL
- FDCAN_INT_TX_EVT_FIFO_ELT_LOST
- FDCAN_INT_TIMESTAMP_WRAPAROUND
- FDCAN_INT_RAM_ACCESS_FAILURE
- FDCAN_INT_TIMEOUT_OCCURRED
- FDCAN_INT_RX_BUFFER_NEW_MESSAGE
- FDCAN_INT_ERROR_LOGGING_OVERFLOW
- FDCAN_INT_ERROR_PASSIVE
- FDCAN_INT_ERROR_WARNING
- FDCAN_INT_BUS_OFF
- FDCAN_INT_RAM_WATCHDOG
- FDCAN_INT_ARB_PROTOCOL_ERROR
- FDCAN_INT_DATA_PROTOCOL_ERROR
- FDCAN_INT_RESERVED_ADDRESS_ACCESS
return none
FlagStatus FDCAN_GetIntFlag(FDCAN_Module *FDCANx, uint32_t Flag)Check whether the specified FDCAN interrupt is set or not.
Source comment
name FDCAN_GetIntFlag.
fun Check whether the specified FDCAN interrupt is set or not.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Flag :
- FDCAN_FLAG_RESERVED_ADDRESS_ACCESS
- FDCAN_FLAG_DATA_PROTOCOL_ERROR
- FDCAN_FLAG_ARB_PROTOCOL_ERROR
- FDCAN_FLAG_RAM_WATCHDOG
- FDCAN_FLAG_BUS_OFF
- FDCAN_FLAG_ERROR_WARNING
- FDCAN_FLAG_ERROR_PASSIVE
- FDCAN_FLAG_ERROR_LOGGING_OVERFLOW
- FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE
- FDCAN_FLAG_TIMEOUT_OCCURRED
- FDCAN_FLAG_RAM_ACCESS_FAILURE
- FDCAN_FLAG_TIMESTAMP_WRAPAROUND
- FDCAN_FLAG_TX_EVT_FIFO_ELT_LOST
- FDCAN_FLAG_TX_EVT_FIFO_FULL
- FDCAN_FLAG_TX_EVT_FIFO_WATERMARK
- FDCAN_FLAG_TX_EVT_FIFO_NEW_DATA
- FDCAN_FLAG_TX_FIFO_EMPTY
- FDCAN_FLAG_TX_ABORT_COMPLETE
- FDCAN_FLAG_TX_COMPLETE
- FDCAN_FLAG_RX_HIGH_PRIORITY_MSG
- FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST
- FDCAN_FLAG_RX_FIFO1_FULL
- FDCAN_FLAG_RX_FIFO1_WATERMARK
- FDCAN_FLAG_RX_FIFO1_NEW_MESSAGE
- FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST
- FDCAN_FLAG_RX_FIFO0_FULL
- FDCAN_FLAG_RX_FIFO0_WATERMARK
- FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE
return FlagStatus
- RESET
- SET
ErrorStatus FDCAN_ActivateInt(FDCAN_Module *FDCANx, uint32_t Int, uint32_t BufferIndexes)Activate the specified FDCAN interrupts.
Source comment
name FDCAN_ActivateInt.
fun Activate the specified FDCAN interrupts.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Int :
- FDCAN_INT_RX_FIFO0_NEW_MESSAGE
- FDCAN_INT_RX_FIFO0_WATERMARK
- FDCAN_INT_RX_FIFO0_FULL
- FDCAN_INT_RX_FIFO0_MESSAGE_LOST
- FDCAN_INT_RX_FIFO1_NEW_MESSAGE
- FDCAN_INT_RX_FIFO1_WATERMARK
- FDCAN_INT_RX_FIFO1_FULL
- FDCAN_INT_RX_FIFO1_MESSAGE_LOST
- FDCAN_INT_RX_HIGH_PRIORITY_MSG
- FDCAN_INT_TX_COMPLETE
- FDCAN_INT_TX_ABORT_COMPLETE
- FDCAN_INT_TX_FIFO_EMPTY
- FDCAN_INT_TX_EVT_FIFO_NEW_DATA
- FDCAN_INT_TX_EVT_FIFO_WATERMARK
- FDCAN_INT_TX_EVT_FIFO_FULL
- FDCAN_INT_TX_EVT_FIFO_ELT_LOST
- FDCAN_INT_TIMESTAMP_WRAPAROUND
- FDCAN_INT_RAM_ACCESS_FAILURE
- FDCAN_INT_TIMEOUT_OCCURRED
- FDCAN_INT_RX_BUFFER_NEW_MESSAGE
- FDCAN_INT_ERROR_LOGGING_OVERFLOW
- FDCAN_INT_ERROR_PASSIVE
- FDCAN_INT_ERROR_WARNING
- FDCAN_INT_BUS_OFF
- FDCAN_INT_RAM_WATCHDOG
- FDCAN_INT_ARB_PROTOCOL_ERROR
- FDCAN_INT_DATA_PROTOCOL_ERROR
- FDCAN_INT_RESERVED_ADDRESS_ACCESS
param BufferIndexes :
- FDCAN_TX_BUFFER0
- FDCAN_TX_BUFFER1
- FDCAN_TX_BUFFER2
- FDCAN_TX_BUFFER3
- FDCAN_TX_BUFFER4
- FDCAN_TX_BUFFER5
- FDCAN_TX_BUFFER6
- FDCAN_TX_BUFFER7
- FDCAN_TX_BUFFER8
- FDCAN_TX_BUFFER9
- FDCAN_TX_BUFFER10
- FDCAN_TX_BUFFER11
- FDCAN_TX_BUFFER12
- FDCAN_TX_BUFFER13
- FDCAN_TX_BUFFER14
- FDCAN_TX_BUFFER15
- FDCAN_TX_BUFFER16
- FDCAN_TX_BUFFER17
- FDCAN_TX_BUFFER18
- FDCAN_TX_BUFFER19
- FDCAN_TX_BUFFER20
- FDCAN_TX_BUFFER21
- FDCAN_TX_BUFFER22
- FDCAN_TX_BUFFER23
- FDCAN_TX_BUFFER24
- FDCAN_TX_BUFFER25
- FDCAN_TX_BUFFER26
- FDCAN_TX_BUFFER27
- FDCAN_TX_BUFFER28
- FDCAN_TX_BUFFER29
- FDCAN_TX_BUFFER30
- FDCAN_TX_BUFFER31
return ErrorStatus
- SUCCESS
- ERROR
void FDCAN_DeactivateInt(FDCAN_Module *FDCANx, uint32_t Int)Deactivate the specified FDCAN interrupts.
Source comment
name FDCAN_DeactivateInt.
fun Deactivate the specified FDCAN interrupts.
param FDCANx :
- FDCAN1
- FDCAN2
- FDCAN3
param Int :
- FDCAN_INT_RX_FIFO0_NEW_MESSAGE
- FDCAN_INT_RX_FIFO0_WATERMARK
- FDCAN_INT_RX_FIFO0_FULL
- FDCAN_INT_RX_FIFO0_MESSAGE_LOST
- FDCAN_INT_RX_FIFO1_NEW_MESSAGE
- FDCAN_INT_RX_FIFO1_WATERMARK
- FDCAN_INT_RX_FIFO1_FULL
- FDCAN_INT_RX_FIFO1_MESSAGE_LOST
- FDCAN_INT_RX_HIGH_PRIORITY_MSG
- FDCAN_INT_TX_COMPLETE
- FDCAN_INT_TX_ABORT_COMPLETE
- FDCAN_INT_TX_FIFO_EMPTY
- FDCAN_INT_TX_EVT_FIFO_NEW_DATA
- FDCAN_INT_TX_EVT_FIFO_WATERMARK
- FDCAN_INT_TX_EVT_FIFO_FULL
- FDCAN_INT_TX_EVT_FIFO_ELT_LOST
- FDCAN_INT_TIMESTAMP_WRAPAROUND
- FDCAN_INT_RAM_ACCESS_FAILURE
- FDCAN_INT_TIMEOUT_OCCURRED
- FDCAN_INT_RX_BUFFER_NEW_MESSAGE
- FDCAN_INT_ERROR_LOGGING_OVERFLOW
- FDCAN_INT_ERROR_PASSIVE
- FDCAN_INT_ERROR_WARNING
- FDCAN_INT_BUS_OFF
- FDCAN_INT_RAM_WATCHDOG
- FDCAN_INT_ARB_PROTOCOL_ERROR
- FDCAN_INT_DATA_PROTOCOL_ERROR
- FDCAN_INT_RESERVED_ADDRESS_ACCESS
return none
FlagStatus FDCAN_TT_GetIntFlag(FDCAN_Module *FDCANx, uint32_t TT_Flag)Check whether the specified FDCAN TT interrupt is set or not.
Source comment
name FDCAN_TT_GetIntFlag.
fun Check whether the specified FDCAN TT interrupt is set or not.
param FDCANx :
- FDCAN1
- FDCAN2
param TT_Flag :
- FDCAN_TT_FLAG_BASIC_CYCLE_START
- FDCAN_TT_FLAG_MATRIX_CYCLE_START
- FDCAN_TT_FLAG_SYNC_MODE_CHANGE
- FDCAN_TT_FLAG_START_OF_GAP
- FDCAN_TT_FLAG_REG_TIME_MARK
- FDCAN_TT_FLAG_TRIG_TIME_MARK
- FDCAN_TT_FLAG_STOP_WATCH
- FDCAN_TT_FLAG_GLOBAL_TIME_WRAP
- FDCAN_TT_FLAG_GLOBAL_TIME_DISC
- FDCAN_TT_FLAG_GLOBAL_TIME_ERROR
- FDCAN_TT_FLAG_TX_COUNT_UNDERFLOW
- FDCAN_TT_FLAG_TX_COUNT_OVERFLOW
- FDCAN_TT_FLAG_SCHEDULING_ERROR_1
- FDCAN_TT_FLAG_SCHEDULING_ERROR_2
- FDCAN_TT_FLAG_ERROR_LEVEL_CHANGE
- FDCAN_TT_FLAG_INIT_WATCH_TRIGGER
- FDCAN_TT_FLAG_WATCH_TRIGGER
- FDCAN_TT_FLAG_APPLICATION_WATCHDOG
- FDCAN_TT_FLAG_CONFIG_ERROR
return FlagStatus
- RESET
- SET
FlagStatus FDCAN_TT_GetFlag(FDCAN_Module *FDCANx, uint32_t TT_Flag)Check whether the specified FDCAN TT flag is set or not.
Source comment
name FDCAN_TT_GetFlag.
fun Check whether the specified FDCAN TT flag is set or not.
param FDCANx :
- FDCAN1
- FDCAN2
param TT_Flag :
- FDCAN_TT_FLAG_BASIC_CYCLE_START
- FDCAN_TT_FLAG_MATRIX_CYCLE_START
- FDCAN_TT_FLAG_SYNC_MODE_CHANGE
- FDCAN_TT_FLAG_START_OF_GAP
- FDCAN_TT_FLAG_REG_TIME_MARK
- FDCAN_TT_FLAG_TRIG_TIME_MARK
- FDCAN_TT_FLAG_STOP_WATCH
- FDCAN_TT_FLAG_GLOBAL_TIME_WRAP
- FDCAN_TT_FLAG_GLOBAL_TIME_DISC
- FDCAN_TT_FLAG_GLOBAL_TIME_ERROR
- FDCAN_TT_FLAG_TX_COUNT_UNDERFLOW
- FDCAN_TT_FLAG_TX_COUNT_OVERFLOW
- FDCAN_TT_FLAG_SCHEDULING_ERROR_1
- FDCAN_TT_FLAG_SCHEDULING_ERROR_2
- FDCAN_TT_FLAG_ERROR_LEVEL_CHANGE
- FDCAN_TT_FLAG_INIT_WATCH_TRIGGER
- FDCAN_TT_FLAG_WATCH_TRIGGER
- FDCAN_TT_FLAG_APPLICATION_WATCHDOG
- FDCAN_TT_FLAG_CONFIG_ERROR
return FlagStatus
- RESET
- SET
void FDCAN_TT_ClearFlag(FDCAN_Module *FDCANx, uint32_t TT_Flag)Clear the specified FDCAN TT flag.
Source comment
name FDCAN_TT_ClearFlag.
fun Clear the specified FDCAN TT flag.
param FDCANx :
- FDCAN1
- FDCAN2
param TT_Flag :
- FDCAN_TT_FLAG_BASIC_CYCLE_START
- FDCAN_TT_FLAG_MATRIX_CYCLE_START
- FDCAN_TT_FLAG_SYNC_MODE_CHANGE
- FDCAN_TT_FLAG_START_OF_GAP
- FDCAN_TT_FLAG_REG_TIME_MARK
- FDCAN_TT_FLAG_TRIG_TIME_MARK
- FDCAN_TT_FLAG_STOP_WATCH
- FDCAN_TT_FLAG_GLOBAL_TIME_WRAP
- FDCAN_TT_FLAG_GLOBAL_TIME_DISC
- FDCAN_TT_FLAG_GLOBAL_TIME_ERROR
- FDCAN_TT_FLAG_TX_COUNT_UNDERFLOW
- FDCAN_TT_FLAG_TX_COUNT_OVERFLOW
- FDCAN_TT_FLAG_SCHEDULING_ERROR_1
- FDCAN_TT_FLAG_SCHEDULING_ERROR_2
- FDCAN_TT_FLAG_ERROR_LEVEL_CHANGE
- FDCAN_TT_FLAG_INIT_WATCH_TRIGGER
- FDCAN_TT_FLAG_WATCH_TRIGGER
- FDCAN_TT_FLAG_APPLICATION_WATCHDOG
- FDCAN_TT_FLAG_CONFIG_ERROR
return none
void FDCAN_TT_ConfigIntLine(FDCAN_Module *FDCANx, uint32_t TT_Int, uint32_t IntLine)Assign TT interrupts to either Interrupt line 0 or 1.
Source comment
name FDCAN_TT_ConfigIntLine.
fun Assign TT interrupts to either Interrupt line 0 or 1.
param FDCANx :
- FDCAN1
- FDCAN2
param TT_Int :
- FDCAN_TT_INT_BASIC_CYCLE_START
- FDCAN_TT_INT_MATRIX_CYCLE_START
- FDCAN_TT_INT_SYNC_MODE_CHANGE
- FDCAN_TT_INT_START_OF_GAP
- FDCAN_TT_INT_REG_TIME_MARK
- FDCAN_TT_INT_TRIG_TIME_MARK
- FDCAN_TT_INT_STOP_WATCH
- FDCAN_TT_INT_GLOBAL_TIME_WRAP
- FDCAN_TT_INT_GLOBAL_TIME_DISC
- FDCAN_TT_INT_GLOBAL_TIME_ERROR
- FDCAN_TT_INT_TX_COUNT_UNDERFLOW
- FDCAN_TT_INT_TX_COUNT_OVERFLOW
- FDCAN_TT_INT_SCHEDULING_ERROR_1
- FDCAN_TT_INT_SCHEDULING_ERROR_2
- FDCAN_TT_INT_ERROR_LEVEL_CHANGE
- FDCAN_TT_INT_INIT_WATCH_TRIGGER
- FDCAN_TT_INT_WATCH_TRIGGER
- FDCAN_TT_INT_APPLICATION_WATCHDOG
- FDCAN_TT_INT_CONFIG_ERROR
param IntLine :
- FDCAN_INTERRUPT_LINE0
- FDCAN_INTERRUPT_LINE1
return none
void FDCAN_TT_EnableInt(FDCAN_Module *FDCANx, uint32_t TT_Int, FunctionalState Cmd)Enable or disable the specified FDCAN TT interrupts.
Source comment
name FDCAN_TT_EnableInt.
fun Enable or disable the specified FDCAN TT interrupts.
param FDCANx :
- FDCAN1
- FDCAN2
param TT_Int :
- FDCAN_TT_INT_BASIC_CYCLE_START
- FDCAN_TT_INT_MATRIX_CYCLE_START
- FDCAN_TT_INT_SYNC_MODE_CHANGE
- FDCAN_TT_INT_START_OF_GAP
- FDCAN_TT_INT_REG_TIME_MARK
- FDCAN_TT_INT_TRIG_TIME_MARK
- FDCAN_TT_INT_STOP_WATCH
- FDCAN_TT_INT_GLOBAL_TIME_WRAP
- FDCAN_TT_INT_GLOBAL_TIME_DISC
- FDCAN_TT_INT_GLOBAL_TIME_ERROR
- FDCAN_TT_INT_TX_COUNT_UNDERFLOW
- FDCAN_TT_INT_TX_COUNT_OVERFLOW
- FDCAN_TT_INT_SCHEDULING_ERROR_1
- FDCAN_TT_INT_SCHEDULING_ERROR_2
- FDCAN_TT_INT_ERROR_LEVEL_CHANGE
- FDCAN_TT_INT_INIT_WATCH_TRIGGER
- FDCAN_TT_INT_WATCH_TRIGGER
- FDCAN_TT_INT_APPLICATION_WATCHDOG
- FDCAN_TT_INT_CONFIG_ERROR
return none
void FDCAN_TT_DisableInt(FDCAN_Module *FDCANx, uint32_t TT_Int)This function is declared in the driver header and has no implementation in this SDK.
Source comment
name FDCAN_TT_DisableInt
fun (declared in the driver header; no implementation in this SDK)
FlagStatus FDCAN_TT_GetInt(FDCAN_Module *FDCANx, uint32_t TT_Flag)This function is declared in the driver header and has no implementation in this SDK.
Source comment
name FDCAN_TT_GetInt
fun (declared in the driver header; no implementation in this SDK)
ErrorStatus FDCAN_TT_ActivateInt(FDCAN_Module *FDCANx, uint32_t TT_Int)Activate the specified FDCAN TT interrupts.
Source comment
name FDCAN_TT_ActivateInt.
fun Activate the specified FDCAN TT interrupts.
param FDCANx :
- FDCAN1
- FDCAN2
param TT_Int :
- FDCAN_TT_INT_BASIC_CYCLE_START
- FDCAN_TT_INT_MATRIX_CYCLE_START
- FDCAN_TT_INT_SYNC_MODE_CHANGE
- FDCAN_TT_INT_START_OF_GAP
- FDCAN_TT_INT_REG_TIME_MARK
- FDCAN_TT_INT_TRIG_TIME_MARK
- FDCAN_TT_INT_STOP_WATCH
- FDCAN_TT_INT_GLOBAL_TIME_WRAP
- FDCAN_TT_INT_GLOBAL_TIME_DISC
- FDCAN_TT_INT_GLOBAL_TIME_ERROR
- FDCAN_TT_INT_TX_COUNT_UNDERFLOW
- FDCAN_TT_INT_TX_COUNT_OVERFLOW
- FDCAN_TT_INT_SCHEDULING_ERROR_1
- FDCAN_TT_INT_SCHEDULING_ERROR_2
- FDCAN_TT_INT_ERROR_LEVEL_CHANGE
- FDCAN_TT_INT_INIT_WATCH_TRIGGER
- FDCAN_TT_INT_WATCH_TRIGGER
- FDCAN_TT_INT_APPLICATION_WATCHDOG
- FDCAN_TT_INT_CONFIG_ERROR
return ErrorStatus
- SUCCESS
- ERROR
void FDCAN_TT_DeactivateInt(FDCAN_Module *FDCANx, uint32_t TT_Int)Deactivate the specified FDCAN TT interrupts.
Source comment
name FDCAN_TT_DeactivateInt.
fun Deactivate the specified FDCAN TT interrupts.
param FDCANx :
- FDCAN1
- FDCAN2
param TT_Int :
- FDCAN_TT_INT_BASIC_CYCLE_START
- FDCAN_TT_INT_MATRIX_CYCLE_START
- FDCAN_TT_INT_SYNC_MODE_CHANGE
- FDCAN_TT_INT_START_OF_GAP
- FDCAN_TT_INT_REG_TIME_MARK
- FDCAN_TT_INT_TRIG_TIME_MARK
- FDCAN_TT_INT_STOP_WATCH
- FDCAN_TT_INT_GLOBAL_TIME_WRAP
- FDCAN_TT_INT_GLOBAL_TIME_DISC
- FDCAN_TT_INT_GLOBAL_TIME_ERROR
- FDCAN_TT_INT_TX_COUNT_UNDERFLOW
- FDCAN_TT_INT_TX_COUNT_OVERFLOW
- FDCAN_TT_INT_SCHEDULING_ERROR_1
- FDCAN_TT_INT_SCHEDULING_ERROR_2
- FDCAN_TT_INT_ERROR_LEVEL_CHANGE
- FDCAN_TT_INT_INIT_WATCH_TRIGGER
- FDCAN_TT_INT_WATCH_TRIGGER
- FDCAN_TT_INT_APPLICATION_WATCHDOG
- FDCAN_TT_INT_CONFIG_ERROR
return none
5.12.3 Demo descriptions
This section describes the 6 FDCAN examples: FDCAN_Classic, FDCAN_Interrupt, FDCAN_Loopback, FDCAN_Polling, TTCAN_Level1, and TTCAN_Level2; each example gives the example directory, the data flow, an analysis table, and a core-code walkthrough.
5.12.3.1 FDCAN_Classic classic frame transfer
Example directory: projects/n32h49x_EVAL/examples/FDCAN/FDCAN_Classic/
Configure FDCAN and key clocks→initialize node 1 and node 2 and split the message RAM→configure reception filters, timestamp, and interrupts→the key makes both nodes send a frame→receive by interrupt and by polling alternately and print
| Item | Source analysis |
|---|---|
| Function | Shows FDCAN1 (node 1) and FDCAN2 (node 2) sending and receiving data frames to each other in classic CAN format; the key alternately switches between interrupt reception and polling reception and prints the transfer process. |
| Source files | src/main.c: clock source, pins, node configuration, and the main-loop transfer;src/n32h49x_it.c: node 1 and node 2 ISRs;inc/main.h: pin, peripheral, and IRQ number macros;inc/n32h49x_it.h: ISR declarations;readme.txt: features and usage notes;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | Frame format FDCAN_FRAME_CLASSIC, normal mode;node 1 TX=PA4, RX=PA5, node 2 TX=PG2, RX=PG3; nominal prescaler=1, TSEG1=31, TSEG2=8, sync jump=8, bit rate 500Kbps; node 1 standard filter ID=0x4AA mask=0x7FF to RX FIFO0, node 2 ID=0x555 to RX FIFO1; internal timestamp divided by 16, RX FIFO new-message and TX complete interrupts on interrupt line 1. |
| Program and data path | main calls FDCAN_clock_src_config, Node1/Node2_port_config, and Node1/Node2_Config in turn to initialize;Node1_Config and Node2_Config set InitParam, filters, timestamp, and interrupts and call FDCAN_Start;the main loop debounces the PA0 key and then writes one frame to each node; reception switches between interrupt and polling according to IntFlag. |
| Main APIs | FDCAN_Init, FDCAN_ConfigFilter, FDCAN_ConfigGlobalFilter, FDCAN_Start, FDCAN_AddMsgToTxFifoQ, FDCAN_GetRxMsg, FDCAN_GetIntFlag, FDCAN_ClearFlag |
| Verification | After reset the serial port prints the classic frame example message at 115200; pressing PA0 makes node 1 and node 2 each send a frame and print; each frame is received by interrupt or by polling and prints the ID, timestamp, and 8 data bytes. |
| Use note | Connect jump caps J8, J2, J15, J9, and do not connect J87, J89; the PA0 key is pulled up through a DuPont wire; both nodes must use the same bit rate and bit timing; the development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1 on N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example puts both nodes on one message RAM and alternates between interrupt and polling reception so that the two receive paths can be compared.
Data path: FDCAN_clock_src_config -> Node1_port_config/Node2_port_config -> Node1_Config/Node2_Config -> FDCAN_Start -> main-loop transfer -> NODE1/NODE2_IRQ_FUNCTION
1. Configure the FDCAN clock source. FDCAN_clock_src_config sets the PLL divider to DIV12 and selects the PLL as the FDCAN clock source.
src/main.csrc/main.c · FDCAN_clock_src_config
void FDCAN_clock_src_config(void)
{
/* Config PLL prescaler for FDCAN */
RCC_ConfigFDCANPllClk(RCC_FDCAN_PLLSRC_DIV12);
/* Select PLL as FDCAN clock source */
RCC_ConfigFDCANClksrc(RCC_FDCAN_CLKSRC_PLL);
}
2. Initialize the nodes and split the message RAM offset. Both nodes share FDCAN_ram, node 1 at offset 0 and node 2 at offset 80, and the code checks EndAddress against the RAM size after initialization.
src/main.csrc/main.c · Node1_Config
InitParam.MsgRamStrAddr = (uint32_t)FDCAN_ram; /* Msg ram start address, shared by all FDCAN modules */
InitParam.MsgRamOffset = 0; /* Current NODE1 msg ram start offset */
3. Configure the reception filter and interrupts. Node 1 uses a mask filter with ID=0x4AA and mask=0x7FF into RX FIFO0, and routes the RX FIFO0 new-message and TX complete interrupts to interrupt line 1.
src/main.csrc/main.c · Node1_Config
FilterParam.IdType = FDCAN_STANDARD_ID;
FilterParam.FilterIndex = 0;
FilterParam.FilterType = FDCAN_FILTER_MASK;
FilterParam.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
FilterParam.FilterID1 = 0x4AA;
FilterParam.FilterID2 = 0x7FF;
FDCAN_ConfigFilter(NODE1,&FilterParam);
4. The main loop triggers on key duration. After the key is held for about 1ms the counter is cleared and the reception method is toggled.
src/main.csrc/main.c · main
if(key_cnt >= (SystemCoreClock/1000))
{
key_cnt = 0;
IntFlag++;
5. The ISRs set flags. The node ISRs only test and clear the flags; the actual printing is done in the main loop.
src/n32h49x_it.csrc/n32h49x_it.c · NODE1_IRQ_FUNCTION
void NODE1_IRQ_FUNCTION(void)
{
if(FDCAN_GetIntFlag(NODE1,FDCAN_FLAG_TX_COMPLETE) == SET)
{
FDCAN_ClearFlag(NODE1,FDCAN_FLAG_TX_COMPLETE);
TxFlag[0]++;
}
if(FDCAN_GetIntFlag(NODE1,FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE) == SET)
{
FDCAN_ClearFlag(NODE1,FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE);
RxFlag[0]++;
}
}
Corresponding source files: src/main.c, src/n32h49x_it.c
5.12.3.2 FDCAN_Interrupt interrupt transfer
Example directory: projects/n32h49x_EVAL/examples/FDCAN/FDCAN_Interrupt/
Configure FDCAN and EXTI clocks and pins→initialize node 1 and node 2 and split the message RAM→configure extended filters, Tx buffer, and FIFO watermark→the key triggers node 1 to send through EXTI→the transmit-complete and receive-watermark interrupts print
| Item | Source analysis |
|---|---|
| Function | Shows FDCAN interrupt transfer: node 1 transmit-complete interrupt and node 2 RX FIFO1 watermark interrupt; the key triggers node 1 to send one frame through EXTI, and 2 consecutive received frames trigger node 2 watermark interrupt. |
| Source files | src/main.c: clock, pins, node configuration, and main loop;src/n32h49x_it.c: EXTI1 and node 1, node 2 ISRs;inc/main.h: pin, EXTI, peripheral, and IRQ number macros;inc/n32h49x_it.h: ISR declarations;readme.txt: features and usage notes;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | Frame format FDCAN_FRAME_FD_BRS, BRS on, 16 data bytes;node 1 extended filter ID=0x0AAAAAAA mask=0x1FFFFFFF to RX FIFO0, only 1 Tx buffer; node 2 extended filter ID=0x15555555 to RX FIFO1, FIFO1 size 6, watermark=2; node 1 TX BUFFER0 transmit-complete and node 2 RX FIFO1 watermark interrupts on interrupt line 1; the PA15 key is triggered by EXTI Line1 rising edge. |
| Program and data path | main calls Key_Int_Init to set up PA15 and EXTI1, then FDCAN_clock_src_config and the node port and node configuration;the key ISR EXTI1_IRQHandler sets TxFlag, and the main loop then calls FDCAN_AddMsgToTxBuffer and FDCAN_EnableTxBufferRequest;NODE1_IRQ_FUNCTION sets CompFlag on transmit complete and NODE2_IRQ_FUNCTION sets RxFlag on watermark;the main loop drains RX FIFO1 on the flag and prints. |
| Main APIs | FDCAN_Init, FDCAN_ConfigFilter, FDCAN_ConfigFifoWatermark, FDCAN_ActivateInt, FDCAN_AddMsgToTxBuffer, FDCAN_EnableTxBufferRequest, FDCAN_GetIntFlag, FDCAN_GetRxMsg |
| Verification | After reset the serial port prints the interrupt transfer example message; pressing PA15 makes node 1 send one frame and trigger the transmit-complete interrupt print; 2 consecutive frames received by node 2 trigger the RX FIFO1 watermark interrupt and print the ID, timestamp, and 16 data bytes. |
| Use note | Connect jump caps J8, J2, J15, J9, and do not connect J87, J89; the PA15 key is triggered by EXTI Line1 rising edge; the watermark value 2 means the interrupt is raised only after 2 frames are collected; the development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1 on N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example hands the receive side to the FIFO watermark interrupt and the transmit side to the transmit-complete interrupt, so the main loop only moves flags into log messages.
Data path: Key_Int_Init -> FDCAN_clock_src_config -> Node1_Config/Node2_Config -> FDCAN_Start -> EXTI1_IRQHandler -> NODE1/NODE2_IRQ_FUNCTION -> main loop reads the FIFO
1. Trigger transmission from the key interrupt. Key_Int_Init configures PA15 as EXTI Line1 rising edge, and the ISR only sets TxFlag.
src/n32h49x_it.csrc/n32h49x_it.c · EXTI1_IRQHandler
void EXTI1_IRQHandler(void)
{
if(EXTI_GetStatusFlag(EXTI_LINE1) == SET)
{
TxFlag = 1;
}
EXTI_ClrITPendBit(EXTI_LINE1);
}
2. Write the Tx buffer and request transmission. When the main loop sees TxFlag it writes the 16 data bytes into TX BUFFER0 and activates the transmit request, with the data pointer cycling per frame.
src/main.csrc/main.c · main
FDCAN_AddMsgToTxBuffer(NODE1, &TxHeader, &TxData[data_cnt],FDCAN_TX_BUFFER0);
FDCAN_EnableTxBufferRequest(NODE1,FDCAN_TX_BUFFER0);
3. Configure the receive FIFO watermark and interrupt line. Node 2 sets the FIFO1 watermark to 2 and routes the RX FIFO1 watermark interrupt to interrupt line 1.
src/main.csrc/main.c · Node2_Config
FDCAN_ConfigFifoWatermark(NODE2,FDCAN_RX_FIFO1,2);
FDCAN_ConfigIntLine(NODE2,FDCAN_FLAG_RX_FIFO1_WATERMARK,FDCAN_INTERRUPT_LINE1);
FDCAN_ActivateInt(NODE2,FDCAN_FLAG_RX_FIFO1_WATERMARK,0);
4. The two ISRs set their flags. Transmit complete and receive watermark each set a flag that the main loop handles uniformly.
src/n32h49x_it.csrc/n32h49x_it.c · NODE1_IRQ_FUNCTION/NODE2_IRQ_FUNCTION
void NODE1_IRQ_FUNCTION(void)
{
if(FDCAN_GetIntFlag(NODE1,FDCAN_FLAG_TX_COMPLETE) == SET)
{
CompFlag = 1;
FDCAN_ClearFlag(NODE1,FDCAN_FLAG_TX_COMPLETE);
}
}
void NODE2_IRQ_FUNCTION(void)
{
if(FDCAN_GetIntFlag(NODE2,FDCAN_FLAG_RX_FIFO1_WATERMARK) == SET)
{
RxFlag = 1;
FDCAN_ClearFlag(NODE2,FDCAN_FLAG_RX_FIFO1_WATERMARK);
}
}
5. The main loop drains the receive FIFO on the flag. After the watermark interrupt sets RxFlag, the main loop takes the frames out of the FIFO one by one and prints them.
src/main.csrc/main.c · main
while(FDCAN_GetRxFifoFillLevel(NODE2,FDCAN_RX_FIFO1) > 0)
{
buf_clear(RxBuf,TEST_DATA_FRAME_SIZE,0xEE);
FDCAN_GetRxMsg(NODE2,FDCAN_RX_FIFO1,&RxHeader,RxBuf);
Corresponding source files: src/main.c, src/n32h49x_it.c
5.12.3.3 FDCAN_Loopback external loopback
Example directory: projects/n32h49x_EVAL/examples/FDCAN/FDCAN_Loopback/
Remap SWJ to release the default alternate-function pins→configure the FDCAN clock and TX pin→initialize the node in external loopback mode→configure the dual-ID and range filters→the key alternately sends a standard frame and extended frames→poll the receive buffer, FIFO, and Tx event
| Item | Source analysis |
|---|---|
| Function | Shows FDCAN external loopback mode: a single node sends and receives by itself; it exercises the Tx buffer, Tx FIFO, receive buffer, Rx FIFO, and Tx event FIFO in one pass. |
| Source files | src/main.c: clock, pins, loopback node configuration, send function, and main loop;src/n32h49x_it.c: core exception handlers;inc/main.h: pin, peripheral, and clock macros;inc/n32h49x_it.h: exception handler declarations;readme.txt: features and usage notes;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | Working mode FDCAN_MODE_EXTERNAL_LOOPBACK, frame format FDCAN_FRAME_FD_BRS, BRS on, 20 data bytes;single node FDCAN1, TX=PA4; standard dual-ID filter (0x111, 0x555) to RX BUFFER0, extended range filter (0x1111111 to 0x2222222) to RX FIFO1; 1 receive buffer, 1 Tx buffer, Tx FIFO size 2, Tx event FIFO size 9; internal timestamp divided by 16. |
| Program and data path | main first enables the AFIO clock and remaps SWJ to release the default alternate-function pins, then calls Key_Init, FDCAN_clock_src_config, and Node1_port_config;Node1_Config sets loopback mode and the filters and calls FDCAN_Start;after the key is debounced it calls Node1_SendMsg, which alternates a standard frame and two extended frames by send_cnt;the main loop polls RX BUFFER0, RX FIFO1, and the Tx event FIFO and prints. |
| Main APIs | FDCAN_Init, FDCAN_ConfigFilter, FDCAN_ConfigGlobalFilter, FDCAN_Start, FDCAN_AddMsgToTxBuffer, FDCAN_EnableTxBufferRequest, FDCAN_AddMsgToTxFifoQ, FDCAN_GetRxMsg, FDCAN_GetTxEvent |
| Verification | After reset the serial port prints the loopback example message; each key press alternately sends the standard frame ID=0x111, extended frame ID=0x1111112, and extended frame ID=0x2222222; the received data from RX BUFFER0 and RX FIFO1 and the Tx event information are printed by polling. |
| Use note | External loopback mode ignores the ACK error, so no external transceiver is needed; the sent ID=0x1111112 falls inside the extended range filter 0x1111111 to 0x2222222 and is looped back into the receiver; the SWJ remap must be used first to release the default JTAG alternate-function pins as GPIO; the development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1 on N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example enables external loopback on a single node and strings the three transmit entry points and the two receive entry points together in one pass.
Data path: main (SWJ remap -> Key_Init -> FDCAN_clock_src_config -> Node1_port_config -> Node1_Config) -> Node1_SendMsg -> main loop polls RX BUFFER0/RX FIFO1/TxEvent
1. Release the default alternate-function pins. main first enables the AFIO clock and remaps SWJ to SWD so that the default JTAG alternate-function pins can be released as GPIO.
src/main.csrc/main.c · main
/* PB4 default used of JTAG port, must be remap as GPIO */
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPHEN_AFIO,ENABLE);
GPIO_ConfigPinRemap(0,0,GPIO_RMP_SWJ_SWD);
2. Configure the dual-ID and range filters. The standard ID uses a dual-ID filter (0x111, 0x555) into the receive buffer, and the extended ID uses a range filter into RX FIFO1.
src/main.csrc/main.c · Node1_Config
FilterParam.IdType = FDCAN_STANDARD_ID;
FilterParam.FilterIndex = 0;
FilterParam.FilterType = FDCAN_FILTER_DUAL;
FilterParam.FilterConfig = FDCAN_FILTER_TO_RXBUFFER;
FilterParam.FilterID1 = 0x111;
FilterParam.FilterID2 = 0x555;
FilterParam.RxBufferIndex = 0;
FDCAN_ConfigFilter(NODE1,&FilterParam);
3. Send the three frames in turn. Node1_SendMsg cycles between the three frames with send_cnt; the standard frame goes through the Tx buffer and the two extended frames through the Tx FIFO.
src/main.csrc/main.c · Node1_SendMsg
FDCAN_AddMsgToTxBuffer(NODE1, &TxHeader, TxData0, FDCAN_TX_BUFFER0);
FDCAN_EnableTxBufferRequest(NODE1,FDCAN_TX_BUFFER0);
log_info("Standard frame send,ID=0x111");
4. Poll the receive buffer and FIFO. The main loop uses FDCAN_CheckNewRxBufMsg for the receive buffer and FDCAN_GetRxFifoFillLevel for RX FIFO1.
src/main.csrc/main.c · main
if(FDCAN_CheckNewRxBufMsg(NODE1,FDCAN_RX_BUFFER0) == SET)
{
FDCAN_GetRxMsg(NODE1,FDCAN_RX_BUFFER0,&RxHeader,RxBuf);
log_info("\r\n Rx buffer0 recieved,RXTS=0x%08x:\r\n",RxHeader.RxTimestamp);
5. Poll the Tx event FIFO. After each frame is sent, an event is taken from the Tx event FIFO and its fields printed.
src/main.csrc/main.c · main
if(FDCAN_GetTxEvent(NODE1,&TxEvent) == SUCCESS)
{
log_info("\r\n Get Tx event:\r\n");
log_info("\t ESI:0x%08x\r\n",TxEvent.ErrorState);
Corresponding source files: src/main.c
5.12.3.4 FDCAN_Polling polling reception
Example directory: projects/n32h49x_EVAL/examples/FDCAN/FDCAN_Polling/
Configure FDCAN and the key interrupt→initialize node 1 and node 2 and split the message RAM→configure the extended filters and Tx buffer→the key triggers node 1 to send through EXTI→node 2 polls RX FIFO1 and prints
| Item | Source analysis |
|---|---|
| Function | Shows FDCAN node 2 receiving data frames sent by node 1 by polling; node 1 transmit completion is still handled by interrupt, while the receive side does not rely on interrupts. |
| Source files | src/main.c: clock, pins, node configuration, and the polling main loop;src/n32h49x_it.c: EXTI1 and node 1 ISRs;inc/main.h: pin, EXTI, peripheral, and IRQ number macros;inc/n32h49x_it.h: ISR declarations;readme.txt: features and usage notes;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | Frame format FDCAN_FRAME_FD_BRS, BRS on, 16 data bytes, both nodes with nominal prescaler=2, TSEG1=31, TSEG2=8;node 1 extended filter ID=0x0AAAAAAA mask=0x1FFFFFFF to RX FIFO0, Tx FIFO size 6; node 2 extended filter ID=0x15555555 mask=0x1FFFFFFF to RX FIFO1, FIFO1 size 6; node 1 TX BUFFER0 transmit-complete interrupt on interrupt line 1; the PA15 key is triggered by EXTI Line1 rising edge. |
| Program and data path | main calls Key_Int_Init to set up PA15 and EXTI1, then completes the clock, pin, and node configuration;the key ISR sets TxFlag, and the main loop then writes the frame into the Tx FIFO/queue with FDCAN_AddMsgToTxFifoQ;node 2 does not use interrupts and the main loop uses FDCAN_GetRxFifoFillLevel to check whether RX FIFO1 has data;it drains the FIFO by calling FDCAN_GetRxMsg frame by frame and prints. |
| Main APIs | FDCAN_Init, FDCAN_ConfigFilter, FDCAN_AddMsgToTxFifoQ, FDCAN_GetRxFifoFillLevel, FDCAN_GetRxMsg, FDCAN_GetIntFlag |
| Verification | After reset the serial port prints the polling example message; pressing PA15 makes node 1 send one frame and trigger the transmit-complete interrupt print; node 2 reads that frame by polling RX FIFO1 and prints the ID, timestamp, and 16 data bytes. |
| Use note | Connect jump caps J8, J2, J15, J9, and do not connect J87, J89; the receive side is fully polled and RX FIFO interrupts are not enabled; check the fill level before reading to avoid reading an empty FIFO; the development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1 on N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example shares the same node configuration as the interrupt example; the difference is that the receive side relies entirely on the main-loop FIFO polling.
Data path: Key_Int_Init -> FDCAN_clock_src_config -> Node1_Config/Node2_Config -> FDCAN_Start -> EXTI1_IRQHandler -> main loop polls RX FIFO1
1. The key ISR sets the transmit flag. The PA15 rising edge enters through EXTI Line1 and only sets TxFlag to 1.
src/n32h49x_it.csrc/n32h49x_it.c · EXTI1_IRQHandler
void EXTI1_IRQHandler(void)
{
if(EXTI_GetStatusFlag(EXTI_LINE1) == SET)
{
TxFlag = 1;
}
EXTI_ClrITPendBit(EXTI_LINE1);
}
2. Trigger transmission from the key flag. When the main loop sees TxFlag it writes the frame into the Tx FIFO/queue and clears the flag, with the data pointer cycling per frame.
src/main.csrc/main.c · main
if(TxFlag)
{
FDCAN_AddMsgToTxFifoQ(NODE1, &TxHeader, &TxData[data_cnt]);
3. Drain RX FIFO1 by polling. The main loop tests the fill level and does not rely on interrupts.
src/main.csrc/main.c · main
if(FDCAN_GetRxFifoFillLevel(NODE2,FDCAN_RX_FIFO1) > 0)
{
buf_clear(RxBuf,TEST_DATA_FRAME_SIZE,0xEE);
FDCAN_GetRxMsg(NODE2,FDCAN_RX_FIFO1,&RxHeader,RxBuf);
4. Print the received frame. After it is taken out, the frame ID, receive timestamp, and data are printed.
src/main.csrc/main.c · main
log_info("\r\n NODE2 Rx FIFO1 recieved a frame\r\nID=0x%03x,RXTS=0x%04x,data:\r\n",RxHeader.ID,RxHeader.RxTimestamp);
Corresponding source files: src/main.c, src/n32h49x_it.c
5.12.3.5 TTCAN_Level1 time-triggered Level1
Example directory: projects/n32h49x_EVAL/examples/FDCAN/TTCAN_Level1/
Configure the FDCAN clock and both node pins→initialize the nodes and split the message RAM→configure the reference message and the trigger list→start the TTCAN schedule→the master refreshes the Tx buffer→the slave polls the receive FIFO and checks the data and status
| Item | Source analysis |
|---|---|
| Function | Shows TTCAN Level1 strict time-triggered operation: node 1 is the time master and sends on the matrix cycles; node 2 receives and checks the transmit and receive consistency field by field. |
| Source files | src/main.c: clock, pins, TTCAN node configuration, and the polling main loop;src/n32h49x_it.c: core exception handlers;inc/main.h: pin, peripheral, and clock macros;inc/n32h49x_it.h: exception handler declarations;readme.txt: features, the TTCAN matrix, and usage notes;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | Frame format FDCAN_FRAME_FD_BRS, BRS on, 8 data bytes, 500Kbps arbitration and 1Mbps data;mode FDCAN_TT_COMMUNICATION_LEVEL1, strictly TT operation (GapEnable=FDCAN_STRICTLY_TT_OPERATION);node 1 is a potential master with 5 Tx buffers, node 2 is a slave with 2 extended filters (0x1AAAA754, 0x1AAAA755) to RX FIFO0 and FIFO1; reference message ID=0x15555758, trigger time marks 5000, 10000, 20000, 20200, 50000, 60000, 65000. |
| Program and data path | main calls FDCAN_clock_src_config, the node ports, and the node configuration, then enters the polling loop;Node1_Config fills FDCAN_TT_InitType and calls FDCAN_TT_Init after FDCAN_Init, then configures the reference message and 7 triggers;the main loop uses FDCAN_AddMsgToTxBuffer and FDCAN_EnableTxBufferRequest to refresh the Tx buffers;node 2 polls RX FIFO0/FIFO1 and checks the ID, frame format, data length, and data field by field. |
| Main APIs | FDCAN_Init, FDCAN_TT_Init, FDCAN_TT_ConfigRefMsg, FDCAN_TT_ConfigTrigger, FDCAN_TT_GetStatus, FDCAN_TT_GetFlag, FDCAN_TT_ClearFlag, FDCAN_GetRxMsg |
| Verification | After reset the serial port prints “TTCAN Level1 Runing OK.”; node 2 takes frames from RX FIFO0/FIFO1 and checks the ID, type, data length, and data consistency; if a serious or schedule error occurs it prints an error message and halts. |
| Use note | Connect jump caps J8, J2, J15, J9, and do not connect J87, J89; the N32H497ZGL7_EVB V1.0 board needs two 120 ohm resistors R26 and R41 soldered; both nodes must use the same time master/slave role and trigger matrix; the development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1 on N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example configures the TTCAN time parameters, the reference message, and the trigger list separately, and the master keeps sending through periodic buffer refreshes.
Data path: FDCAN_clock_src_config -> Node1_port_config/Node2_port_config -> Node1_Config (FDCAN_Init -> FDCAN_TT_Init -> FDCAN_TT_ConfigRefMsg -> FDCAN_TT_ConfigTrigger) -> FDCAN_Start -> main loop refreshes the Tx buffers and polls the receive FIFOs
1. Configure the TTCAN time parameters. FDCAN_TT_InitType is filled before calling FDCAN_TT_Init, selecting Level1, strictly TT operation, and the potential master role.
src/main.csrc/main.c · Node1_Config
pTTParams.OperationMode = FDCAN_TT_COMMUNICATION_LEVEL1;
pTTParams.GapEnable = FDCAN_STRICTLY_TT_OPERATION;
pTTParams.TimeMaster = FDCAN_TT_POTENTIAL_MASTER;
pTTParams.SyncDevLimit = 3;
pTTParams.InitRefTrigOffset = 127;
pTTParams.ExternalClkSync = FDCAN_TT_EXT_CLK_SYNC_ENABLE;
2. Configure the reference message. The reference message uses extended ID 0x15555758.
src/main.csrc/main.c · Node1_Config
FDCAN_TT_ConfigRefMsg(NODE1,FDCAN_EXTENDED_ID,0x15555758,FDCAN_TT_REF_MSG_NO_PAYLOAD);
3. Configure the trigger list. The 7 trigger elements set the time mark, repeat factor, and trigger type, covering single, continuous, merged, arbitration, reference-trigger, watch-trigger, and end-of-list.
src/main.csrc/main.c · Node1_Config
sTriggerConfig.TriggerIndex = 0;
sTriggerConfig.TimeMark = 5000;
sTriggerConfig.RepeatFactor = FDCAN_TT_REPEAT_EVERY_4TH_CYCLE;
sTriggerConfig.StartCycle = 0;
sTriggerConfig.TmEventInt = FDCAN_TT_TM_NO_INTERNAL_EVENT;
sTriggerConfig.TmEventExt = FDCAN_TT_TM_NO_EXTERNAL_EVENT;
sTriggerConfig.TriggerType = FDCAN_TT_TX_TRIGGER_SINGLE;
sTriggerConfig.FilterType = FDCAN_EXTENDED_ID;
sTriggerConfig.TxBufferIndex = FDCAN_TX_BUFFER1;
sTriggerConfig.FilterIndex = 0;
FDCAN_TT_ConfigTrigger(NODE1,&sTriggerConfig);
4. The main loop refreshes the Tx buffers. Initialization writes 4 frames into the Tx buffers and activates the requests, and afterwards they are re-requested once the transmission has completed.
src/main.csrc/main.c · main
if((NODE1->TXBTO & 0x0000001A) == 0x0000001A)
{
FDCAN_EnableTxBufferRequest(NODE1, 0x0000001A);
}
5. The slave checks the received data. Node 2 polls RX FIFO0 and compares the ID, type, data length, frame format, BRS, and data content; any mismatch prints an error and halts.
src/main.csrc/main.c · main
if((FDCAN_GetRxFifoFillLevel(NODE2, FDCAN_RX_FIFO0)!=0))
{
FDCAN_GetRxMsg(NODE2, FDCAN_RX_FIFO0, &RxHeader0, RxData0);
if(RxHeader0.ID!=0x1AAAA754)
{
printf("Id type error(filter 0).\r\n");
while(1);
}
Corresponding source files: src/main.c
5.12.3.6 TTCAN_Level2 time-triggered Level2
Example directory: projects/n32h49x_EVAL/examples/FDCAN/TTCAN_Level2/
Configure the FDCAN clock and both node pins→initialize the nodes and split the message RAM→configure the reference message and the trigger list→start the TTCAN schedule→the master and slave refresh their Tx buffers→the slave polls the receive FIFO and checks the data and status
| Item | Source analysis |
|---|---|
| Function | Shows TTCAN Level2 strict time-triggered operation: node 1 is the time master and node 2 both receives and sends one frame on a trigger; the slave polls the receive FIFOs and checks the data and the error level. |
| Source files | src/main.c: clock, pins, TTCAN node configuration, and the polling main loop;src/n32h49x_it.c: core exception handlers;inc/main.h: pin, peripheral, and clock macros;inc/n32h49x_it.h: exception handler declarations;readme.txt: features, the TTCAN matrix, and usage notes;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | Frame format FDCAN_FRAME_FD_BRS, BRS on, 8 data bytes, 500Kbps arbitration and 1Mbps data;mode FDCAN_TT_COMMUNICATION_LEVEL2, strictly TT operation (GapEnable=FDCAN_STRICTLY_TT_OPERATION);node 1 is a potential master with 5 Tx buffers, node 2 is a slave with 2 Tx buffers and 2 extended filters (0x1AAAA754, 0x1AAAA755); reference message ID=0x15555758, node 2 own frame ID=0x16666754 (time mark 30000). |
| Program and data path | main calls the clock, pin, and node configuration, then first writes 4 frames for node 1 and 1 frame for node 2 and activates the transmit requests;Node2_Config and Node1_Config fill FDCAN_TT_InitType and call FDCAN_TT_Init, then configure the reference message and trigger lists;the main loop re-sends the node 1 and node 2 Tx buffers according to the TXBTO status;node 2 uses FDCAN_TT_GetStatus and FDCAN_TT_GetFlag to check errors, then polls RX FIFO0/FIFO1 to check the data. |
| Main APIs | FDCAN_Init, FDCAN_TT_Init, FDCAN_TT_ConfigTrigger, FDCAN_AddMsgToTxBuffer, FDCAN_TT_GetStatus, FDCAN_TT_GetFlag, FDCAN_TT_ClearFlag, FDCAN_GetRxMsg |
| Verification | After reset the serial port prints “TTCAN Level2 Runing OK.”; node 2 takes frames from RX FIFO0/FIFO1 and checks the ID, type, data length, and data consistency; if the error level is non-zero or a schedule error occurs it prints an error message and halts. |
| Use note | Connect jump caps J8, J2, J15, J9, and do not connect J87, J89; the N32H497ZGL7_EVB V1.0 board needs two 120 ohm resistors R26 and R41 soldered; Level2 supports global time and external clock synchronization, so the master and slave must use consistent configuration; the development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1 on N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example makes the slave participate in sending under Level2 and places the error-level check and the data check in the same polling loop.
Data path: FDCAN_clock_src_config -> Node1_port_config/Node2_port_config -> Node2_Config/Node1_Config (FDCAN_Init -> FDCAN_TT_Init -> FDCAN_TT_ConfigRefMsg -> FDCAN_TT_ConfigTrigger) -> FDCAN_Start -> main loop refreshes the buffers and checks
1. Configure the Level2 time parameters. FDCAN_TT_InitType is filled before FDCAN_TT_Init, and the slave selects Level2 and specifies the slave role.
src/main.csrc/main.c · Node2_Config
pTTParams.OperationMode = FDCAN_TT_COMMUNICATION_LEVEL2;
pTTParams.GapEnable = FDCAN_STRICTLY_TT_OPERATION;
pTTParams.TimeMaster = FDCAN_TT_SLAVE;
pTTParams.SyncDevLimit = 7;
pTTParams.InitRefTrigOffset = 127;
2. Configure the reference message and the filters. The two filters route 0x1AAAA754 and 0x1AAAA755 into RX FIFO0 and RX FIFO1, and the reference message uses 0x15555758.
src/main.csrc/main.c · Node2_Config
FilterParam.IdType = FDCAN_EXTENDED_ID;
FilterParam.FilterIndex = 0;
FilterParam.FilterType = FDCAN_FILTER_MASK;
FilterParam.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
FilterParam.FilterID1 = 0x1AAAA754;
FilterParam.FilterID2 = 0x1FFFFFFF;
FDCAN_ConfigFilter(NODE2,&FilterParam);
3. Initialize and activate the Tx buffers. main first writes 4 frames for node 1 and 1 frame for node 2, then activates the corresponding transmit requests at once.
src/main.csrc/main.c · main
FDCAN_EnableTxBufferRequest(NODE1, 0x0000001E);
TxHeader.ID = 0x16666754;
FDCAN_AddMsgToTxBuffer(NODE2, &TxHeader, TxData, FDCAN_TX_BUFFER1);
FDCAN_EnableTxBufferRequest(NODE2, FDCAN_TX_BUFFER1);
4. The main loop re-sends by status. The main loop uses TXBTO to tell whether the previous round has been sent, then re-activates the transmit requests.
src/main.csrc/main.c · main
if((NODE2->TXBTO & 0x00000002) == 0x00000002)
{
FDCAN_EnableTxBufferRequest(NODE2, FDCAN_TX_BUFFER1);
}
5. Check the error level and the received data. FDCAN_TT_GetStatus is used first to read the error level, then the frame taken from RX FIFO0 is checked field by field.
src/main.csrc/main.c · main
FDCAN_TT_GetStatus(NODE2,&TTStatus0);
if(TTStatus0.ErrorLevel != 0)
{
if(TTStatus0.ErrorLevel == 3)
{
printf("Severity 3- Serious Error(filter 0).\r\n");
while(1);
}
Corresponding source files: src/main.c
5.12.4 Notes and troubleshooting
| Scenario | Check & action | Source |
|---|---|---|
| Configuration register write access | The configuration registers can be written only when both FDCAN_CCCR.INIT and FDCAN_CCCR.CCE are 1; CCE can be set or cleared only while INIT=1 and is cleared automatically when INIT is cleared; FDCAN_TXBAR and FDCAN_TXBCR are writable only when CCE=0. |
User manual |
| Message RAM allocation | The message RAM supports word (32-bit) access only, not byte access; FDCAN does not check message RAM configuration errors, so the start address and element count of each section must be kept in range and non-overlapping by yourself. |
User manual |
| Bit timing registers | FDCAN_DBTP and FDCAN_NBTP are accessible only when CCCR.CCE and CCCR.INIT are both 1, and the bit timing registers can be configured only while the device is in standby mode. | User manual |
| Transmitter delay compensation | The sum of the measured TX-to-RX delay and FDCAN_TDCR.TDCO must be less than 6 bit times of the data phase and not greater than 127 mtq; a value above 127 mtq is handled as the maximum 127 mtq. |
User manual |
| Restricted operation mode | Restricted operation mode cannot be combined with loopback mode (internal or external); the mode is entered automatically when the transmit handler does not read the message RAM in time, and software must reset FDCAN_CCCR.ASM to leave it. |
User manual |
| Power-down (sleep) mode | The CAN bus may fail to detect idle under severe interference, which can be checked by polling FDCAN_PSR.ACT; before leaving power-down mode, enable the module clock first, then reset FDCAN_CCCR.CSR. |
User manual |
| Test and loopback modes | Test mode is for production test or self-check only and is not recommended for real applications; internal loopback mode requires both FDCAN_TEST.LBCK and FDCAN_CCCR.MON to be set. |
User manual |
| Timeout counter | The timeout counter can be started only when FDCAN_CCCR.INIT=0; with BRS enabled, the counter clock differs between the arbitration phase and the data phase. |
User manual |
| Rx FIFO overwrite mode | In overwrite mode, when the FIFO is full, reading should start at least at the get index plus the offset to avoid reading inconsistent data; overwrite mode overwrites and discards the oldest message. |
User manual |
| FIFO acknowledge index | The application must write a valid FIFO acknowledge index; FDCAN does not check the written value; do not write the acknowledge index when reading FIFO elements out of order, or earlier elements are lost. |
User manual |
| Tx FIFO/queue write | When the FIFO or queue is full (FDCAN_TXFQS.TFQF=1), writing should stop, and the number of buffers requested for transmission should not exceed the number of free transmit buffers; the transmission cancel function does not apply to the Tx FIFO. |
User manual |
| TTCAN application watchdog | The TT application watchdog should not be disabled in TTCAN applications (FDCAN_TTOCF.AWL set to 0); a watchdog timeout sets FDCAN_TTOST.AWE, stops TT communication, and enters bus monitoring mode. |
User manual |
| TTCAN gap control | Gap control is effective only in externally event-synchronized time-triggered mode (FDCAN_TTOCF.GEN=1); under strictly time-triggered operation, Next_is_Gap, the event trigger pin, and the NIG, FGP, TMG bits are all ignored. |
User manual |
| TTCAN fatal error recovery | After a node enters fatal error (FDCAN_TTOST.EL=11), the host must set FDCAN_CCCR.INIT to 1 to leave it, and the node restarts TTCAN communication once INIT is reset. | User manual |