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5.8 DSMU Guide

This chapter describes the file composition of the DSMU driver in the N32H49x standard peripheral library, its 36 public functions, and the three examples DSMU_DataFilter, DSMU_ADCFilter, and DSMU_ExtADC. For hardware details such as Sigma-Delta modulation, the serial interface, channel clocks, and filters, read this chapter together with the “DSMU” chapter of the user manual.

5.8.1 Related files

Relative path Purpose
firmware/n32h49x_std_periph_driver/inc/n32h49x_dsmu.h Defines the channel and filter initialization structures, the channel and filter selection, interrupt and flag macros, and declares the 36 public functions grouped by channel, filter, conversion, and flag/interrupt sections
firmware/n32h49x_std_periph_driver/src/n32h49x_dsmu.c Implements the 36 functions: channel and filter reset, initialization and enable, channel data write and offset modification, regular/injected conversion start and stop, and flag, interrupt, and DMA configuration
projects/n32h49x_EVAL/examples/DSMU/ DSMU example root directory, containing the three examples DSMU_DataFilter, DSMU_ADCFilter, and DSMU_ExtADC
projects/n32h49x_EVAL/examples/DSMU/DSMU_ADCFilter/ The project directory layout of this example: MDK-ARM/, EWARM/, inc/, src/, readme.txt
projects/n32h49x_EVAL/bsp/ Board support files shared by the three examples: log initialization and print UART remapping

5.8.2 API reference

Search API36 functions

The following 36 public functions are grouped into 6 groups in the declaration order of n32h49x_dsmu.h; each entry gives a functional summary and the comment located directly above that function in n32h49x_dsmu.c.

Reset and initialization

DSMU_DeInit, DSMU_InitChannelStruct, DSMU_InitFilterStruct, DSMU_ChannelInit, DSMU_ChannelDeInit

Channel control

DSMU_ChannelCkAbEnable, DSMU_ChannelCkAbDisable, DSMU_ChannelScdStart, DSMU_ChannelScdStop, DSMU_ChannelGetAwdValue, DSMU_ChannelModifyOffset, DSMU_ChannelWriteData

Filter initialization and channel configuration

DSMU_FilterInit, DSMU_FilterEnable, DSMU_FilterConfigRegChannel, DSMU_FilterConfigInjChannel, DSMU_FilterGetRegularValue, DSMU_FilterGetInjectedValue

Analog watchdog and extreme detector

DSMU_FilterAwdStart, DSMU_FilterAwdStop, DSMU_FilterExdStart, DSMU_FilterExdStop, DSMU_FilterGetExdMaxValue, DSMU_FilterGetExdMinValue, DSMU_FilterGetConvTimeValue

Conversion control

DSMU_RegConvStart, DSMU_RegConvStop, DSMU_InjConvStart, DSMU_InjConvStop

Flags, interrupts and DMA

DSMU_GetFlagStatus, DSMU_ClearFlag, DSMU_GetAwdFlagStatus, DSMU_ClearAwdFlag, DSMU_ConfigInt, DSMU_ConfigRegChDMA, DSMU_ConfigInjChDMA

void DSMU_DeInit(void)Deinitialize the DSMU.
Source comment
name   DSMU_DeInit.
fun    Deinitialize the DSMU.
param  none.
return none.
void DSMU_InitChannelStruct(DSMU_Channel_InitType* DSMU_ChannelInitStruct)Set the initialize structure of DSMU channel to default value.
Source comment
name   DSMU_InitChannelStruct.
fun    Set the initialize structure of DSMU channel to default value.
param  DSMU_ChannelyInitStruct
          - OutputClock:
             - Activation
             - Selection
             - Divider
          - Input:
             - Multiplexer
             - DataPacking
             - Pins
          - SerialInterface
             - Type
             - SpiClock
          - Awd:
             - FilterOrder
             - Oversampling
          - Offset
          - RightBitShift
return none.
void DSMU_InitFilterStruct(DSMU_Filter_InitType* DSMU_FilterInitStruct)Set the initialize structure of DSMU filter to default value.
Source comment
name   DSMU_InitFilterStruct.
fun    Set the initialize structure of DSMU filter to default value.
param  DSMU_FilterInitStruct
          - RegularParam:
             - DmaMode
             - FastMode
             - Trigger
          - InjectedParam:
             - ScanMode
             - DmaMode
             - Trigger
             - ExtTrigger
          - FilterParam:
             - SincOrder
             - Oversampling
             - IntOversampling
return none.
ErrorStatus DSMU_ChannelInit(DSMU_Channel_Submodule* DSMU_Channely, DSMU_Channel_InitType* DSMU_ChannelInitStruct)Initialize the DSMU channel according to the specified parameters
Source comment
name   DSMU_ChannelInit.
fun    Initialize the DSMU channel according to the specified parameters
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
param  DSMU_ChannelyInitStruct
          - OutputClock:
             - Activation:
                - DISABLE
                - ENABLE
             - Selection:
                - DSMU_CHANNEL_OUTPUT_CLOCK_SYSTEM
                - DSMU_CHANNEL_OUTPUT_CLOCK_AUDIO
             - Divider:
                - This parameter must be a number between Min_Data = 2 and Max_Data = 256.
          - Input:
             - Multiplexer:
                - DSMU_CHANNEL_EXTERNAL_INPUTS
                - DSMU_CHANNEL_ADC_OUTPUT
                - DSMU_CHANNEL_INTERNAL_REGISTER
             - DataPacking:
                - DSMU_CHANNEL_STANDARD_MODE
                - DSMU_CHANNEL_INTERLEAVED_MODE
                - DSMU_CHANNEL_DUAL_MODE
             - Pins:
                - DSMU_CHANNEL_SAME_CHANNEL_PINS
                - DSMU_CHANNEL_FOLLOWING_CHANNEL_PINS
          - SerialInterface:
             - Type:
                - DSMU_CHANNEL_SPI_RISING
                - DSMU_CHANNEL_SPI_FALLING
                - DSMU_CHANNEL_MANCHESTER_RISING
                - DSMU_CHANNEL_MANCHESTER_FALLING
             - SpiClock:
                - DSMU_CHANNEL_SPI_CLOCK_EXTERNAL
                - DSMU_CHANNEL_SPI_CLOCK_INTERNAL
                - DSMU_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING
                - DSMU_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING
          - Awd:
             - FilterOrder:
                - DSMU_AWD_FASTSINC_ORDER
                - DSMU_AWD_SINC1_ORDER
                - DSMU_AWD_SINC2_ORDER
                - DSMU_AWD_SINC3_ORDER
             - Oversampling:
                - This parameter must be a number between Min_Data = 1 and Max_Data = 32.
          - Offset:
             - This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
          - RightBitShift:
             - This parameter must be a number between Min_Data = 0 and Max_Data = 31.
return ErrorStatus:
          - SUCCESS
          - ERROR
void DSMU_ChannelDeInit(DSMU_Channel_Submodule* DSMU_Channely)Deinitialize the DSMU channel
Source comment
name   DSMU_ChannelDeInit.
fun    Deinitialize the DSMU channel
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
return None.
void DSMU_ChannelCkAbEnable(DSMU_Channel_Submodule* DSMU_Channely)Enable clock absence detection
Source comment
name   DSMU_ChannelCkAbEnable.
fun    Enable clock absence detection
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
return none
void DSMU_ChannelCkAbDisable(DSMU_Channel_Submodule* DSMU_Channely)Disable clock absence detection
Source comment
name   DSMU_ChannelCkAbDisable.
fun    Disable clock absence detection
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
return  none
void DSMU_ChannelScdStart(DSMU_Channel_Submodule* DSMU_Channely,uint32_t Threshold, uint32_t BreakSignal)This function allows to start short circuit detection and assignment break signal.
Source comment
name   DSMU_ChannelScdStart.
fun    This function allows to start short circuit detection and assignment break signal.
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
param  Threshold Short circuit detector threshold.
              - This parameter must be a number between Min_Data = 0 and Max_Data = 255.
param  BreakSignal Break signals assigned to short circuit event.
          - DSMU_NO_BREAK_SIGNAL
          - DSMU_BREAK_SIGNAL_0
          - DSMU_BREAK_SIGNAL_1
          - DSMU_BREAK_SIGNAL_2
          - DSMU_BREAK_SIGNAL_3
return none
note   Same mode has to be used for all channels
void DSMU_ChannelScdStop(DSMU_Channel_Submodule* DSMU_Channely)This function allows to stop short circuit detection.
Source comment
name   DSMU_ChannelScdStop.
fun    This function allows to stop short circuit detection.
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
return  none
int16_t DSMU_ChannelGetAwdValue(const DSMU_Channel_Submodule* DSMU_Channely)This function allows to get analog watchdog value for current channel.
Source comment
name   DSMU_ChannelGetAwdValue.
fun    This function allows to get analog watchdog value for current channel.
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
return Channel analog watchdog value.
void DSMU_ChannelModifyOffset(DSMU_Channel_Submodule* DSMU_Channely, int32_t Offset)This function allows to modify channel offset value.
Source comment
name   DSMU_ChannelModifyOffset.
fun    This function allows to modify channel offset value.
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
param  Offset DFSDM channel offset.
              - This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
return none.
void DSMU_ChannelWriteData(DSMU_Channel_Submodule* DSMU_Channely,uint32_t data)This function allows to write data into input data register.
Source comment
name   DSMU_ChannelWriteData.
fun    This function allows to write data into input data register.
param  DSMU_Channely
          - DSMU_Channel0
          - DSMU_Channel1
          - DSMU_Channel2
          - DSMU_Channel3
          - DSMU_Channel4
          - DSMU_Channel5
          - DSMU_Channel6
          - DSMU_Channel7
param  data New data write by CPU.
return none.
ErrorStatus DSMU_FilterInit(DSMU_Filter_Submodule* DSMU_Filterx, DSMU_Filter_InitType* DSMU_FilterInitStruct)Initialize the DSMU filter according to the specified parameters
Source comment
name   DSMU_FilterInit.
fun    Initialize the DSMU filter according to the specified parameters
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  DSMU_FilterInitStruct
          - RegularParam:
             - DmaMode:
                - DISABLE
                - ENABLE
             - FastMode:
                - DISABLE
                - ENABLE
             - Trigger:
                - DSMU_FILTER_SW_TRIGGER
                - DSMU_FILTER_SYNC_TRIGGER
          - InjectedParam:
             - ScanMode:
                - DISABLE
                - ENABLE
             - DmaMode:
                - DISABLE
                - ENABLE
             - Trigger:
                - DSMU_FILTER_SW_TRIGGER
                - DSMU_FILTER_SYNC_TRIGGER
                - DSMU_FILTER_EXT_TRIGGER
             - ExtTrigger:
                - DSMU_FILTER_EXT_TRIG_ATIM1_TRGO
                - DSMU_FILTER_EXT_TRIG_ATIM2_TRGO
                - DSMU_FILTER_EXT_TRIG_ATIM3_TRGO
                - DSMU_FILTER_EXT_TRIG_ATIM4_TRGO
                - DSMU_FILTER_EXT_TRIG_GTIMB1_TRGO
                - DSMU_FILTER_EXT_TRIG_GTIMB2_TRGO
                - DSMU_FILTER_EXT_TRIG_GTIMB3_TRGO
                - DSMU_FILTER_EXT_TRIG_GTIMA1_TRGO
                - DSMU_FILTER_EXT_TRIG_GTIMA2_TRGO
                - DSMU_FILTER_EXT_TRIG_GTIMA3_TRGO
                - DSMU_FILTER_EXT_TRIG_GTIMA4_TRGO
                - DSMU_FILTER_EXT_TRIG_GTIMA5_TRGO
                - DSMU_FILTER_EXT_TRIG_ATIM1_TRGO2
                - DSMU_FILTER_EXT_TRIG_ATIM3_TRGO2
                - DSMU_FILTER_EXT_TRIG_SHRTIM1_ADC_TRG1
                - DSMU_FILTER_EXT_TRIG_SHRTIM1_ADC_TRG2
                - DSMU_FILTER_EXT_TRIG_SHRTIM1_ADC_TRG3
                - DSMU_FILTER_EXT_TRIG_SHRTIM1_ADC_TRG4
                - DSMU_FILTER_EXT_TRIG_SHRTIM2_ADC_TRG1
                - DSMU_FILTER_EXT_TRIG_SHRTIM2_ADC_TRG2
                - DSMU_FILTER_EXT_TRIG_SHRTIM2_ADC_TRG3
                - DSMU_FILTER_EXT_TRIG_SHRTIM2_ADC_TRG4
                - DSMU_FILTER_EXT_TRIG_EXTI6
                - DSMU_FILTER_EXT_TRIG_EXTI7
                - DSMU_FILTER_EXT_TRIG_EXTI8
                - DSMU_FILTER_EXT_TRIG_EXTI9
                - DSMU_FILTER_EXT_TRIG_EXTI10
                - DSMU_FILTER_EXT_TRIG_EXTI11
                - DSMU_FILTER_EXT_TRIG_EXTI12
                - DSMU_FILTER_EXT_TRIG_EXTI13
                - DSMU_FILTER_EXT_TRIG_EXTI14
                - DSMU_FILTER_EXT_TRIG_EXTI15
          - FilterParam:
             - SincOrder:
                - DSMU_FILTER_FASTSINC_ORDER
                - DSMU_FILTER_SINC1_ORDER
                - DSMU_FILTER_SINC2_ORDER
                - DSMU_FILTER_SINC3_ORDER
                - DSMU_FILTER_SINC4_ORDER
                - DSMU_FILTER_SINC5_ORDER
             - Oversampling:
                - This parameter must be a number between Min_Data = 1 and Max_Data = 1024.
             - IntOversampling:
                - This parameter must be a number between Min_Data = 1 and Max_Data = 256.
return  ErrorStatus.
          - SUCCESS
          - ERROR
void DSMU_FilterEnable(DSMU_Filter_Submodule* DSMU_Filterx, FunctionalState Cmd)Enable or Disable the DSMU filter.
Source comment
name   DSMU_FilterEnable.
fun    Enable or Disable the DSMU filter.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param   Cmd :
          - ENABLE
          - DISABLE
return None.
void DSMU_FilterConfigRegChannel(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t ChannelSelect,uint32_t ContinuousMode)This function allows to select regular channel and config continuous mode for regular conversion.
Source comment
name   DSMU_FilterConfigRegChannel.
fun    This function allows to select regular channel and
       config continuous mode for regular conversion.
param  DSMU_Filterx:
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  ChannelSelect:
          - DSMU_CHANNEL_SELECT_0
          - DSMU_CHANNEL_SELECT_1
          - DSMU_CHANNEL_SELECT_2
          - DSMU_CHANNEL_SELECT_3
          - DSMU_CHANNEL_SELECT_4
          - DSMU_CHANNEL_SELECT_5
          - DSMU_CHANNEL_SELECT_6
          - DSMU_CHANNEL_SELECT_7
param  ContinuousMode Enable/disable continuous mode for regular conversion.
          - DSMU_CONTINUOUS_CONV_OFF
          - DSMU_CONTINUOUS_CONV_ON
return  none
void DSMU_FilterConfigInjChannel(DSMU_Filter_Submodule* DSMU_Filterx,uint32_t ChannelSelect)This function allows to select channels for injected conversion.
Source comment
name   DSMU_FilterConfigInjChannel.
fun    This function allows to select channels for injected conversion.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  ChannelSelect:
          - DSMU_CHANNEL_SELECT_0
          - DSMU_CHANNEL_SELECT_1
          - DSMU_CHANNEL_SELECT_2
          - DSMU_CHANNEL_SELECT_3
          - DSMU_CHANNEL_SELECT_4
          - DSMU_CHANNEL_SELECT_5
          - DSMU_CHANNEL_SELECT_6
          - DSMU_CHANNEL_SELECT_7
return  none
int32_t DSMU_FilterGetRegularValue(const DSMU_Filter_Submodule* DSMU_Filterx, uint32_t* Channel)This function allows to get regular conversion value.
Source comment
name   DSMU_FilterGetRegularValue.
fun    This function allows to get regular conversion value.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  Channel Corresponding channel number of regular conversion.
return Regular conversion value
int32_t DSMU_FilterGetInjectedValue(const DSMU_Filter_Submodule* DSMU_Filterx,uint32_t* Channel)This function allows to get injected conversion value.
Source comment
name   DSMU_FilterGetInjectedValue.
fun    This function allows to get injected conversion value.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  Channel Corresponding channel number of injected conversion.
return Injected conversion value
void DSMU_FilterAwdStart(DSMU_Filter_Submodule* DSMU_Filterx, DSMU_Filter_AwdParamType* awdParam)This function allows to start filter analog watchdog.
Source comment
name   DSMU_FilterAwdStart.
fun    This function allows to start filter analog watchdog.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  awdParam DSMU filter analog watchdog parameters.
          - DataSource:
            - DSMU_FILTER_AWD_FILTER_DATA
            - DSMU_FILTER_AWD_CHANNEL_DATA
          - ChannelSelect:
            - DSMU_CHANNEL_SELECT_0
            - DSMU_CHANNEL_SELECT_1
            - DSMU_CHANNEL_SELECT_2
            - DSMU_CHANNEL_SELECT_3
            - DSMU_CHANNEL_SELECT_4
            - DSMU_CHANNEL_SELECT_5
            - DSMU_CHANNEL_SELECT_6
            - DSMU_CHANNEL_SELECT_7
          - HighThreshold:
             - This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
          - LowThreshold:
             - This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
          - HighBreakSignal:
            - DSMU_NO_BREAK_SIGNAL
            - DSMU_BREAK_SIGNAL_0
            - DSMU_BREAK_SIGNAL_1
            - DSMU_BREAK_SIGNAL_2
            - DSMU_BREAK_SIGNAL_3
          - LowBreakSignal:
            - DSMU_NO_BREAK_SIGNAL
            - DSMU_BREAK_SIGNAL_0
            - DSMU_BREAK_SIGNAL_1
            - DSMU_BREAK_SIGNAL_2
            - DSMU_BREAK_SIGNAL_3
return  none
void DSMU_FilterAwdStop(DSMU_Filter_Submodule* DSMU_Filterx)This function allows to stop filter analog watchdog.
Source comment
name   DSMU_FilterAwdStop.
fun    This function allows to stop filter analog watchdog.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
return  none
void DSMU_FilterExdStart(DSMU_Filter_Submodule* DSMU_Filterx,uint32_t ChannelSelect)This function allows to start extreme detector feature.
Source comment
name   DSMU_FilterExdStart.
fun    This function allows to start extreme detector feature.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  ChannelSelect:
          - DSMU_CHANNEL_SELECT_0
          - DSMU_CHANNEL_SELECT_1
          - DSMU_CHANNEL_SELECT_2
          - DSMU_CHANNEL_SELECT_3
          - DSMU_CHANNEL_SELECT_4
          - DSMU_CHANNEL_SELECT_5
          - DSMU_CHANNEL_SELECT_6
          - DSMU_CHANNEL_SELECT_7
return  none
void DSMU_FilterExdStop(DSMU_Filter_Submodule* DSMU_Filterx)This function allows to stop extreme detector feature.
Source comment
name   DSMU_FilterExdStop.
fun    This function allows to stop extreme detector feature.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
return  none
int32_t DSMU_FilterGetExdMaxValue(const DSMU_Filter_Submodule* DSMU_Filterx,uint32_t* Channel)This function allows to get extreme detector maximum value.
Source comment
name   DSMU_FilterGetExdMaxValue.
fun    This function allows to get extreme detector maximum value.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  Channel Corresponding channel.
return Extreme detector maximum value
          - This value is between Min_Data = -8388608 and Max_Data = 8388607.
int32_t DSMU_FilterGetExdMinValue(const DSMU_Filter_Submodule* DSMU_Filterx,uint32_t* Channel)This function allows to get extreme detector minimum value.
Source comment
name   DSMU_FilterGetExdMinValue.
fun    This function allows to get extreme detector minimum value.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  Channel Corresponding channel.
return Extreme detector minimum value
          - This value is between Min_Data = -8388608 and Max_Data = 8388607.
uint32_t DSMU_FilterGetConvTimeValue(const DSMU_Filter_Submodule* DSMU_Filterx)This function allows to get conversion time value.
Source comment
name   DSMU_FilterGetConvTimeValue.
fun    This function allows to get conversion time value.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
return Conversion time value
note   To get time in second, this value has to be divided by DSMU clock frequency.
void DSMU_RegConvStart(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t Trigger)This function allows to really start regular conversion.
Source comment
name   DSMU_RegConvStart.
fun    This function allows to really start regular conversion.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  Trigger
          - DSMU_FILTER_SW_TRIGGER
          - DSMU_FILTER_SYNC_TRIGGER
return None
void DSMU_RegConvStop(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t Trigger)This function allows to really stop regular conversion.
Source comment
name   DSMU_RegConvStop.
fun    This function allows to really stop regular conversion.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  Trigger
          - DSMU_FILTER_SW_TRIGGER
          - DSMU_FILTER_SYNC_TRIGGER
return None
void DSMU_InjConvStart(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t Trigger, uint32_t TiggerEdge)This function allows to really start injected conversion.
Source comment
name   DSMU_InjConvStart.
fun    This function allows to really start injected conversion.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  Trigger
          - DSMU_FILTER_SW_TRIGGER
          - DSMU_FILTER_SYNC_TRIGGER
          - DSMU_FILTER_EXT_TRIGGER
param  TiggerEdge
          - DSMU_FILTER_EXT_TRIG_DISABLE
          - DSMU_FILTER_EXT_TRIG_RISING_EDGE
          - DSMU_FILTER_EXT_TRIG_FALLING_EDGE
          - DSMU_FILTER_EXT_TRIG_BOTH_EDGES
return None
void DSMU_InjConvStop(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t Trigger)This function allows to really stop injected conversion.
Source comment
name   DSMU_InjConvStop.
fun    This function allows to really stop injected conversion.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param  Trigger
          - DSMU_FILTER_SW_TRIGGER
          - DSMU_FILTER_SYNC_TRIGGER
          - DSMU_FILTER_EXT_TRIGGER
return None
FlagStatus DSMU_GetFlagStatus(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t DSMU_IntFlag)Checks whether the DSMU flag has set or not.
Source comment
name   DSMU_GetFlagStatus.
fun    Checks whether the DSMU flag has set or not.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param   DSMU_Flag:
          This parameter must be one of the following:
          - DSMU_FLAG_SHORT_CIRCUIT_CH0
          - DSMU_FLAG_SHORT_CIRCUIT_CH1
          - DSMU_FLAG_SHORT_CIRCUIT_CH2
          - DSMU_FLAG_SHORT_CIRCUIT_CH3
          - DSMU_FLAG_SHORT_CIRCUIT_CH4
          - DSMU_FLAG_SHORT_CIRCUIT_CH5
          - DSMU_FLAG_SHORT_CIRCUIT_CH6
          - DSMU_FLAG_SHORT_CIRCUIT_CH7
          - DSMU_FLAG_CLOCK_ABSENCE_CH0
          - DSMU_FLAG_CLOCK_ABSENCE_CH1
          - DSMU_FLAG_CLOCK_ABSENCE_CH2
          - DSMU_FLAG_CLOCK_ABSENCE_CH3
          - DSMU_FLAG_CLOCK_ABSENCE_CH4
          - DSMU_FLAG_CLOCK_ABSENCE_CH5
          - DSMU_FLAG_CLOCK_ABSENCE_CH6
          - DSMU_FLAG_CLOCK_ABSENCE_CH7
          - DSMU_FLAG_REGULAR_ACTIVE
          - DSMU_FLAG_INJECT_ACTIVE
          - DSMU_FLAG_ANALOG_WATCHDOG
          - DSMU_FLAG_REGULAR_OVERRUN
          - DSMU_FLAG_INJECT_OVERRUN
          - DSMU_FLAG_REGULAR_END
          - DSMU_FLAG_INJECT_END
return FlagStatus:
          - SET
          - RESET
note: DSMU_FLAG_SHORT_CIRCUIT_CH0~7 and DSMU_FLAG_CLOCK_ABSENCE_CH0~7 only exist in DSMU_Filter0->FLTSTS.
void DSMU_ClearFlag(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t DSMU_IntFlagClear)Clears flags of the specified DSMU.
Source comment
name   DSMU_ClearFlag.
fun    Clears flags of the specified DSMU.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param   DSMU_FlagClear :
          This parameter must be one of the following:
          - DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH0
          - DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH1
          - DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH2
          - DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH3
          - DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH4
          - DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH5
          - DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH6
          - DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH7
          - DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH0
          - DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH1
          - DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH2
          - DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH3
          - DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH4
          - DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH5
          - DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH6
          - DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH7
          - DSMU_CLEAR_FLAG_REGULAR_OVERRUN
          - DSMU_CLEAR_FLAG_INJECT_OVERRUN
return    none.
note: DSMU_CLEAR_FLAG_SHORT_CIRCUIT_CH0~7 and DSMU_CLEAR_FLAG_CLOCK_ABSENCE_CH0~7 only exist in DSMU_Filter0->FLTINTCLR.
FlagStatus DSMU_GetAwdFlagStatus(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t DSMU_AwdFlag)Checks whether the DSMU analog watchdog flag has set or not.
Source comment
name   DSMU_GetAwdFlagStatus.
fun    Checks whether the DSMU analog watchdog flag has set or not.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param   DSMU_AwdFlag :
          - DSMU_AWD_FLAG_HIGH_THRESHLOD_CH0
          - DSMU_AWD_FLAG_HIGH_THRESHLOD_CH1
          - DSMU_AWD_FLAG_HIGH_THRESHLOD_CH2
          - DSMU_AWD_FLAG_HIGH_THRESHLOD_CH3
          - DSMU_AWD_FLAG_HIGH_THRESHLOD_CH4
          - DSMU_AWD_FLAG_HIGH_THRESHLOD_CH5
          - DSMU_AWD_FLAG_HIGH_THRESHLOD_CH6
          - DSMU_AWD_FLAG_HIGH_THRESHLOD_CH7
          - DSMU_AWD_FLAG_LOW_THRESHOLD_CH0
          - DSMU_AWD_FLAG_LOW_THRESHOLD_CH1
          - DSMU_AWD_FLAG_LOW_THRESHOLD_CH2
          - DSMU_AWD_FLAG_LOW_THRESHOLD_CH3
          - DSMU_AWD_FLAG_LOW_THRESHOLD_CH4
          - DSMU_AWD_FLAG_LOW_THRESHOLD_CH5
          - DSMU_AWD_FLAG_LOW_THRESHOLD_CH6
          - DSMU_AWD_FLAG_LOW_THRESHOLD_CH7
return FlagStatus:
          - SET
          - RESET
void DSMU_ClearAwdFlag(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t DSMU_AwdFlagClear)Clears analog watch dog flag of the specified DSMU.
Source comment
name   DSMU_ClearAwdFlag.
fun    Clears analog watch dog flag of the specified DSMU.
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param   DSMU_AwdFlagClear :
          - DSMU_CLEAR_AWD_FLAG_HIGH_THRESHLOD_CH0
          - DSMU_CLEAR_AWD_FLAG_HIGH_THRESHLOD_CH1
          - DSMU_CLEAR_AWD_FLAG_HIGH_THRESHLOD_CH2
          - DSMU_CLEAR_AWD_FLAG_HIGH_THRESHLOD_CH3
          - DSMU_CLEAR_AWD_FLAG_HIGH_THRESHLOD_CH4
          - DSMU_CLEAR_AWD_FLAG_HIGH_THRESHLOD_CH5
          - DSMU_CLEAR_AWD_FLAG_HIGH_THRESHLOD_CH6
          - DSMU_CLEAR_AWD_FLAG_HIGH_THRESHLOD_CH7
          - DSMU_CLEAR_AWD_FLAG_LOW_THRESHOLD_CH0
          - DSMU_CLEAR_AWD_FLAG_LOW_THRESHOLD_CH1
          - DSMU_CLEAR_AWD_FLAG_LOW_THRESHOLD_CH2
          - DSMU_CLEAR_AWD_FLAG_LOW_THRESHOLD_CH3
          - DSMU_CLEAR_AWD_FLAG_LOW_THRESHOLD_CH4
          - DSMU_CLEAR_AWD_FLAG_LOW_THRESHOLD_CH5
          - DSMU_CLEAR_AWD_FLAG_LOW_THRESHOLD_CH6
          - DSMU_CLEAR_AWD_FLAG_LOW_THRESHOLD_CH7
return    none.
void DSMU_ConfigInt(DSMU_Filter_Submodule* DSMU_Filterx, uint32_t DSMU_Int, FunctionalState Cmd)Enables or disables interrupt
Source comment
name   DSMU_ConfigInt
fun    Enables or disables interrupt
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param   DSMU_Int:
          This parameter must be one of the following:
          - DSMU_INT_CLOCK_ABSENCE
          - DSMU_INT_SHORT_CIRCUIT
          - DSMU_INT_ANALOG_WATCHDOG
          - DSMU_INT_REGULAR_OVERRUN
          - DSMU_INT_INJECT_OVERRUN
          - DSMU_INT_REGULAR_END
          - DSMU_INT_INJECT_END
param   Cmd :
          - ENABLE
          - DISABLE
return  none
note: DSMU_INT_CLOCK_ABSENCE and DSMU_INT_SHORT_CIRCUIT only exist in DSMU_Filter0->FLTCTRL2.
void DSMU_ConfigRegChDMA(DSMU_Filter_Submodule* DSMU_Filterx, FunctionalState Cmd)Enables or disables regular channel DMA
Source comment
name    DSMU_ConfigRegChDMA
fun     Enables or disables regular channel DMA
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param   Cmd :
          - ENABLE
          - DISABLE
return  none
void DSMU_ConfigInjChDMA(DSMU_Filter_Submodule* DSMU_Filterx, FunctionalState Cmd)Enables or disables injected channel DMA
Source comment
name    DSMU_ConfigInjChDMA
fun     Enables or disables injected channel DMA
param  DSMU_Filterx
          - DSMU_Filter0
          - DSMU_Filter1
          - DSMU_Filter2
          - DSMU_Filter3
param   Cmd :
          - ENABLE
          - DISABLE
return  none

5.8.3 Demo descriptions

This section describes the three DSMU examples: DSMU_DataFilter simulates the input by CPU writes to the data register and compares the jitter before and after filtering, DSMU_ADCFilter filters and oversamples the data sampled by the internal ADC2, and DSMU_ExtADC filters the serial data of an external Sigma-Delta ADC.

5.8.3.1 DSMU_DataFilter Filtering of data written by CPU

Example directory: projects/n32h49x_EVAL/examples/DSMU/DSMU_DataFilter/

Initialize the print UART and configure the DSMU clock→configure channel 0 for direct CPU writes and filter 0 for Sinc2 filtering with 16x oversampling→the main loop cyclically writes jittered input data to the channel 0 data register→the regular conversion end interrupt stores the filtering result into the output buffer→when the buffer is full, compute the jitter of the input and the output→the UART prints the jitter and judges whether the test passed

Item Source analysis
Function Demonstrates the basic use of the DSMU: jittered input is produced by direct CPU writes to the data register, and after the Sinc2 filter with 16x oversampling of filter 0, the jitter of the signal before and after filtering is computed and compared.
Source files src/main.c: main, DSMU_Configuration, the input data table DataOffset and the jitter statistics;
src/n32h49x_it.c: the DSMU_FLT0_IRQHandler interrupt service routine;
inc/main.h: included headers and macros;
readme.txt: function, environment, and usage notes;
MDK-ARM/, EWARM/: Keil and IAR projects.
Key configuration Channel 0 has Multiplexer set to DSMU_CHANNEL_INTERNAL_REGISTER, fed by CPU writes to the data register;
filter 0 is DSMU_FILTER_SINC2_ORDER with 16x filter oversampling and the integrator bypassed, the regular channel runs continuously and DSMU_INT_REGULAR_END is enabled.
The DSMU filter clock divider is RCC_DSMU_FLT_DIV2;
the system clock is HSI+PLL at 240 MHz.
Program and data path main configures the DSMU and computes the maximum positive and negative jitter of the input data, then enters the loop: each round writes BASE_DATA+DataOffset[...] to channel 0;
the regular conversion end interrupt stores the result of DSMU_FilterGetRegularValue into DataOut, and sets flag_data once 16 results are buffered;
after the flag is set main computes the output jitter, and after TEST_CYCLE rounds prints the input and output jitter and reports test OK or test fail.
Main APIs DSMU_ChannelInit, DSMU_FilterInit, DSMU_FilterConfigRegChannel, DSMU_ChannelWriteData, DSMU_ConfigInt, DSMU_RegConvStart, DSMU_FilterGetRegularValue
Verification After reset the UART prints DSMU data filter demo!;
at the end of the test it prints the +N/-N jitter of the input data and the jitter of the filtered output data;
when the output jitter is smaller than the input jitter it prints DSMU data filter test OK!, otherwise it prints DSMU test fail:x!.
Use note Data is amplified after passing through the filter and the integrator, so DSMU_Configuration first checks whether BASE_DATA would cause an overflow;
the absolute value of the input data must be smaller than MAX_DATA_OFFSET.
The development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1.
Core-code walkthrough and porting

The example passes data written by the CPU through the Sinc2 filter with 16x oversampling of filter 0, collects the results in the regular conversion end interrupt, and verifies the filtering effect by comparing the jitter.

Data path: CPU writes the DSMU_Channel0 data register → Sinc2 filter with 16x oversampling of filter 0 → regular conversion end interrupt → DSMU_FilterGetRegularValue fetches the result into DataOut → the main loop computes the jitter before and after filtering

1. Configure the channel and filter parameters. DSMU_Configuration fills in ChCfg and FilterCfg; the channel selects direct CPU input and the filter selects Sinc2 with 16x oversampling.

src/main.csrc/main.c · DSMU_Configuration
    /* Clock output parameter */
    ChCfg.OutputClock.Activation    = DISABLE;
    ChCfg.OutputClock.Selection     = DSMU_CHANNEL_OUTPUT_CLOCK_SYSTEM;
    ChCfg.OutputClock.Divider       = 1;

    /* Input channel parameter */
    ChCfg.Input.Multiplexer = DSMU_CHANNEL_INTERNAL_REGISTER;
    ChCfg.Input.DataPacking = DSMU_CHANNEL_STANDARD_MODE;
    ChCfg.Input.Pins        = DSMU_CHANNEL_SAME_CHANNEL_PINS;
src/main.csrc/main.c · DSMU_Configuration
    /* Filter function parameter */
    FilterCfg.FilterParam.SincOrder = FILTER_ORDER;
    FilterCfg.FilterParam.Oversampling = FILTER_OVERSAMPLE;
    FilterCfg.FilterParam.IntOversampling = INTEGRATOR_OVERSAMPLE;

    /* Config current filter */
    DSMU_FilterInit(DSMU_Filter0, &FilterCfg );

When the integrator oversampling is 1 the integrator is bypassed; RightBitShift takes the total number of oversampling bits of the filter and integrator and is used to restore the accumulated result to signed data.

2. Enable continuous conversion and the end interrupt, then start. The regular channel is configured for continuous mode, the regular conversion end interrupt is enabled, the NVIC is configured, and then the regular conversion is started.

src/main.csrc/main.c · DSMU_Configuration
    /* Enable regular channel in continuous mode */
    DSMU_FilterConfigRegChannel(DSMU_Filter0,DSMU_CHANNEL_SELECT_0,DSMU_CONTINUOUS_CONV_ON);
    
    /* Enable regular conversion end interrupt  */
    DSMU_ConfigInt(DSMU_Filter0,DSMU_INT_REGULAR_END, ENABLE);

    /* NVIC configuration */
    NVIC_Cfg.NVIC_IRQChannel = DSMU_FLT0_IRQn;
    NVIC_Cfg.NVIC_IRQChannelPreemptionPriority = 0;
    NVIC_Cfg.NVIC_IRQChannelSubPriority = 0;
    NVIC_Cfg.NVIC_IRQChannelCmd = ENABLE;
    NVIC_Init(&NVIC_Cfg);
    
    /* Start regular conversion*/
    DSMU_RegConvStart(DSMU_Filter0, DSMU_FILTER_SW_TRIGGER);

3. The main loop writes jittered input data. Each round writes the sum of the base value and the offset to channel 0 to simulate the input signal, and increments the input counter.

src/main.csrc/main.c · main
    while(1)
    {
        /* Input data by writting register */
        DSMU_ChannelWriteData(DSMU_Channel0,(uint32_t)(BASE_DATA+DataOffset[InputNum%INPUT_BUF_SIZE]));
        InputNum++;

The DataOffset[] array determines the amplitude and distribution of the input jitter, and BASE_DATA is the input base value; to change the simulated waveform only this array needs to be edited.

4. The interrupt service routine collects the filtering results. On a regular conversion end, DSMU_FLT0_IRQHandler reads the result, and once 16 results are buffered it sets the flag and increments the test count.

src/n32h49x_it.csrc/n32h49x_it.c · DSMU_FLT0_IRQHandler
    if(DSMU_GetFlagStatus(DSMU_Filter0, DSMU_FLAG_REGULAR_END) == SET)
    {
        DataOut[cnt] = DSMU_FilterGetRegularValue(DSMU_Filter0, &ch);

        cnt++;
        if(cnt < OutputBufSize)
        {
            return;
        }
        else
        {
            cnt = 0;
            TestCycle++;
            flag_data = 1;
        }
    }

Corresponding source files: src/main.c, src/n32h49x_it.c

5.8.3.2 DSMU_ADCFilter Filtering of ADC sampled data

Example directory: projects/n32h49x_EVAL/examples/DSMU/DSMU_ADCFilter/

Initialize the print UART and the DSMU and ADC2 clocks→route ADC2 channel 17 into the DSMU and set filter 0 to Sinc2 with 16x oversampling→start the ADC2 regular conversion and trigger it repeatedly in software→after each conversion reads the data back and feeds it into the DSMU filter→the regular conversion end interrupt collects the filtering results→when the buffer is full, disable the filter and print the ranges of the ADC and the filtered data

Item Source analysis
Function Demonstrates DSMU filtering and oversampling of the data sampled by the on-chip ADC: the conversion result of ADC2 channel 17 (PH3) is used as the DSMU input and, after the Sinc2 filter with 16x filter oversampling and 4x integrator oversampling of filter 0, the data ranges before and after filtering are compared.
Source files src/main.c: main, DSMU_Configuration, ADC2_Initial, ADC_GPIO_Configuration, GetDataRange;
src/n32h49x_it.c: the DSMU_FLT0_IRQHandler interrupt service routine;
inc/main.h: included headers and macros;
readme.txt: function, environment, and usage notes;
MDK-ARM/, EWARM/: Keil and IAR projects.
Key configuration ADC2 channel 17 (PH3) is an analog input with a sampling time of ADC_SAMP_TIME_CYCLES_28_5, in ADC_WORKMODE_INDEPENDENT mode with 12-bit resolution;
DSMU channel 1 has Multiplexer set to DSMU_CHANNEL_ADC_OUTPUT;
filter 0 is DSMU_FILTER_SINC2_ORDER with 16x filter oversampling and 4x integrator oversampling, the regular channel runs continuously and DSMU_INT_REGULAR_END is enabled.
The system clock is HSI+PLL at 240 MHz.
Program and data path main configures the DSMU and ADC2 and starts ADC2;
in the loop, whenever ADC_FLAG_ENDC is set it reads ADC_GetDat, clears the flags and restarts the conversion, and records the result into ADC_Data;
the regular conversion end interrupt stores the result of DSMU_FilterGetRegularValue into DataOut, and once 32 results are buffered it disables the filter and sets flag_data;
after leaving the loop main stops the ADC and prints the ranges of the ADC samples and the filtered data.
Main APIs DSMU_ChannelInit, DSMU_FilterInit, DSMU_FilterConfigRegChannel, DSMU_ConfigInt, DSMU_RegConvStart, DSMU_FilterGetRegularValue, DSMU_FilterEnable, ADC_SetAdcDSMUChannel, ADC_EnableAdcDSMU
Verification Connect jumper J18 first;
after reset the UART prints DSMU ADC data filter test start!;
at the end of the test it prints the count and range of the ADC samples before filtering and the range of the filtered data;
the spread of the filtered data should be smaller than that of the ADC samples, and finally it prints ADC data filter by DSMU test finish!.
Use note DSMU filtering greatly reduces the sample rate of the final data;
the DSMU supports data filtering of only 1 ADC regular channel, and ADC_SetAdcDSMUChannel cannot distinguish multiple ADC channels.
The development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1.
Core-code walkthrough and porting

The example lets the regular conversion result of ADC2 enter DSMU channel 1 automatically, has filter 0 perform Sinc2 with multiple oversampling, and then compares the data ranges before and after filtering.

Data path: ADC2 channel 17 (PH3) conversion → ADC_SetAdcDSMUChannel routes this channel into the DSMU → DSMU channel 1 (DSMU_CHANNEL_ADC_OUTPUT) → Sinc2 filter with 16x filter oversampling and 4x integrator oversampling of filter 0 → regular conversion end interrupt → DSMU_FilterGetRegularValue result stored into DataOut → the main loop prints the ranges before and after filtering

1. Calibrate ADC2 and route the channel into the DSMU. ADC2_Initial enables ADC2, waits until it is ready, performs a single-ended calibration, and then configures channel 17 as a regular channel and routes it into the DSMU.

src/main.csrc/main.c · ADC2_Initial
    /* Enable ADCx */
    ADC_Enable(ADC2, ENABLE);
    /*Check ADC Ready*/
    while(ADC_GetFlagStatus(ADC2,ADC_FLAG_RDY) == RESET)
        ;
    /* Start ADCx calibration */
    ADC_CalibrationOperation(ADC2, ADC_CALIBRATION_SINGLE_MODE);
    /* Check the end of ADCx calibration */
    while (ADC_GetCalibrationStatus(ADC2, ADC_CALIBRATION_SINGLE_MODE))
        ;
    
    /* ADC channel configuration */
    ADC_ConfigRegularChannel(ADC2, ADC2_Channel_17_PH3, 1, ADC_SAMP_TIME_CYCLES_28_5);
    ADC_SetAdcDSMUChannel(ADC2, ADC2_Channel_17_PH3,ENABLE);
    ADC_EnableAdcDSMU(ADC2, ENABLE);

Once the DSMU data source is changed to DSMU_CHANNEL_ADC_OUTPUT, the ADC2 conversion result is fed into channel 1 by hardware with no CPU transfers.

2. Configure the channel input source and the regular channel. Channel 1 selects the ADC output as its input, and the regular channel selects channel 1 and is configured for continuous conversion.

src/main.csrc/main.c · DSMU_Configuration
    /* Input channel parameter */
    ChCfg.Input.Multiplexer = DSMU_CHANNEL_ADC_OUTPUT;
    ChCfg.Input.DataPacking = DSMU_CHANNEL_STANDARD_MODE;
    ChCfg.Input.Pins        = DSMU_CHANNEL_SAME_CHANNEL_PINS;
src/main.csrc/main.c · DSMU_Configuration
    /* Enable regular channel in continuous mode */
    DSMU_FilterConfigRegChannel(DSMU_Filter0,DSMU_CHANNEL_SELECT_1,DSMU_CONTINUOUS_CONV_ON);

3. The main loop reads back the ADC and restarts the conversion. Whenever ADC_FLAG_ENDC is set it reads the data, clears the flags, and starts the software conversion again while the buffer is not full.

src/main.csrc/main.c · main
    while(1)
    {
        /* If DSMU output data buffer is full, break loop */
        if(flag_data)
        {
            break;
        }
        
        /* Get an ADC data, and start conversion again */
        if(ADC_GetFlagStatus(ADC2, ADC_FLAG_ENDC) == SET)
        {
            ADC_ClearFlag(ADC2, ADC_FLAG_ENDC);
            ADC_ClearFlag(ADC2, ADC_FLAG_STR);
            
            ADC_Data[ADC_DataCnt] = ADC_GetDat(ADC2);
            ADC_DataCnt++;
            if(ADC_DataCnt >= ADC_DATA_LENGTH)
            {
                break;
            }
            
            ADC_EnableSoftwareStartConv(ADC2, ENABLE);
        }
    }

4. The interrupt collects the results and disables the filter when the buffer is full. DSMU_FLT0_IRQHandler takes the filtering results one by one, and once the output length is reached disables the filter and sets the flag.

src/n32h49x_it.csrc/n32h49x_it.c · DSMU_FLT0_IRQHandler
    if(DSMU_GetFlagStatus(DSMU_Filter0, DSMU_FLAG_REGULAR_END) == SET)
    {
        if(DataOutCnt < OutputBufSize)
        {
            DataOut[DataOutCnt] = (uint16_t)DSMU_FilterGetRegularValue(DSMU_Filter0, &ch);
            DataOutCnt++;
        }
        
        if(DataOutCnt >= OutputBufSize)
        {
            DSMU_FilterEnable(DSMU_Filter0,DISABLE);
            flag_data = 1;
        }
    }

Corresponding source files: src/main.c, src/n32h49x_it.c

5.8.3.3 DSMU_ExtADC Filtering of external ADC data

Example directory: projects/n32h49x_EVAL/examples/DSMU/DSMU_ExtADC/

Initialize the print UART and the DMA and DSMU clocks→configure PD3 as the clock output and PD7 as the serial data input→channel 4 acquires data from an external Sigma-Delta ADC and filter 0 uses Sinc3 oversampling→the DMA moves the results out of the filter data register→the transfer complete interrupt disables the DMA and the filter→the UART prints 128 filtering results

Item Source analysis
Function Demonstrates DSMU processing of the serial data of an external Sigma-Delta ADC (NSI1306M25): PD3 outputs the DSMU clock and PD7 captures the ADC serial data;
after the Sinc3 filter with 32x oversampling of filter 0 the results are moved out by DMA and the UART prints 128 filtering results.
Source files src/main.c: main, DSMU_Configuration, DSMU_GPIO_Configuration, DSMU_DMA_Read_Config;
src/n32h49x_it.c: the DMA1_Channel1_IRQHandler interrupt service routine;
inc/main.h: included headers and macros;
readme.txt: function, environment, and usage notes;
MDK-ARM/, EWARM/: Keil and IAR projects.
Key configuration Channel 4 has Multiplexer set to DSMU_CHANNEL_EXTERNAL_INPUTS, with the serial interface set to DSMU_CHANNEL_SPI_FALLING and the internal SPI clock selected;
the output clock selects DSMU_CHANNEL_OUTPUT_CLOCK_SYSTEM with a divider of 12 (PD3-CKOUT, 20 MHz);
filter 0 is DSMU_FILTER_SINC3_ORDER with 32x filter oversampling and the integrator bypassed.
The system clock is HSI+PLL at 240 MHz;
DMA1 channel 1 moves 128 words from DSMU_Filter0->FLTRDATA.
Program and data path main initializes the log, the DMA, and the GPIO, then configures the DSMU and starts the regular conversion and the DMA;
DMA1 channel 1 moves 128 words in one transfer, and the transfer complete interrupt disables the DMA and the filter and sets flag_data;
after flag_data is set main prints each element of DataOut in turn (taking DSMU_FLTXRDAT_RDAT and shifting right by 8 bits, printed in decimal) and finally prints the test-finish message;
the regular channel is software-triggered and continuous.
Main APIs DSMU_ChannelInit, DSMU_FilterInit, DSMU_FilterConfigRegChannel, DSMU_RegConvStart, DSMU_FilterEnable, DMA_Init, DMA_RequestRemap, DMA_EnableChannel
Verification On the full-featured board, jumper the GND and VIN+ of J26 to another GND;
after reset the UART prints DSMU External Sigma-Delta ADC data filter test start!;
after the DMA has moved 128 words the UART outputs Filter data: and the 128 filtering results, and finally prints External Sigma-Delta ADC data filter by DSMU test finish!.
Use note Filtering through the DSMU greatly reduces the sample rate of the final data;
the serial data line of the external ADC is connected to PD7-DATIN4, and the sampling timing must match the SPI falling-edge configuration of this example.
The development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1.
Core-code walkthrough and porting

The example uses the DSMU to acquire serial data from an external Sigma-Delta ADC and, after Sinc3 filtering, has the DMA move out one whole block of results at once, avoiding repeated software reads.

Data path: the DSMU clock output on PD3 and the serial data on PD7 → DSMU channel 4 (DSMU_CHANNEL_EXTERNAL_INPUTS, SPI falling edge) → Sinc3 filter with 32x oversampling of filter 0 → continuous regular conversion → DMA1 channel 1 moves 128 words from DSMU_Filter0->FLTRDATA → the transfer complete interrupt disables the DMA and the filter → the UART prints the results

1. Define the filter parameters and output length with macros. The header region gives the filter order, the oversampling factors, the output data length, and the array and flag that hold the results.

src/main.csrc/main.c
/* Filter paramter for AD7402 15bit output:
    Data bits=3*log2(32)=15bits,
    and addtional 1 sign bit    */
#define FILTER_ORDER            (DSMU_FILTER_SINC3_ORDER)
#define FILTER_OVERSAMPLE       (32)    //must be 2^x
#define INTEGRATOR_OVERSAMPLE   (1)     //must be 2^x

/* Data offset define to get 16-bit sign data */
#define FILTER_DATA_OFFSET      (0)

/* DSMU output data size */
#define FILTER_DATA_LENGTH      (128)

/* Data after DMSU  filter */
int32_t DataOut[FILTER_DATA_LENGTH] = {0};
uint32_t DataOutCnt = 0;

uint32_t OutputBufSize = FILTER_DATA_LENGTH;

uint32_t flag_data = 0; /* Output data buf full */

FILTER_OVERSAMPLE and INTEGRATOR_OVERSAMPLE must be powers of two; Sinc3 with 32x oversampling corresponds to 15 bits of effective data plus 1 sign bit.

2. Configure the DSMU clock output and serial input pins. DSMU_GPIO_Configuration configures PD3 as an alternate push-pull output for the DSMU clock and PD7 as an alternate input for the serial data.

src/main.csrc/main.c · DSMU_GPIO_Configuration
    /* Configure PD3 as alternate output fuction DSMU_CKOUT */
    GPIO_InitStructure.Pin            = GPIO_PIN_3;
    GPIO_InitStructure.GPIO_Mode      = GPIO_MODE_AF_PP;
    GPIO_InitStructure.GPIO_Pull      = GPIO_NO_PULL;
    GPIO_InitStructure.GPIO_Current   = GPIO_DC_2mA;
    GPIO_InitStructure.GPIO_Slew_Rate = GPIO_SLEW_RATE_SLOW;
    GPIO_InitStructure.GPIO_Alternate = GPIO_AF_DSMU_CKOUT_PD3;
    GPIO_InitPeripheral(GPIOD, &GPIO_InitStructure );
    
    /* Configure PD7 as input mode with alternate fuction DSMU_DATIN4 */
    GPIO_InitStructure.Pin            = GPIO_PIN_7;
    GPIO_InitStructure.GPIO_Mode      = GPIO_MODE_INPUT;
    GPIO_InitStructure.GPIO_Alternate = GPIO_AF_DSMU_DATIN4_PD7;
    GPIO_InitPeripheral(GPIOD, &GPIO_InitStructure );

3. Configure the channel and filter and start the conversion. Channel 4 selects the external input and uses the internal SPI clock; the filter enables the regular channel DMA and is configured for continuous conversion, and finally the regular conversion is started in software.

src/main.csrc/main.c · DSMU_Configuration
    /* Clock output parameter */
    ChCfg.OutputClock.Activation    = ENABLE;
    ChCfg.OutputClock.Selection     = DSMU_CHANNEL_OUTPUT_CLOCK_SYSTEM;
    ChCfg.OutputClock.Divider       = 12;

    /* Input channel parameter */
    ChCfg.Input.Multiplexer = DSMU_CHANNEL_EXTERNAL_INPUTS;
    ChCfg.Input.DataPacking = DSMU_CHANNEL_STANDARD_MODE;
    ChCfg.Input.Pins        = DSMU_CHANNEL_SAME_CHANNEL_PINS;
src/main.csrc/main.c · DSMU_Configuration
    /* Regular channel parameter */
    FilterCfg.RegularParam.DmaMode = ENABLE;
    FilterCfg.RegularParam.FastMode = DISABLE;
    FilterCfg.RegularParam.Trigger = DSMU_FILTER_SW_TRIGGER;
src/main.csrc/main.c · DSMU_Configuration
    /* Enable regular channel in continuous mode */
    DSMU_FilterConfigRegChannel(DSMU_Filter0,DSMU_CHANNEL_SELECT_4,DSMU_CONTINUOUS_CONV_ON);
    
    /* Start regular conversion*/
    DSMU_RegConvStart(DSMU_Filter0, DSMU_FILTER_SW_TRIGGER);

4. Move the results out with the DMA and finish on completion. DSMU_DMA_Read_Config sets the source of DMA1 channel 1 to the filter data register, and the transfer complete interrupt disables the DMA and the filter.

src/main.csrc/main.c · DSMU_DMA_Read_Config
    /* Reset DMA1 channel 1*/
    DMA_DeInit(DMA1_CH1);
    /* Selcect DMA request as DSMU filter 0 */
    DMA_RequestRemap(DMA_REMAP_DSMU_FILT0,DMA1_CH1,ENABLE);
    
    /* Config channel 0 */
    DMA_Cfg.PeriphAddr     = (uint32_t)(&(DSMU_Filter0->FLTRDATA));
    DMA_Cfg.MemAddr        = (uint32_t)DstAddr;
    DMA_Cfg.Direction      = DMA_DIR_PERIPH_SRC;
    DMA_Cfg.BufSize        = DataLen;
    DMA_Cfg.PeriphInc      = DMA_PERIPH_INC_DISABLE;
    DMA_Cfg.MemoryInc      = DMA_MEM_INC_ENABLE;
    DMA_Cfg.PeriphDataSize = DMA_PERIPH_DATA_WIDTH_WORD;
    DMA_Cfg.MemDataSize    = DMA_MEM_DATA_WIDTH_WORD;
    DMA_Cfg.CircularMode   = DMA_MODE_NORMAL;
    DMA_Cfg.Priority       = DMA_PRIORITY_HIGH;
    DMA_Cfg.Mem2Mem        = DMA_M2M_DISABLE;
    DMA_Cfg.BurstCmd   = DMA_BURST_DISABLE;
    DMA_Cfg.BurstMode     = DMA_BURST_MODE_ALMOST;
    DMA_Cfg.BurstLen      = DMA_BURST_LEN_SINGLE;
    DMA_Init(DMA1_CH1, &DMA_Cfg);

    DMA_ConfigInt(DMA1_CH1,DMA_INT_TXC,ENABLE);
    DMA_EnableChannel(DMA1_CH1, ENABLE);
src/n32h49x_it.csrc/n32h49x_it.c · DMA1_Channel1_IRQHandler
    if (DMA_GetIntStatus(DMA_INT_TXC1, DMA1) != RESET)
    {
       /* Clear  pending bit */
        DMA_ClrIntPendingBit(DMA_INT_TXC1, DMA1);
        
        /* Disable DMA */
        DMA_EnableChannel(DMA1_CH1,DISABLE);
        
        /* Disable filter */
        DSMU_FilterEnable(DSMU_Filter0, DISABLE);
        
        flag_data = 1;
    }

Corresponding source files: src/main.c, src/n32h49x_it.c

5.8.4 Notes and troubleshooting

Scenario Check & action Source
Enable and stop constraints Disable the DSMU before entering STOP mode;
the DSMUEN, clock output source and divider bits can only be written while DSMUEN=0.		 User manual
Write timing of the configuration The channel input multiplexer, data packing, serial clock, bit shift, and AWD filter bits can only be written while the channel enable bit CHEN=0;
the filter trigger, scan, DMA, filter order, and oversampling bits can only be written while the filter enable bit DFLTEN=0.		 User manual
External trigger and serial clock The external trigger signal width must be at least 1 DSMU clock period;
the SPI clock range is 0-20 MHz and must be lower than f_DSMU_CLK/4, and the Manchester encoded clock range is 0-10 MHz and must be lower than f_DSMU_CLK/6.		 User manual
Dual mode and pin selection Dual mode applies only to even channels;
odd channels are write-protected;
in standard mode, when PDM is selected on two DATIN pins, an even channel must be paired with the odd channel immediately after it.		 User manual
Conversion start and channel enable Regular conversion can only be started by software, and only one regular conversion and one injected conversion are allowed at any time;
a conversion issued to a channel that is not enabled will never finish.		 User manual
Analog watchdog and DMA When AWDFOSR=0 the AWD filter is bypassed, and in that case it should be configured at a higher input rate;
when AWDFSEL=1 the AWD threshold uses only the upper 16 bits;
when the DMA is used to read results, do not read the same data register in software, and clear the corresponding status flag in the interrupt.		 User manual
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Datasheets, SDK, driver APIs and demo guides for Nations Technologies MCU development kits, organized by chip series.

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