AI FAE Platform5.1 ADC Guide
This chapter covers the file layout of the ADC driver in the N32H49x standard peripheral library, its 75 public functions, and the 12 examples. For the ADC clock tree, calibration, sample times, analog watchdog, and multi-ADC synchronization, read this chapter together with the ADC chapter of the user manual.
5.1.1 Related files
| Relative path | Purpose |
|---|---|
firmware/n32h49x_std_periph_driver/inc/n32h49x_adc.h |
Defines the ADC initialization and offset structures, the work modes, external triggers, sample times, analog watchdog, FIFO, and oversampling macros, and declares the 75 public functions |
firmware/n32h49x_std_periph_driver/src/n32h49x_adc.c |
Implements the 75 functions: reset, initialization and calibration, regular/injected channels and triggers, data read, analog watchdog, flags and interrupts, oversampling, offset and gain compensation, FIFO operations, and clock and power configuration |
projects/n32h49x_EVAL/examples/ADC/ |
ADC example root directory, with 12 examples: ADC1_DMA, ADC1_FIFOMode, ADC1_Oversampling, ADC1_TEMP, ADC_DifferentialMode, ADC_Gain_Offset, ADC_SingleRead, AnalogWDG_SimComp, AnalogWatchdog, ExtLinesTrigger, RegSimul_DualMode, TIMTrigger_AutoInjection |
projects/n32h49x_EVAL/examples/ADC/ADC1_DMA/ |
Composition of this example directory: MDK-ARM/, EWARM/, inc/, src/, readme.txt |
projects/n32h49x_EVAL/bsp/ |
Board support files shared by the examples: log initialization, the print UART remap, and delay functions |
5.1.2 API reference
The 75 public functions below are grouped in the declaration order of n32h49x_adc.h; each entry gives a summary and the verbatim comment above the function in n32h49x_adc.c.
Reset, initialization and calibration
ADC_DeInit, ADC_Init, ADC_InitStruct, ADC_Enable, ADC_SetDMATransferMode, ADC_CalibrationOperation, ADC_CalibrationReset, ADC_GetCalibrationStatus
Software start, stop and temperature sensor
ADC_EnableSoftwareStartConv, ADC_GetSoftwareStartConvStatus, ADC_EnableSoftwareStartInjectedConv, ADC_GetSoftwareStartInjectedConvCmdStatus, ADC_GetGainCompensationCmdStatus, ADC_EnableTempSensorVrefint, ADC_StopRegularConv, ADC_StopInjectedConv
Trigger and sampling control
ADC_SetRegularTriggerEdge, ADC_SetInjectTriggerEdge, ADC_SetMultiTwoSamplingDelay, ADC_ConfigDiscModeChannelCount, ADC_EnableDiscMode, ADC_ConfigRegularChannel
Result read and auto-injection
ADC_GetDat, ADC_GetMutiModeConversionDat, ADC_EnableAutoInjectedConv, ADC_EnableInjectedDiscMode, ADC_ConfigExternalTrigInjectedConv, ADC_ConfigExternalTrigRegularConv, ADC_ConfigInjectedChannel, ADC_ConfigInjectedSequencerLength, ADC_GetInjectedConversionDat
Analog watchdog
ADC_ConfigAnalogWatchdog1WorkChannelType, ADC_SetAWDG1FilteringConfig, ADC_ConfigAnalogWatchdogThresholds, ADC_ConfigAnalogWatchdog1SingleChannel, ADC_SetAnalogWatchdog23MonitChannels, ADC_GetAnalogWatchdog23MonitChannels, ADC_SetAnalogWatchdog23IntConfig, ADC_GetAnalogWatchdog23IntConfig, ADC_GetAnalogWatchdog23StatusFlag, ADC_ClearAnalogWatchdog23StatusFlag
Flags and interrupts
ADC_GetFlagStatus, ADC_ClearFlag, ADC_ConfigInt, ADC_GetIntStatus, ADC_ClearIntPendingBit
Differential, resolution and low-power configuration
ADC_SetChannelSingleDiff, ADC_SetCalibrationFactor, ADC_SetConvResultBitNum, ADC_SelectClockMode, ADC_EnableDeepSleepMode, ADC_SetBypassCalibration, ADC_EnableBatteryVoltageMonitor, ADC_EnableCalibrationAutoLoad
DSMU mode
ADC_EnableAdcDSMU, ADC_EnableMutiAdcDSMU, ADC_SetAdcDSMUChannel
Oversampling, offset and gain compensation
ADC_ConfigOverSamplingRatioAndShift, ADC_SetOverSamplingScope, ADC_EnableOverSamplingDiscont, ADC_SetOffsetConfig, ADC_GetOffsetConfig, ADC_SetGainCompensation
FIFO operations
ADC_ClearFIFO, ADC_EnableFIFO, ADC_GetFIFOInvalidedDataCount, ADC_GetFIFOFlagStatus, ADC_ClearFIFOFlag, ADC_ConfigFIFOWaterLevel, ADC_ConfigFIFOInt, ADC_ClearFIFOIntPendingBit
External line trigger, power and clock configuration
ADC_ConfigRegularExtLineTrigSource, ADC_ConfigInjectedExtLineTrigSource, ADC_ConfigADCPowerSupport, ADC_ConfigClk
void ADC_DeInit(ADC_Module* ADCx)Reset the ADC registers.
Source comment
name ADC_DeInit.
fun Reset the ADC registers.
param ADCx :
- ADC1
- ADC2
- ADC3
return none
void ADC_Init(ADC_Module* ADCx, ADC_InitType* ADC_InitStruct)Initializes the ADCx peripheral according to the specified parameters in the ADC_InitStruct.
Source comment
name ADC_Init.
fun Initializes the ADCx peripheral according to the specified parameters in the ADC_InitStruct.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_InitStruct :
- WorkMode
- ADC_WORKMODE_INDEPENDENT
- ADC_WORKMODE_DUAL_REG_INJECT_SIMULT
- ADC_WORKMODE_DUAL_REG_SIMULT_ALTER_TRIG
- ADC_WORKMODE_DUAL_INJ_SIMULT_INTERL
- ADC_WORKMODE_DUAL_INJ_SIMULT
- ADC_WORKMODE_DUAL_REG_SIMULT
- ADC_WORKMODE_DUAL_INTERL
- ADC_WORKMODE_DUAL_ALTER_TRIG
- ADC_WORKMODE_TRIPPLE_REG_INJECT_SIMULT
- ADC_WORKMODE_TRIPPLE_REG_SIMULT_ALTER_TRIG
- ADC_WORKMODE_TRIPPLE_INJ_SIMULT_INTERL
- ADC_WORKMODE_TRIPPLE_INJ_SIMULT
- ADC_WORKMODE_TRIPPLE_REG_SIMULT
- ADC_WORKMODE_TRIPPLE_INTERL
- ADC_WORKMODE_TRIPPLE_ALTER_TRIG
- MultiChEn
- ENABLE
- DISABLE
- ContinueConvEn
- ENABLE
- DISABLE
- ExtTrigSelect
- ADC_EXT_TRIG_REG_CONV_ATIM1_CC4
- ADC_EXT_TRIG_REG_CONV_ATIM1_TRGO
- ADC_EXT_TRIG_REG_CONV_ATIM1_TRGO2
- ADC_EXT_TRIG_REG_CONV_ATIM2_CC4
- ADC_EXT_TRIG_REG_CONV_ATIM2_TRGO
- ADC_EXT_TRIG_REG_CONV_ATIM2_TRGO2
- ADC_EXT_TRIG_REG_CONV_ATIM3_CC4
- ADC_EXT_TRIG_REG_CONV_ATIM3_TRGO
- ADC_EXT_TRIG_REG_CONV_ATIM3_TRGO2
- ADC_EXT_TRIG_REG_CONV_GTIM1_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM2_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM3_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM4_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM5_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM6_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM7_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM8_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM9_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM10_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM1_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM2_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM3_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM4_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM5_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM6_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM7_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM8_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM9_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM10_TRGO
- ADC_EXT_TRIG_REG_CONV_LPTIM1_OUT
- ADC_EXT_TRIG_REG_CONV_LPTIM2_OUT
- ADC_EXT_TRIG_REG_CONV_EXT_INT0_15
- ADC_EXT_TRIG_REG_CONV_SOFTWARE
- DatAlign
- ADC_DAT_ALIGN_R
- ADC_DAT_ALIGN_L
- Resolution
- ADC_DATA_RES_12BIT
- ADC_DATA_RES_10BIT
- ADC_DATA_RES_8BIT
- ADC_DATA_RES_6BIT
- ChsNumber: This parameter must be between 1 to 16.
return none
void ADC_InitStruct(ADC_InitType* ADC_InitStruct)Fills all ADC_InitStruct member with default value.
Source comment
name ADC_InitStruct.
fun Fills all ADC_InitStruct member with default value.
param ADC_InitStruct :
- WorkMode
- MultiChEn
- ContinueConvEn
- ExtTrigSelect
- DatAlign
- ChsNumber
- Resolution
return none
void ADC_Enable(ADC_Module* ADCx, FunctionalState Cmd)Configures the specified ADC enable or disable.
Source comment
name ADC_Enable.
fun Configures the specified ADC enable or disable.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_SetDMATransferMode(ADC_Module *ADCx, uint32_t DMAMode)Select the DMA mode for data transmission in multi-channels conversion.
Source comment
name ADC_SetDMATransferMode.
fun Select the DMA mode for data transmission in multi-channels conversion.
param ADCx :
- ADC1
- ADC2
- ADC3
param DMAMode :
- ADC_MULTI_REG_DMA_DISABLE :DMA Mode 0
- ADC_MULTI_REG_DMA_EACH_ADC :DMA Mode 1
- ADC_MULTI_REG_DMA_LIMIT_RES12_10B :DMA Mode 2
- ADC_MULTI_REG_DMA_LIMIT_RES8_6B :DMA Mode 3
return none
void ADC_CalibrationOperation(ADC_Module* ADCx, ADC_CALI_MOD cali_mode)Starts the selected ADC differential or signal mode calibration process.
Source comment
name ADC_CalibrationOperation.
fun Starts the selected ADC differential or signal mode calibration process.
param ADCx :
- ADC1
- ADC2
- ADC3
param cali_mode : specifies differential or signal mode of calibration.
- ADC_CALIBRATION_SINGLE_MODE
- ADC_CALIBRATION_DIFF_MODE
return none
void ADC_CalibrationReset(ADC_Module* ADCx, ADC_CALI_MOD cali_mode)Reset the selected ADC differential or signal mode calibration process.
Source comment
name ADC_CalibrationReset.
fun Reset the selected ADC differential or signal mode calibration process.
param ADCx :
- ADC1
- ADC2
- ADC3
param cali_mode : specifies differential or signal mode of calibration.
- ADC_CALIBRATION_SINGLE_MODE
- ADC_CALIBRATION_DIFF_MODE
return none
FlagStatus ADC_GetCalibrationStatus(ADC_Module* ADCx, ADC_CALI_MOD cali_mode)Gets the selected ADC calibration status.
Source comment
name ADC_GetCalibrationStatus.
fun Gets the selected ADC calibration status.
param ADCx :
- ADC1
- ADC2
- ADC3
param cali_mode : specifies differential or signal mode of calibration.
- ADC_CALIBRATION_SINGLE_MODE
- ADC_CALIBRATION_DIFF_MODE
return FlagStatus:
- RESET : ADCx calibration is finished;
- SET : ADCx calibration is not finished;
void ADC_EnableSoftwareStartConv(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the selected ADC software start conversion ..
Source comment
name ADC_EnableSoftwareStartConv.
fun Enables or disables the selected ADC software start conversion ..
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
FlagStatus ADC_GetSoftwareStartConvStatus(ADC_Module* ADCx)Gets the selected ADC Software start conversion Status.
Source comment
name ADC_GetSoftwareStartConvStatus.
fun Gets the selected ADC Software start conversion Status.
param ADCx :
- ADC1
- ADC2
- ADC3
return The new state of ADC software start conversion (SET or RESET).
void ADC_EnableSoftwareStartInjectedConv(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the selected ADC start of the injected channels conversion.
Source comment
name ADC_EnableSoftwareStartInjectedConv.
fun Enables or disables the selected ADC start of the injected channels conversion.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_Module* ADCx)Gets the selected ADC Software start injected conversion Status.
Source comment
name ADC_GetSoftwareStartInjectedConvCmdStatus.
fun Gets the selected ADC Software start injected conversion Status.
param ADCx :
- ADC1
- ADC2
- ADC3
return The new state of ADC software start injected conversion (SET or RESET).
FlagStatus ADC_GetGainCompensationCmdStatus(ADC_Module* ADCx)Gets the selected ADC gain compensation status.
Source comment
name ADC_GetGainCompensationCmdStatus.
fun Gets the selected ADC gain compensation status.
param ADCx :
- ADC1
- ADC2
- ADC3
return The new state of gain compensation (SET or RESET).
void ADC_EnableTempSensorVrefint(FunctionalState Cmd)Enables or disables the temperature sensor and Vrefint channel
Source comment
name ADC_EnableTempSensorVrefint.
fun Enables or disables the temperature sensor and Vrefint channel
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_StopRegularConv(ADC_Module* ADCx)Stop ADC group regular channels conversion.
Source comment
name ADC_StopRegularConv.
fun Stop ADC group regular channels conversion.
param ADCx :
- ADC1
- ADC2
- ADC3
return none
void ADC_StopInjectedConv(ADC_Module* ADCx)Stop ADC group injected channels conversion.
Source comment
name ADC_StopInjectedConv.
fun Stop ADC group injected channels conversion.
param ADCx :
- ADC1
- ADC2
- ADC3
return none
void ADC_SetRegularTriggerEdge(ADC_Module* ADCx, uint32_t ExternalRegularTriggerEdge)Set ADCx group regular conversion trigger polarity.
Source comment
name ADC_SetRegularTriggerEdge.
fun Set ADCx group regular conversion trigger polarity.
param ADCx :
- ADC1
- ADC2
- ADC3
param ExternalRegularTriggerEdge :
- ADC_REG_TRIG_EXT_SOFTWARE
- ADC_REG_TRIG_EXT_RISING
- ADC_REG_TRIG_EXT_FALLING
- ADC_REG_TRIG_EXT_RISINGFALLING
return none
void ADC_SetInjectTriggerEdge(ADC_Module* ADCx, uint32_t ExternalInjectTriggerEdge)Set ADCx group injected conversion trigger polarity.
Source comment
name ADC_SetInjectTriggerEdge.
fun Set ADCx group injected conversion trigger polarity.
param ADCx :
- ADC1
- ADC2
- ADC3
param ExternalInjectTriggerEdge :
- ADC_INJ_TRIG_EXT_SOFTWARE
- ADC_INJ_TRIG_EXT_RISING
- ADC_INJ_TRIG_EXT_FALLING
- ADC_INJ_TRIG_EXT_RISINGFALLING
return none
void ADC_SetMultiTwoSamplingDelay(ADC_Module* ADCx, uint32_t MultiTwoSamplingDelay)Set ADC multimode delay between 2 sampling phases.
Source comment
name ADC_SetMultiTwoSamplingDelay.
fun Set ADC multimode delay between 2 sampling phases.
param ADCx :
- ADC1
- ADC2
- ADC3
param MultiTwoSamplingDelay
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_1
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_2
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_3
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_4
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_5
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_6
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_7
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_8
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_9
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_10
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_11
- ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_12
return none
note 1.When ADC resolution is 12, the maximum of the parameter 'MultiTwoSamplingDelay' \
can be set ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_12.
2.When ADC resolution is 10, the maximum of the parameter 'MultiTwoSamplingDelay' \
can be set ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_10.
3.When ADC resolution is 8, the maximum of the parameter 'MultiTwoSamplingDelay' \
can be set ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_8.
4.When ADC resolution is 6, the maximum of the parameter 'MultiTwoSamplingDelay' \
can be set ADC_ADC_MULTI_TWOSMP_DELAY_CYCLE_6.
void ADC_ConfigDiscModeChannelCount(ADC_Module* ADCx, uint8_t Number)Configures the discontinuous numbers for the selected ADC regular group channels.
Source comment
name ADC_ConfigDiscModeChannelCount.
fun Configures the discontinuous numbers for the selected ADC regular
group channels.
param ADCx :
- ADC1
- ADC2
- ADC3
param Number : specifies the discontinuous mode regular channel
count value. This number must be range form 1 to 8.
return none
void ADC_EnableDiscMode(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the discontinuous mode on regular group
Source comment
name ADC_EnableDiscMode.
fun Enables or disables the discontinuous mode on regular group
\* channel for the specified ADC.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_ConfigRegularChannel(ADC_Module* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)Configures for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
Source comment
name ADC_ConfigRegularChannel.
fun Configures for the selected ADC regular channel its corresponding
rank in the sequencer and its sample time.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_Channel :
- ADC_CH_0 : ADC Channel0 selected
- ADC_CH_1 : ADC Channel1 selected
- ADC_CH_2 : ADC Channel2 selected
- ADC_CH_3 : ADC Channel3 selected
- ADC_CH_4 : ADC Channel4 selected
- ADC_CH_5 : ADC Channel5 selected
- ADC_CH_6 : ADC Channel6 selected
- ADC_CH_7 : ADC Channel7 selected
- ADC_CH_8 : ADC Channel8 selected
- ADC_CH_9 : ADC Channel9 selected
- ADC_CH_10 : ADC Channel10 selected
- ADC_CH_11 : ADC Channel11 selected
- ADC_CH_12 : ADC Channel12 selected
- ADC_CH_13 : ADC Channel13 selected
- ADC_CH_14 : ADC Channel14 selected
- ADC_CH_15 : ADC Channel15 selected
- ADC_CH_16 : ADC Channel16 selected
- ADC_CH_17 : ADC Channel17 selected
- ADC_CH_18 : ADC Channel18 selected
param Rank : The rank in the regular group sequencer. This parameter must be between 1 to 16.
param ADC_SampleTime : The sample time value to be set for the selected channel.
- ADC_SAMP_TIME_CYCLES_1_5
- ADC_SAMP_TIME_CYCLES_2_5
- ADC_SAMP_TIME_CYCLES_4_5
- ADC_SAMP_TIME_CYCLES_7_5
- ADC_SAMP_TIME_CYCLES_13_5
- ADC_SAMP_TIME_CYCLES_19_5
- ADC_SAMP_TIME_CYCLES_28_5
- ADC_SAMP_TIME_CYCLES_41_5
- ADC_SAMP_TIME_CYCLES_55_5
- ADC_SAMP_TIME_CYCLES_61_5
- ADC_SAMP_TIME_CYCLES_71_5
- ADC_SAMP_TIME_CYCLES_181_5
- ADC_SAMP_TIME_CYCLES_239_5
- ADC_SAMP_TIME_CYCLES_601_5
return none
uint16_t ADC_GetDat(ADC_Module* ADCx)Get the last ADCx conversion result data for regular channel
Source comment
name ADC_GetDat.
fun Get the last ADCx conversion result data for regular channel
param ADCx :
- ADC1
- ADC2
- ADC3
return The Data conversion value.
uint32_t ADC_GetMutiModeConversionDat(ADC_Module* ADCx)Get the last ADC conversion result data in dual-ADC or tripple-ADC mode.
Source comment
name ADC_GetMutiModeConversionDat.
fun Get the last ADC conversion result data in dual-ADC or tripple-ADC mode.
param ADCx :
- ADC1
- ADC2
- ADC3
return The Data conversion value in dual-ADC or tripple-ADC mode.
void ADC_EnableAutoInjectedConv(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the selected ADC automatic injected group conversion after regular one
Source comment
name ADC_EnableAutoInjectedConv.
fun Enables or disables the selected ADC automatic injected group
conversion after regular one
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_EnableInjectedDiscMode(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the discontinuous mode on injected group
Source comment
name ADC_EnableInjectedDiscMode.
fun Enables or disables the discontinuous mode on injected group
\* channel for the specified ADC.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_ConfigExternalTrigInjectedConv(ADC_Module* ADCx, uint32_t ADC_ExternalTrigInjecConv)Configures the ADCx external trigger source for injected channels conversion.
Source comment
name ADC_ConfigExternalTrigInjectedConv.
fun Configures the ADCx external trigger source for injected channels conversion.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_ExternalTrigInjecConv :
- ADC_EXT_TRIG_INJ_CONV_ATIM1_CC4
- ADC_EXT_TRIG_INJ_CONV_ATIM1_TRGO
- ADC_EXT_TRIG_INJ_CONV_ATIM1_TRGO2
- ADC_EXT_TRIG_INJ_CONV_ATIM2_CC4
- ADC_EXT_TRIG_INJ_CONV_ATIM2_TRGO
- ADC_EXT_TRIG_INJ_CONV_ATIM2_TRGO2
- ADC_EXT_TRIG_INJ_CONV_ATIM3_CC4
- ADC_EXT_TRIG_INJ_CONV_ATIM3_TRGO
- ADC_EXT_TRIG_INJ_CONV_ATIM3_TRGO2
- ADC_EXT_TRIG_INJ_CONV_GTIM1_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM2_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM3_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM4_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM5_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM6_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM7_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM8_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM9_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM10_CC4
- ADC_EXT_TRIG_INJ_CONV_GTIM1_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM2_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM3_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM4_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM5_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM6_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM7_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM8_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM9_TRGO
- ADC_EXT_TRIG_INJ_CONV_GTIM10_TRGO
- ADC_EXT_TRIG_INJ_CONV_LPTIM1_OUT
- ADC_EXT_TRIG_INJ_CONV_LPTIM2_OUT
- ADC_EXT_TRIG_INJ_CONV_EXT_INT0_15
- ADC_EXT_TRIG_INJ_CONV_SOFTWARE
return none
void ADC_ConfigExternalTrigRegularConv(ADC_Module* ADCx, uint32_t ADC_ExternalTrigRegularConv)Configures the ADCx external trigger source for regular channels conversion.
Source comment
name ADC_ConfigExternalTrigRegularConv.
fun Configures the ADCx external trigger source for regular channels conversion.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_ExternalTrigRegularConv :
- ADC_EXT_TRIG_REG_CONV_ATIM1_CC4
- ADC_EXT_TRIG_REG_CONV_ATIM1_TRGO
- ADC_EXT_TRIG_REG_CONV_ATIM1_TRGO2
- ADC_EXT_TRIG_REG_CONV_ATIM2_CC4
- ADC_EXT_TRIG_REG_CONV_ATIM2_TRGO
- ADC_EXT_TRIG_REG_CONV_ATIM2_TRGO2
- ADC_EXT_TRIG_REG_CONV_ATIM3_CC4
- ADC_EXT_TRIG_REG_CONV_ATIM3_TRGO
- ADC_EXT_TRIG_REG_CONV_ATIM3_TRGO2
- ADC_EXT_TRIG_REG_CONV_GTIM1_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM2_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM3_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM4_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM5_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM6_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM7_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM8_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM9_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM10_CC4
- ADC_EXT_TRIG_REG_CONV_GTIM1_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM2_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM3_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM4_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM5_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM6_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM7_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM8_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM9_TRGO
- ADC_EXT_TRIG_REG_CONV_GTIM10_TRGO
- ADC_EXT_TRIG_REG_CONV_LPTIM1_OUT
- ADC_EXT_TRIG_REG_CONV_LPTIM2_OUT
- ADC_EXT_TRIG_REG_CONV_EXT_INT0_15
- ADC_EXT_TRIG_REG_CONV_SOFTWARE
return none
void ADC_ConfigInjectedChannel(ADC_Module* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time.
Source comment
name ADC_ConfigInjectedChannel.
fun Configures for the selected ADC injected channel its corresponding
rank in the sequencer and its sample time.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_Channel :
- ADC_CH_0 : ADC Channel0 selected
- ADC_CH_1 : ADC Channel1 selected
- ADC_CH_2 : ADC Channel2 selected
- ADC_CH_3 : ADC Channel3 selected
- ADC_CH_4 : ADC Channel4 selected
- ADC_CH_5 : ADC Channel5 selected
- ADC_CH_6 : ADC Channel6 selected
- ADC_CH_7 : ADC Channel7 selected
- ADC_CH_8 : ADC Channel8 selected
- ADC_CH_9 : ADC Channel9 selected
- ADC_CH_10 : ADC Channel10 selected
- ADC_CH_11 : ADC Channel11 selected
- ADC_CH_12 : ADC Channel12 selected
- ADC_CH_13 : ADC Channel13 selected
- ADC_CH_14 : ADC Channel14 selected
- ADC_CH_15 : ADC Channel15 selected
- ADC_CH_16 : ADC Channel16 selected
- ADC_CH_17 : ADC Channel17 selected
- ADC_CH_18 : ADC Channel18 selected
param Rank : The rank in the injected group sequencer. This parameter must be between 1 to 4.
param ADC_SampleTime : The sample time value to be set for the selected channel.
- ADC_SAMP_TIME_CYCLES_1_5
- ADC_SAMP_TIME_CYCLES_2_5
- ADC_SAMP_TIME_CYCLES_4_5
- ADC_SAMP_TIME_CYCLES_7_5
- ADC_SAMP_TIME_CYCLES_13_5
- ADC_SAMP_TIME_CYCLES_19_5
- ADC_SAMP_TIME_CYCLES_28_5
- ADC_SAMP_TIME_CYCLES_41_5
- ADC_SAMP_TIME_CYCLES_55_5
- ADC_SAMP_TIME_CYCLES_61_5
- ADC_SAMP_TIME_CYCLES_71_5
- ADC_SAMP_TIME_CYCLES_181_5
- ADC_SAMP_TIME_CYCLES_239_5
- ADC_SAMP_TIME_CYCLES_601_5
return none
void ADC_ConfigInjectedSequencerLength(ADC_Module* ADCx, uint8_t Length)Configures the sequencer length for injected channels
Source comment
name ADC_ConfigInjectedSequencerLength.
fun Configures the sequencer length for injected channels
param ADCx :
- ADC1
- ADC2
- ADC3
param Length : The sequencer length. This parameter must be a number between 1 to 4.
uint16_t ADC_GetInjectedConversionDat(ADC_Module* ADCx, uint8_t ADC_InjectedChannel)Get the ADC injected channel conversion result.
Source comment
name ADC_GetInjectedConversionDat.
fun Get the ADC injected channel conversion result.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_InjectedChannelOffset :
- ADC_INJECT_DATA_OFFSET_1
- ADC_INJECT_DATA_OFFSET_2
- ADC_INJECT_DATA_OFFSET_3
- ADC_INJECT_DATA_OFFSET_4
return The data conversion value. this date is range 0 - 0xFFFF.
void ADC_ConfigAnalogWatchdog1WorkChannelType(ADC_Module* ADCx, uint32_t ADC_AnalogWatchdog)Enables or disables the analog watchdog 1 on single/all regular or injected channels.
Source comment
name ADC_ConfigAnalogWatchdog1WorkChannelType.
fun Enables or disables the analog watchdog 1 on single/all regular or injected channels.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_AnalogWatchdog :
- ADC_ANALOG_WTDG_NONE
- ADC_ANALOG_WTDG_SINGLEREG_ENABLE
- ADC_ANALOG_WTDG_SINGLEINJEC_ENABLE
- ADC_ANALOG_WTDG_SINGLEREG_OR_INJEC_ENABLE
- ADC_ANALOG_WTDG_ALLREG_ENABLE
- ADC_ANALOG_WTDG_ALLINJEC_ENABLE
- ADC_ANALOG_WTDG_ALLREG_ALLINJEC_ENABLE
return none.
void ADC_SetAWDG1FilteringConfig(ADC_Module *ADCx, uint32_t FilteringCount)Set ADC analog watchdog filtering configuration.
Source comment
name ADC_SetAWDG1FilteringConfig.
fun Set ADC analog watchdog filtering configuration.
param ADCx :
- ADC1
- ADC2
- ADC3
param FilteringCount :
- ADC_AWDG1_FILTERING_NONE
- ADC_AWDG1_FILTERING_2SAMPLES
- ADC_AWDG1_FILTERING_3SAMPLES
- ADC_AWDG1_FILTERING_4SAMPLES
- ADC_AWDG1_FILTERING_5SAMPLES
- ADC_AWDG1_FILTERING_6SAMPLES
- ADC_AWDG1_FILTERING_7SAMPLES
- ADC_AWDG1_FILTERING_8SAMPLES
return none.
void ADC_ConfigAnalogWatchdogThresholds(ADC_Module* ADCx, ADC_AWDG Awdg, uint16_t HighThreshold, uint16_t LowThreshold)Configures the high and low thresholds of the analog watchdog 1/2/3.
Source comment
name ADC_ConfigAnalogWatchdogThresholds.
fun Configures the high and low thresholds of the analog watchdog 1/2/3.
param ADCx :
- ADC1
- ADC2
- ADC3
param Awdg :
- ADC_AWDG1
- ADC_AWDG2
- ADC_AWDG3
param HighThreshold : the ADC analog watchdog 1/2/3 high threshold value.
- This parameter must be a 12bit value.
param LowThreshold : the ADC analog watchdog 1/2/3 low threshold value.
- This parameter must be a 12bit value.
return none
void ADC_ConfigAnalogWatchdog1SingleChannel(ADC_Module* ADCx, uint8_t ADC_Channel)Configures the analog watchdog 1 guarded on single channel.
Source comment
name ADC_ConfigAnalogWatchdog1SingleChannel.
fun Configures the analog watchdog 1 guarded on single channel.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_AnalogWatchdog :
- ADC_CH_0 : ADC Channel0 selected
- ADC_CH_1 : ADC Channel1 selected
- ADC_CH_2 : ADC Channel2 selected
- ADC_CH_3 : ADC Channel3 selected
- ADC_CH_4 : ADC Channel4 selected
- ADC_CH_5 : ADC Channel5 selected
- ADC_CH_6 : ADC Channel6 selected
- ADC_CH_7 : ADC Channel7 selected
- ADC_CH_8 : ADC Channel8 selected
- ADC_CH_9 : ADC Channel9 selected
- ADC_CH_10 : ADC Channel10 selected
- ADC_CH_11 : ADC Channel11 selected
- ADC_CH_12 : ADC Channel12 selected
- ADC_CH_13 : ADC Channel13 selected
- ADC_CH_14 : ADC Channel14 selected
- ADC_CH_15 : ADC Channel15 selected
- ADC_CH_16 : ADC Channel16 selected
- ADC_CH_17 : ADC Channel17 selected
- ADC_CH_18 : ADC Channel18 selected
return none.
void ADC_SetAnalogWatchdog23MonitChannels(ADC_Module* ADCx, uint8_t AWDG_RegEnOffset, uint32_t AWDG_ChannelGroup)Set ADC analog watchdog 2/3 monitored channels: a single channel, multiple channels or all channels.
Source comment
name ADC_SetAnalogWatchdog23MonitChannels.
fun Set ADC analog watchdog 2/3 monitored channels: a single channel, multiple channels or all channels.
param ADCx :
- ADC1
- ADC2
- ADC3
param AWDG_RegEnOffset :
- ADC_AWDG2_EN_OFFSET : config analog watchdog 2.
- ADC_AWDG3_EN_OFFSET : config analog watchdog 3.
param AWDG_ChannelGroup : channels monitored: flexible on channels monitored, selection is
channel wise, from from 1 to all channels. Specificity of this analog watchdog:
Multiple channels can be selected.eg : 0x00000005 mean CH0 and CH2 are monitored.
0x00000000 mean this analog watchdog disable.
return none.
uint32_t ADC_GetAnalogWatchdog23MonitChannels(ADC_Module* ADCx, uint8_t AWDG_RegEnOffset)Get ADC analog watchdog 2/3 monitored channels.
Source comment
name ADC_GetAnalogWatchdog23MonitChannels.
fun Get ADC analog watchdog 2/3 monitored channels.
param ADCx :
- ADC1
- ADC2
- ADC3
param AWDG_RegEnOffset :
- ADC_AWDG2_EN_OFFSET : analog watchdog 2.
- ADC_AWDG3_EN_OFFSET : analog watchdog 3.
return channels monitored by this analog watchdog2/3.
void ADC_SetAnalogWatchdog23IntConfig(ADC_Module* ADCx, uint8_t AWDG_RegIntEnOffset, uint32_t AWDG_ChannelEn)Enable or disable ADC analog watchdog 2/3 monitored channels interrupt.
Source comment
name ADC_SetAnalogWatchdog23IntConfig.
fun Enable or disable ADC analog watchdog 2/3 monitored channels interrupt.
param ADCx :
- ADC1
- ADC2
- ADC3
param AWDG_RegIntEnOffset :
- ADC_AWDG2_INTEN_OFFSET : config analog watchdog 2.
- ADC_AWDG3_INTEN_OFFSET : config analog watchdog 3.
param AWDG_ChannelEn : channels monitored: flexible on channels monitored, selection is
channel wise, from from 1 to all channels. Specificity of this analog watchdog:
Multiple channels can be selected.eg : 0x00000005 mean CH0 and CH2 monitored enable interrupt.
0x00000000 mean this analog watchdog disable the interrupt.
return none.
uint32_t ADC_GetAnalogWatchdog23IntConfig(ADC_Module* ADCx, uint8_t AWDG_RegEnOffset)Get ADC analog watchdog 2/3 monitored channels.
Source comment
name ADC_GetAnalogWatchdog23MonitChannels.
fun Get ADC analog watchdog 2/3 monitored channels.
param ADCx :
- ADC1
- ADC2
- ADC3
param AWDG_RegEnOffset :
- ADC_AWDG2_EN_OFFSET : analog watchdog 2.
- ADC_AWDG3_EN_OFFSET : analog watchdog 3.
return channels monitored by this analog watchdog2/3 enable the interrupt or not.
Use note: The name field in the source comment does not match the function name; use the declaration ADC_GetAnalogWatchdog23IntConfig as authoritative.
uint32_t ADC_GetAnalogWatchdog23StatusFlag(ADC_Module* ADCx, uint8_t AWDG_RegSTSOffset)Get ADC analog watchdog 2/3 monitored channels status flag.
Source comment
name ADC_GetAnalogWatchdog23StatusFlag.
fun Get ADC analog watchdog 2/3 monitored channels status flag.
param ADCx :
- ADC1
- ADC2
- ADC3
param AWDG_RegSTSOffset :
- ADC_AWDG2_STS_OFFSET : analog watchdog 2.
- ADC_AWDG3_STS_OFFSET : analog watchdog 3.
return channels monitored by this analog watchdog2/3 indicates outside the programmed
thresholds or not.
void ADC_ClearAnalogWatchdog23StatusFlag(ADC_Module* ADCx, uint8_t AWDG_RegSTSOffset, uint32_t AWDG_ChannelFlag)Clear ADC analog watchdog 2/3 monitored channels status flag.
Source comment
name ADC_ClearAnalogWatchdog23StatusFlag.
fun Clear ADC analog watchdog 2/3 monitored channels status flag.
param ADCx :
- ADC1
- ADC2
- ADC3
param AWDG_RegSTSOffset :
- ADC_AWDG2_STS_OFFSET : analog watchdog 2.
- ADC_AWDG3_STS_OFFSET : analog watchdog 3.
param AWDG_ChannelFlag : channels monitored flag wil l be cleared.
eg : 0x00000005 mean CH0 and CH2 status flag will be cleared.
return none.
FlagStatus ADC_GetFlagStatus(ADC_Module* ADCx, uint16_t ADC_FLAG)Checks whether the specified ADC flag is set or not.
Source comment
name ADC_GetFlagStatus.
fun Checks whether the specified ADC flag is set or not.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_FLAG :
- ADC_FLAG_ENDC
- ADC_FLAG_EOC_ANY
- ADC_FLAG_JENDC
- ADC_FLAG_JEOC_ANY
- ADC_FLAG_AWDG1
- ADC_FLAG_ENDC_ERROR
- ADC_FLAG_RDY
- ADC_FLAG_PDRDY
- ADC_FLAG_EOSAMP
- ADC_FLAG_TCFLAG
- ADC_FLAG_STR
- ADC_FLAG_JSTR
return The new state of ADC_FLAG (SET or RESET).
void ADC_ClearFlag(ADC_Module* ADCx, uint16_t ADC_FLAG)Clears pending flags of the specified ADC.
Source comment
name ADC_ClearFlag.
fun Clears pending flags of the specified ADC.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_FLAG :
- ADC_FLAG_ENDC
- ADC_FLAG_EOC_ANY
- ADC_FLAG_JENDC
- ADC_FLAG_JEOC_ANY
- ADC_FLAG_AWDG1
- ADC_FLAG_ENDC_ERROR
- ADC_FLAG_RDY
- ADC_FLAG_PDRDY
- ADC_FLAG_EOSAMP
- ADC_FLAG_TCFLAG
- ADC_FLAG_STR
- ADC_FLAG_JSTR
return none.
void ADC_ConfigInt(ADC_Module* ADCx, uint16_t ADC_IT, FunctionalState Cmd)Enables or disables the specified ADC interrupts.
Source comment
name ADC_ConfigInt.
fun Enables or disables the specified ADC interrupts.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_IT :
- ADC_INT_ENDC
- ADC_INT_ENDCA
- ADC_INT_JENDC
- ADC_INT_JENDCA
- ADC_INT_AWD1
- ADC_INT_ENDCERR
- ADC_INT_RDY
- ADC_INT_PDRDY
- ADC_INT_EOSAMP
param Cmd :
- ENABLE
- DISABLE
return none.
INTStatus ADC_GetIntStatus(ADC_Module* ADCx, uint16_t ADC_IT)Checks whether the specified ADC interrupt has occurred or not.
Source comment
name ADC_GetIntStatus.
fun Checks whether the specified ADC interrupt has occurred or not.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_IT : specifies the ADC interrupt source to check.
- ADC_INT_ENDC
- ADC_INT_ENDCA
- ADC_INT_JENDC
- ADC_INT_JENDCA
- ADC_INT_AWD1
- ADC_INT_ENDCERR
- ADC_INT_RDY
- ADC_INT_PDRDY
- ADC_INT_EOSAMP
return The new state of ADC_IT (SET or RESET).
void ADC_ClearIntPendingBit(ADC_Module* ADCx, uint16_t ADC_IT)Clears interrupt pending bits of the specified ADC.
Source comment
name ADC_ClearIntPendingBit.
fun Clears interrupt pending bits of the specified ADC.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_IT :
- ADC_INT_ENDC
- ADC_INT_ENDCA
- ADC_INT_JENDC
- ADC_INT_JENDCA
- ADC_INT_AWD1
- ADC_INT_ENDCERR
- ADC_INT_RDY
- ADC_INT_PDRDY
- ADC_INT_EOSAMP
return none.
void ADC_SetChannelSingleDiff(ADC_Module* ADCx, uint32_t Channel, uint32_t SingleDiff)Set mode single-ended or differential input of the selected ADC channel.
Source comment
name ADC_SetChannelSingleDiff.
fun Set mode single-ended or differential input of the selected ADC channel.
param ADCx :
- ADC1
- ADC2
- ADC3
param Channel :
- ADC_CH_1
- ADC_CH_2
- ADC_CH_3
- ADC_CH_4
- ADC_CH_5
- ADC_CH_6
- ADC_CH_7
- ADC_CH_8
- ADC_CH_9
- ADC_CH_10
- ADC_CH_11
- ADC_CH_12
- ADC_CH_13
- ADC_CH_14
- ADC_CH_15
- ADC_CH_16
- ADC_CH_17
- ADC_CH_18
param SingleDiff :
- ADC_SINGLE_ENDED
- ADC_DIFFERENTIAL_ENDED
return none.
note Some channels are internally fixed to single-ended inputs: please refer to ADC chapter of user manual.
void ADC_SetCalibrationFactor(ADC_Module *ADCx, uint32_t SingleDiff, uint32_t CalibrationFactor)Set ADC calibration factor in the single-ended or differential mode.
Source comment
name ADC_SetCalibrationFactor.
fun Set ADC calibration factor in the single-ended or differential mode.
param ADCx :
- ADC1
- ADC2
- ADC3
param SingleDiff :
- ADC_SINGLE_ENDED
- ADC_DIFFERENTIAL_ENDED
param CalibrationFactor : The parameter between Min_Data=0x00 and Max_Data=0x7F
return none.
void ADC_SetConvResultBitNum(ADC_Module* ADCx, uint32_t ResultBitNum)Set ADC resolution including 12bit,10bit,8bit,6bit .
Source comment
name ADC_SetConvResultBitNum.
fun Set ADC resolution including 12bit,10bit,8bit,6bit .
param ADCx :
- ADC1
- ADC2
- ADC3
param ResultBitNum :
- ADC_DATA_RES_12BIT
- ADC_DATA_RES_10BIT
- ADC_DATA_RES_8BIT
- ADC_DATA_RES_6BIT
return none.
void ADC_SelectClockMode(ADC_Module* ADCx, uint32_t ClockMode)Set Adc Clock mode from AHB or PLL.
Source comment
name ADC_SelectClockMode.
fun Set Adc Clock mode from AHB or PLL.
param ADCx :
- ADC1
- ADC2
- ADC3
param ClockMode :
- ADC_CLOCK_MODE_PLL
- ADC_CLOCK_MODE_AHB
return none.
void ADC_EnableDeepSleepMode(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the specified ADC entering deep sleep mode.
Source comment
name ADC_EnableDeepSleepMode.
fun Enables or disables the specified ADC entering deep sleep mode.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_SetBypassCalibration(ADC_Module* ADCx, FunctionalState Cmd)Enable or disable ADC calibration bypass mode.
Source comment
name ADC_SetBypassCalibration.
fun Enable or disable ADC calibration bypass mode.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none.
void ADC_EnableBatteryVoltageMonitor(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the specified ADC battery voltage monitor.
Source comment
name ADC_EnableBatteryVoltageMonitor.
fun Enables or disables the specified ADC battery voltage monitor.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
note if users wants to measure the VBAT/2, they should set this bit first.
void ADC_EnableCalibrationAutoLoad(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the specified ADC calibration value auto load.
Source comment
name ADC_EnableCalibrationAutoLoad.
fun Enables or disables the specified ADC calibration value auto load.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_EnableAdcDSMU(ADC_Module *ADCx, FunctionalState Cmd)Configures ADC DSMU mode for the specified ADC enable or disable.
Source comment
name ADC_EnableAdcDSMU.
fun Configures ADC DSMU mode for the specified ADC enable or disable.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_EnableMutiAdcDSMU(ADC_Module *ADCx, FunctionalState Cmd)Configures Multi-adc DSMU mode for the specified ADC enable or disable.
Source comment
name ADC_EnableMutiAdcDSMU.
fun Configures Multi-adc DSMU mode for the specified ADC enable or disable.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
void ADC_SetAdcDSMUChannel(ADC_Module *ADCx, uint8_t ADC_Channel, FunctionalState Cmd)Configures ADC DSMU mode for the specified ADC enable or disable.
Source comment
name ADC_EnableAdcDSMU.
fun Configures ADC DSMU mode for the specified ADC enable or disable.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_Channel :
- ADC_CH_0 : ADC Channel0 selected
- ADC_CH_1 : ADC Channel1 selected
- ADC_CH_2 : ADC Channel2 selected
- ADC_CH_3 : ADC Channel3 selected
- ADC_CH_4 : ADC Channel4 selected
- ADC_CH_5 : ADC Channel5 selected
- ADC_CH_6 : ADC Channel6 selected
- ADC_CH_7 : ADC Channel7 selected
- ADC_CH_8 : ADC Channel8 selected
- ADC_CH_9 : ADC Channel9 selected
- ADC_CH_10 : ADC Channel10 selected
- ADC_CH_11 : ADC Channel11 selected
- ADC_CH_12 : ADC Channel12 selected
- ADC_CH_13 : ADC Channel13 selected
- ADC_CH_14 : ADC Channel14 selected
- ADC_CH_15 : ADC Channel15 selected
- ADC_CH_16 : ADC Channel16 selected
- ADC_CH_17 : ADC Channel17 selected
- ADC_CH_18 : ADC Channel18 selected
param Cmd :
- ENABLE
- DISABLE
return none
note The DSMU filtering cannot distinguish the difference among ADC channels.
Use note: The name field in the source comment does not match the function name; use the declaration ADC_SetAdcDSMUChannel as authoritative.
void ADC_ConfigOverSamplingRatioAndShift(ADC_Module *ADCx, uint32_t Ratio, uint32_t Shift)Set ADC oversampling rate times and shift bit.
Source comment
name ADC_ConfigOverSamplingRatioAndShift.
fun Set ADC oversampling rate times and shift bit.
param ADCx :
- ADC1
- ADC2
- ADC3
param Ratio : ADC oversampling ratio times
- ADC_OVERSAMPE_RATE_TIMES_1
- ADC_OVERSAMPE_RATE_TIMES_2
- ADC_OVERSAMPE_RATE_TIMES_4
- ADC_OVERSAMPE_RATE_TIMES_8
- ADC_OVERSAMPE_RATE_TIMES_16
- ADC_OVERSAMPE_RATE_TIMES_32
- ADC_OVERSAMPE_RATE_TIMES_64
- ADC_OVERSAMPE_RATE_TIMES_128
- ADC_OVERSAMPE_RATE_TIMES_256
param Shift : ADC oversampling data right shift
- ADC_OVERSAMPE_DATA_SHIFT_0
- ADC_OVERSAMPE_DATA_SHIFT_1
- ADC_OVERSAMPE_DATA_SHIFT_2
- ADC_OVERSAMPE_DATA_SHIFT_3
- ADC_OVERSAMPE_DATA_SHIFT_4
- ADC_OVERSAMPE_DATA_SHIFT_5
- ADC_OVERSAMPE_DATA_SHIFT_6
- ADC_OVERSAMPE_DATA_SHIFT_7
- ADC_OVERSAMPE_DATA_SHIFT_8
return none
void ADC_SetOverSamplingScope(ADC_Module *ADCx, uint32_t OversampleScope)Set ADC oversampling scope.
Source comment
name ADC_SetOverSamplingScope.
fun Set ADC oversampling scope.
param ADCx :
- ADC1
- ADC2
- ADC3
param OversampleScope :This parameter can be one of the following values
- ADC_OVERSAMPE_DISABLE
- ADC_OVERSAMPE_REGULAR_CONTINUED
- ADC_OVERSAMPE_REGULAR_RESUMED
- ADC_OVERSAMPE_INJECTED
- ADC_OVERSAMPE_REGULAR_INJECTED
return none
void ADC_EnableOverSamplingDiscont(ADC_Module *ADCx, FunctionalState Cmd)Set ADC oversampling discontinuous mode (triggered mode).
Source comment
name ADC_SetOverSamplingDiscont.
fun Set ADC oversampling discontinuous mode (triggered mode).
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none
Use note: The name field in the source comment does not match the function name; use the declaration ADC_EnableOverSamplingDiscont as authoritative.
void ADC_SetOffsetConfig(ADC_Module* ADCx, uint8_t ADC_Offset, ADC_OffsetType* ADC_OffsetStruct)Set the specified channel conversion offset configuration.
Source comment
name ADC_SetOffsetConfig.
fun Set the specified channel conversion offset configuration.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_Offset :
- ADC_REGESTER_OFFSET_1
- ADC_REGESTER_OFFSET_2
- ADC_REGESTER_OFFSET_3
- ADC_REGESTER_OFFSET_4
param ADC_OffsetStruct :
- OffsetData : Set the selected channel data offset .This parameter must be range from 0 to 0xfff.
- OffsetChannel : Set the selected channel .This parameter must be range from 0 to 0x12. means CH0 - CH18.
- OffsetDirPositiveEn : Enable or disable the selected channel offset positive direction.
- ENABLE
- DISABLE
- OffsetSatenEn : Enable or disable the selected channel offset saturation .
- ENABLE
- DISABLE
- OffsetEn : Enable or disable the selected channel offset.
- ENABLE
- DISABLE
return none
void ADC_GetOffsetConfig(ADC_Module* ADCx, uint8_t ADC_Offset, ADC_OffsetType* ADC_OffsetStruct)Get the specified channel conversion offset configuration.
Source comment
name ADC_GetOffsetConfig.
fun Get the specified channel conversion offset configuration.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_Offset :
- ADC_REGESTER_OFFSET_1
- ADC_REGESTER_OFFSET_2
- ADC_REGESTER_OFFSET_3
- ADC_REGESTER_OFFSET_4
param ADC_OffsetStruct :
- OffsetData : Set the selected channel data offset .This parameter must be range from 0 to 0xfff.
- OffsetChannel : Set the selected channel .This parameter must be range from 0 to 0x12. means CH0 - CH18.
- OffsetDirPositiveEn : Enable or disable the selected channel offset positive direction.
- ENABLE
- DISABLE
- OffsetSatenEn : Enable or disable the selected channel offset saturation .
- ENABLE
- DISABLE
- OffsetEn : Enable or disable the selected channel offset.
- ENABLE
- DISABLE
return none
void ADC_SetGainCompensation(ADC_Module *ADCx, uint32_t GainCompensationValue)Set ADC gain compensation.
Source comment
name ADC_SetGainCompensation.
fun Set ADC gain compensation.
param ADCx :
- ADC1
- ADC2
- ADC3
param GainCompensationValue :
when this value is 0, it means gain compensation will be disabled and value set to 0.
when this value is 1 ~ 16393, gain compensation will be enabled with specified value.
return none.
void ADC_ClearFIFO(ADC_Module* ADCx)Clear the specified ADC FIFO.
Source comment
name ADC_ClearFIFO.
fun Clear the specified ADC FIFO.
param ADCx :
- ADC1
- ADC2
- ADC3
return none.
void ADC_EnableFIFO(ADC_Module* ADCx, FunctionalState Cmd)Enables or disables the specified ADC FIFO.
Source comment
name ADC_EnableFIFO.
fun Enables or disables the specified ADC FIFO.
param ADCx :
- ADC1
- ADC2
- ADC3
param Cmd :
- ENABLE
- DISABLE
return none.
uint8_t ADC_GetFIFOInvalidedDataCount(ADC_Module* ADCx)Get the total counts of invalided data .
Source comment
name ADC_GetFIFOInvalidedDataCount.
fun Get the total counts of invalided data .
param ADCx :
- ADC1
- ADC2
- ADC3
return The the total counts of invalided data .This value is between 0 to 12.
FlagStatus ADC_GetFIFOFlagStatus(ADC_Module* ADCx, uint16_t ADC_FIFOFLAG)Checks whether the specified ADC flag in fifo mode is set or not.
Source comment
name ADC_GetFIFOFlagStatus.
fun Checks whether the specified ADC flag in fifo mode is set or not.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_FIFOFLAG :
- ADC_FIFO_FLAG_RERR
- ADC_FIFO_FLAG_WERR
- ADC_FIFO_FLAG_FULL
- ADC_FIFO_FLAG_EMPTY
- ADC_FIFO_FLAG_HALF_FULL
- ADC_FIFO_FLAG_NOT_EMPTY
return The new state of ADC_FIFOFLAG (SET or RESET).
void ADC_ClearFIFOFlag(ADC_Module* ADCx, uint16_t ADC_FIFO_FLAG)Clears FIFO status bit of the specified ADC.
Source comment
name ADC_ClearFIFOFlag.
fun Clears FIFO status bit of the specified ADC.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_FIFO_FLAG :
- ADC_FIFO_FLAG_RERR
- ADC_FIFO_FLAG_WERR
- ADC_FIFO_FLAG_FULL
- ADC_FIFO_FLAG_EMPTY
- ADC_FIFO_FLAG_HALF_FULL
- ADC_FIFO_FLAG_NOT_EMPTY
return none.
void ADC_ConfigFIFOWaterLevel(ADC_Module* ADCx, uint32_t FIFO_Level)Configures the specified ADC FIFO water level .
Source comment
name ADC_ConfigFIFOWaterLevel.
fun Configures the specified ADC FIFO water level .
param ADCx :
- ADC1
- ADC2
- ADC3
param FIFO_Level : This parameter must be between 1 to 10.
return none.
void ADC_ConfigFIFOInt(ADC_Module* ADCx, uint16_t ADC_FIFO_IT, FunctionalState Cmd)Enables or disables the specified ADC interrupts in FIFO mode.
Source comment
name ADC_ConfigFIFOInt.
fun Enables or disables the specified ADC interrupts in FIFO mode.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_FIFO_IT :
- ADC_FIFO_INT_RERR
- ADC_FIFO_INT_WERR
- ADC_FIFO_INT_FULL
- ADC_FIFO_INT_EMPTY
- ADC_FIFO_INT_HALF_FULL
- ADC_FIFO_INT_NOT_EMPTY
param Cmd :
- ENABLE
- DISABLE
return none.
void ADC_ClearFIFOIntPendingBit(ADC_Module* ADCx, uint16_t ADC_FIFO_IT)Clears FIFO interrupt pending bits of the specified ADC.
Source comment
name ADC_ClearFIFOIntPendingBit.
fun Clears FIFO interrupt pending bits of the specified ADC.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_FIFO_IT :
- ADC_FIFO_INT_RERR
- ADC_FIFO_INT_WERR
- ADC_FIFO_INT_FULL
- ADC_FIFO_INT_EMPTY
- ADC_FIFO_INT_HALF_FULL
- ADC_FIFO_INT_NOT_EMPTY
return none.
void ADC_ConfigRegularExtLineTrigSource(ADC_Module* ADCx, uint32_t ADC_trigger)Configurate ADC external line trigger source for regular channel.
Source comment
name ADC_ConfigRegularExtLineTrigSource.
fun Configurate ADC external line trigger source for regular channel.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_trigger :
specifies the external line trigger source be configured.
- ADC_TRIG_EXTI_0
- ADC_TRIG_EXTI_1
- ADC_TRIG_EXTI_2
- ADC_TRIG_EXTI_3
- ADC_TRIG_EXTI_4
- ADC_TRIG_EXTI_5
- ADC_TRIG_EXTI_6
- ADC_TRIG_EXTI_7
- ADC_TRIG_EXTI_8
- ADC_TRIG_EXTI_9
- ADC_TRIG_EXTI_10
- ADC_TRIG_EXTI_11
- ADC_TRIG_EXTI_12
- ADC_TRIG_EXTI_13
- ADC_TRIG_EXTI_14
- ADC_TRIG_EXTI_15
return none
void ADC_ConfigInjectedExtLineTrigSource(ADC_Module* ADCx, uint32_t ADC_trigger)Configurate ADC external line trigger source for injected channel.
Source comment
name ADC_ConfigInjectedExtLineTrigSource.
fun Configurate ADC external line trigger source for injected channel.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_trigger :
specifies the external line trigger source be configured.
- ADC_TRIG_EXTI_0
- ADC_TRIG_EXTI_1
- ADC_TRIG_EXTI_2
- ADC_TRIG_EXTI_3
- ADC_TRIG_EXTI_4
- ADC_TRIG_EXTI_5
- ADC_TRIG_EXTI_6
- ADC_TRIG_EXTI_7
- ADC_TRIG_EXTI_8
- ADC_TRIG_EXTI_9
- ADC_TRIG_EXTI_10
- ADC_TRIG_EXTI_11
- ADC_TRIG_EXTI_12
- ADC_TRIG_EXTI_13
- ADC_TRIG_EXTI_14
- ADC_TRIG_EXTI_15
return none
void ADC_ConfigADCPowerSupport(ADC_Module* ADCx, uint32_t ADC_PowerSupportSel)Configurate ADC power support ,select the external MR or internal LDO.
Source comment
name ADC_ConfigADCPowerSupport.
fun Configurate ADC power support ,select the external MR or internal LDO.
param ADCx :
- ADC1
- ADC2
- ADC3
param ADC_PowerSupportSel :
- ADC_EXTERN_POWER_SUPPORT , select MR power support
- ADC_INTERN_POWER_SUPPORT , select LDO power support
return none
void ADC_ConfigClk(ADC_CTRL3_CKMOD ADC_ClkMode, uint32_t RCC_ADCHCLKPrescaler)Configures the ADCHCLK prescaler.
Source comment
name ADC_ConfigClk.
fun Configures the ADCHCLK prescaler.
param ADC_ClkMode :
- ADC_CTRL3_CKMOD_AHB
- ADC_CTRL3_CKMOD_PLL
- ADC_CTRL3_CKMOD_USBHSPLL
param RCC_ADCPrescaler : specifies the ADC prescaler.
When ADC_ClkMode = ADC_CTRL3_CKMOD_AHB: RCC_ADCPrescaler can be on of the following values:
- RCC_ADCHCLK_DIV1
- RCC_ADCHCLK_DIV2
- RCC_ADCHCLK_DIV3
- RCC_ADCHCLK_DIV4
- RCC_ADCHCLK_DIV6
- RCC_ADCHCLK_DIV8
- RCC_ADCHCLK_DIV10
- RCC_ADCHCLK_DIV12
- RCC_ADCHCLK_DIV16
- RCC_ADCHCLK_DIV32
When ADC_ClkMode = ADC_CTRL3_CKMOD_PLL or ADC_CTRL3_CKMOD_USBHSPLL: RCC_ADCPrescaler can be on of the following values:
- RCC_ADCPLLCLK_DIV1
- RCC_ADCPLLCLK_DIV2
- RCC_ADCPLLCLK_DIV3
- RCC_ADCPLLCLK_DIV4
- RCC_ADCPLLCLK_DIV6
- RCC_ADCPLLCLK_DIV8
- RCC_ADCPLLCLK_DIV10
- RCC_ADCPLLCLK_DIV12
return none.
5.1.3 Demo descriptions
This section describes the 12 ADC examples, covering DMA transfer, FIFO, oversampling, the temperature sensor, differential input, gain and offset compensation, single reads, the analog watchdog, external line trigger, and multi-ADC synchronization.
5.1.3.1 ADC1_DMA DMA transfer of regular conversion results
Example directory: projects/n32h49x_EVAL/examples/ADC/ADC1_DMA/
configure the system and ADC clocks and set the sampling pin as analog input→initialize a DMA channel to move conversion results in circular mode→initialize the ADC as independent continuous single-channel software trigger→wait for ready and finish single-ended calibration→start the conversion in software and the result is written to a variable in the background
| Item | Source analysis |
|---|---|
| Function | ADC1 samples and converts the analog voltage on PB1, and the result is moved to the variable ADCConvertedValue by DMA1 channel 1. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, DMA_Config;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PB1 is set as analog input. ADC1: independent mode, continuous conversion, single channel, software trigger, 12-bit right-aligned, sample time 13.5 ADCCLK. DMA1 channel 1: circular mode, half-word transfer, with the source at the ADC1 data register and one half-word per transfer. System clock HSI+PLL 240 MHz, ADCHCLK is AHB divided by 16, ADC1M timer clock is HSI divided by 8. |
| Program and data path | main calls RCC_Configuration, GPIO_Configuration, DMA_Config, and ADC_Initial in order.ADC_Initial waits for ADC_FLAG_RDY, then runs single-ended calibration and waits for it to finish.After one software-started regular conversion it enters an empty loop, and DMA moves the results to ADCConvertedValue in the background. |
| Main APIs | ADC_Init, ADC_ConfigRegularChannel, ADC_Enable, ADC_CalibrationOperation, ADC_GetCalibrationStatus, ADC_SetDMATransferMode, ADC_EnableSoftwareStartConv |
| Verification | Build and enter debug mode, then add the variable ADCConvertedValue to the watch window. Change the PB1 voltage, and the result variable changes accordingly. |
| Use note | When the system uses the HSE clock, RCC_ConfigAdc1mClk can select HSE or HSI, and with the HSI clock only HSI can be selected.Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example moves ADC1 regular conversion results with DMA in the background, so the CPU only configures once and can then keep observing the PB1 voltage sample.
Data path: PB1 analog voltage -> ADC1 regular channel 1 continuous conversion -> data register ADC1->DAT -> DMA1 channel 1 circular transfer -> variable ADCConvertedValue
1. Configure the ADC as independent continuous single-channel software trigger. ADC_Initial fills ADC_InitType and then configures regular channel 1, with PB1 as the sampling pin.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.WorkMode = ADC_WORKMODE_INDEPENDENT;
ADC_InitStructure.MultiChEn = DISABLE;
ADC_InitStructure.ContinueConvEn = ENABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 1;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel9 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_09_PB1, 1, ADC_SAMP_TIME_CYCLES_13_5);
ContinueConvEn = ENABLE keeps the conversion continuous, and ADC_ConfigRegularChannel places channel 9 of PB1 at rank 1 and sets the sample time.
2. Configure the DMA channel for circular transfer. DMA_Config points the source address at the ADC1 data register and the destination at the variable address, using circular mode.
src/main.csrc/main.c · DMA_Config
DMA_DeInit(DMA1_CH1);
DMA_InitStructure.PeriphAddr = (uint32_t)&ADC1->DAT;
DMA_InitStructure.MemAddr = (uint32_t)&ADCConvertedValue;
DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
DMA_InitStructure.BufSize = 1;
DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
DMA_InitStructure.MemoryInc = DMA_MEM_INC_DISABLE;
DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_WIDTH_HALFWORD;
DMA_InitStructure.MemDataSize = DMA_MEM_DATA_WIDTH_HALFWORD;
DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;
DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
DMA_Init(DMA1_CH1, &DMA_InitStructure);
DMA_RequestRemap(DMA_REMAP_ADC1,DMA1_CH1,ENABLE);
DMA_REMAP_ADC1 maps the ADC1 conversion request to DMA1 channel 1, and DMA_MODE_CIRCULAR makes the transfer repeat automatically.
3. Wait for ready and finish calibration. After configuration the ADC must be confirmed ready before single-ended calibration, and conversion must not start before calibration finishes.
src/main.csrc/main.c · ADC_Initial
/* Enable ADC1 */
ADC_Enable(ADC1, ENABLE);
/*Check ADC Ready*/
while(ADC_GetFlagStatus(ADC1,ADC_FLAG_RDY) == RESET)
;
/* Start ADC1 calibration */
ADC_CalibrationOperation(ADC1,ADC_CALIBRATION_SINGLE_MODE);
/* Check the end of ADC1 calibration */
while (ADC_GetCalibrationStatus(ADC1,ADC_CALIBRATION_SINGLE_MODE))
;
/* Enable ADC1 DMA */
ADC_SetDMATransferMode(ADC1, ADC_MULTI_REG_DMA_EACH_ADC);
4. Start the conversion and observe the result. After configuration main starts one conversion in software, and DMA keeps moving the results.
src/main.csrc/main.c · main
/* ADC1 configuration -------------------------------------------------------*/
ADC_Initial();
/* Start ADC1 Software Conversion */
ADC_EnableSoftwareStartConv(ADC1, ENABLE);
while (1)
{
}
When porting, replace PB1 with the target pin and update the channel macro, and the rest of the DMA and calibration flow can stay as is.
Corresponding source files: src/main.c, inc/main.h
5.1.3.2 ADC1_FIFOMode ADC FIFO mode
Example directory: projects/n32h49x_EVAL/examples/ADC/ADC1_FIFOMode/
configure the system and ADC clocks and set the sampling pin as analog input→initialize the ADC and enable the FIFO with a water level→initialize a DMA channel for burst transfers→wait for ready and finish single-ended calibration→the main loop repeats software triggers and the array is written in batches when the FIFO is full
| Item | Source analysis |
|---|---|
| Function | ADC1 samples the PB1 analog voltage in FIFO mode with the water level set to 6, and DMA moves 6 half-words in one burst into the array ADCConvertedValue. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, DMA_Config, NVIC_Configuration;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PB1 is set as analog input. ADC1: independent mode, single conversion, single channel, software trigger, 12-bit right-aligned, FIFO enabled with water level 6. DMA1 channel 1: circular mode, burst length 6, DMA burst enabled, 60 half-words transferred. System clock HSI+PLL 240 MHz, ADCHCLK is AHB divided by 16. |
| Program and data path | main calls RCC_Configuration, GPIO_Configuration, NVIC_Configuration, DMA_Config, and ADC_Initial in order, then starts one conversion in software.The main loop waits for ADC_FLAG_EOC_ANY, clears the flag, and triggers again in software.Every 6 triggers the FIFO reaches its level and DMA moves 6 results into the array in one transfer. |
| Main APIs | ADC_ConfigFIFOWaterLevel, ADC_EnableFIFO, ADC_SetDMATransferMode, ADC_GetFlagStatus, ADC_ClearFlag, ADC_EnableSoftwareStartConv |
| Verification | Build and enter debug mode, then add the array ADCConvertedValue[60] to the watch window. After every 6 software triggers, 6 new PB1 voltage samples are added to the array. |
| Use note | Do not open the ADC peripheral view in the debug window or add ADCx->DAT to the watch window, otherwise the periodic reads disturb the FIFO test. Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example uses the ADC FIFO together with DMA burst transfer to write the results of several single conversions into an array in batches.
Data path: PB1 analog voltage -> ADC1 single conversion written into the FIFO -> FIFO water level reaches 6 -> DMA burst transfer of 6 half-words -> array ADCConvertedValue
1. Enable the FIFO and set the water level. ADC_Initial enables the FIFO after configuring the regular channel and sets the water level to 6.
src/main.csrc/main.c · ADC_Initial
/* ADC1 regular channel9 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_09_PB1, 1, ADC_SAMP_TIME_CYCLES_13_5);
/* Config ADC1 FIFO waterlevel = 6 */
ADC_ConfigFIFOWaterLevel(ADC1,6);
/* Enable ADC1 FIFO */
ADC_EnableFIFO(ADC1,ENABLE);
A water level of 6 means the DMA transfer is triggered after 6 conversion results accumulate in the FIFO.
2. Configure the DMA burst transfer. DMA_Config uses burst length 6 with burst enabled and a destination array of length 60.
src/main.csrc/main.c · DMA_Config
DMA_InitStructure.PeriphAddr = (uint32_t)&ADC1->DAT;
DMA_InitStructure.MemAddr = (uint32_t)ADCConvertedValue;
DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
DMA_InitStructure.BufSize = DMA_SIZE;
DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
DMA_InitStructure.MemoryInc = DMA_MEM_INC_ENABLE;
DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_WIDTH_HALFWORD;
DMA_InitStructure.MemDataSize = DMA_MEM_DATA_WIDTH_HALFWORD;
DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;
DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
DMA_InitStructure.BurstLen = DMA_BURST_LEN_6;
DMA_InitStructure.BurstMode = DMA_BURST_MODE_ALMOST;
DMA_InitStructure.BurstCmd = DMA_BURST_ENABLE;
DMA_Init(DMA1_CH1, &DMA_InitStructure);
MemoryInc makes the destination address increment, and DMA_BURST_LEN_6 corresponds to the FIFO water level of 6.
3. Repeat the trigger in the main loop. In single conversion mode each conversion needs a new trigger.
src/main.csrc/main.c · main
while (1)
{
while(!ADC_GetFlagStatus(ADC1,ADC_FLAG_EOC_ANY))
ADC_ClearFlag(ADC1,ADC_FLAG_EOC_ANY) ;
ADC_EnableSoftwareStartConv(ADC1, ENABLE);
}
After each ADC_FLAG_EOC_ANY the flag is cleared and the conversion is triggered again in software, forming batch acquisition together with the FIFO and DMA.
Corresponding source files: src/main.c, inc/main.h
5.1.3.3 ADC1_Oversampling ADC oversampling
Example directory: projects/n32h49x_EVAL/examples/ADC/ADC1_Oversampling/
configure the system and ADC clocks and set the two sampling pins as analog input→initialize the ADC for dual-channel scan and set the oversampling ratio and scope→initialize a DMA channel to move results in circular mode→wait for ready and finish single-ended calibration→start the conversion and the accumulated result is written to the array
| Item | Source analysis |
|---|---|
| Function | ADC1 samples the PB0 and PB1 analog voltages with oversampling x2 and no right shift, and the results are written to the array ADCConvertedValue by DMA. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, DMA_Config;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PB0 and PB1 are set as analog input. ADC1: independent mode, continuous conversion, dual-channel scan, software trigger, 12-bit right-aligned. Oversampling ratio x2 with shift 0, scope limited to regular channels continued. DMA1 channel 1 moves 10 half-words in circular mode, system clock HSI+PLL 240 MHz. |
| Program and data path | ADC_Initial first configures the two regular channels 8 and 9, then sets the oversampling ratio and scope.After ready and calibration it enables DMA transfer. The main loop starts one conversion in software and enters an empty loop, and the array is refreshed continuously. |
| Main APIs | ADC_ConfigOverSamplingRatioAndShift, ADC_SetOverSamplingScope, ADC_ConfigRegularChannel, ADC_SetDMATransferMode, ADC_EnableSoftwareStartConv |
| Verification | Build and enter debug mode, then add the array ADCConvertedValue[10] to the watch window. The results change with the PB0 and PB1 voltages, and the data register result is about Voltage24095/3.3. |
| Use note | The oversampling ratio and the shift must be used together, because without shifting the result is scaled by the ratio and the reader must convert by the ratio. Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example enables oversampling on the regular channels and accumulates several conversions per sample point before handing the result to DMA.
Data path: PB0 and PB1 analog voltages -> ADC1 dual-channel scan conversion -> x2 oversampling accumulation per point -> data register -> DMA transfer of 10 half-words -> array ADCConvertedValue
1. Configure the two regular channels and enable multi-channel. The sequence length is 2, for PB0 and PB1.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.MultiChEn = ENABLE;
ADC_InitStructure.ContinueConvEn = ENABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 2;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel8 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_08_PB0, 1, ADC_SAMP_TIME_CYCLES_13_5);
/* ADC1 regular channel9 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_09_PB1, 2, ADC_SAMP_TIME_CYCLES_13_5);
2. Set the oversampling ratio and scope. The ratio is x2 with shift 0, and the scope is limited to regular channels continued.
src/main.csrc/main.c · ADC_Initial
/* Enable ADC1 oversamping, x4 and no shift*/
ADC_ConfigOverSamplingRatioAndShift(ADC1,ADC_OVERSAMPE_RATE_TIMES_2,ADC_OVERSAMPE_DATA_SHIFT_0);
/* Config ADC1 oversamping, scope */
ADC_SetOverSamplingScope(ADC1,ADC_OVERSAMPE_REGULAR_CONTINUED);
ADC_OVERSAMPE_REGULAR_CONTINUED makes oversampling apply only to the regular channels, and with shift 0 the accumulated result is not compressed.
3. DMA moves the ten results. The destination array length is 10 and the source is the data register.
src/main.csrc/main.c · DMA_Config
DMA_InitStructure.PeriphAddr = (uint32_t)&ADC1->DAT;
DMA_InitStructure.MemAddr = (uint32_t)ADCConvertedValue;
DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
DMA_InitStructure.BufSize = 10;
DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
DMA_InitStructure.MemoryInc = DMA_MEM_INC_ENABLE;
DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_WIDTH_HALFWORD;
DMA_InitStructure.MemDataSize = DMA_MEM_DATA_WIDTH_HALFWORD;
DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;
DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
DMA_Init(DMA1_CH1, &DMA_InitStructure);
When porting, another ratio and shift combination can be used, and only the conversion factor at the reader needs to be adjusted accordingly.
Corresponding source files: src/main.c, inc/main.h
5.1.3.4 ADC1_TEMP Internal temperature sensor
Example directory: projects/n32h49x_EVAL/examples/ADC/ADC1_TEMP/
configure the system and ADC clocks and set the sampling pin as analog input→initialize the ADC and configure the internal temperature sensor channel→enable the temperature sensor and DMA transfer→wait for ready and finish single-ended calibration→the main loop reads the code value, converts it to a temperature, and prints it over the UART
| Item | Source analysis |
|---|---|
| Function | ADC1 samples and converts the analog voltage of internal temperature sensor channel 16, then converts it to a temperature value and prints it over the UART. |
| Source files | src/main.c: main, TempratureCalculate, ADC_Initial, RCC_Configuration, GPIO_Configuration, DMA_Config;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | The sampling pin is PB1 and the temperature sensor and Vrefint are enabled. ADC1: independent, continuous, software trigger, 12-bit right-aligned, sample time 601.5 ADCCLK. DMA1 channel 1 moves one half-word in circular mode, ADCHCLK is AHB divided by 10. UART on PA9 at 115200 bps, system clock HSI+PLL 240 MHz. |
| Program and data path | main configures the clocks, log, DMA, and ADC, enables the temperature sensor, and starts the conversion in software.After ADC_FLAG_EOC_ANY it enters the loop.The loop calls TempratureCalculate to convert ADCConvertedValue to Celsius and calls log_debug to print it. |
| Main APIs | ADC_EnableTempSensorVrefint, ADC_ConfigRegularChannel, ADC_SetDMATransferMode, ADC_GetFlagStatus, ADC_EnableSoftwareStartConv |
| Verification | Build and enter debug mode, then add the variables ADCConvertedValue and TempValue to the watch window. Connect a UART tool to PA9 and run at full speed, and the temperature prints close to 25 degrees in real time. |
| Use note | The conversion factor comes from the datasheet, and the example uses AVG_SLOPE of 0.004 with the chip calibration value read from the information block.Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example uses the temperature sensor as the ADC input and converts the raw code value to Celsius before printing.
Data path: internal temperature sensor -> ADC1 channel 16 -> raw code value ADCConvertedValue -> TempratureCalculate conversion -> UART-printed temperature
1. Configure the ADC and the temperature sensor channel. The sampling channel is channel 16 with the longest sample time.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.WorkMode = ADC_WORKMODE_INDEPENDENT;
ADC_InitStructure.MultiChEn = DISABLE;
ADC_InitStructure.ContinueConvEn = ENABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 1;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel16 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_16_Temperture_Sensor, 1, ADC_SAMP_TIME_CYCLES_601_5);
2. Enable the temperature sensor and DMA transfer. The temperature sensor and Vrefint share the enable bit, and the conversion results are moved by DMA.
src/main.csrc/main.c · ADC_Initial
/* Enable Temper Sensor */
ADC_EnableTempSensorVrefint(ENABLE);
/* Enable ADC DMA */
ADC_SetDMATransferMode(ADC1,ADC_MULTI_REG_DMA_EACH_ADC);
3. Convert the temperature value. The chip sensor calibration value is read from the information block first, then the datasheet formula is applied.
src/main.csrc/main.c · TempratureCalculate
FLASH_iCacheCmd(FLASH_BANK1,FLASH_iCache_DIS);
FLASH_iCacheRST(FLASH_BANK1);
if(*(uint32_t *)0x1FFFC2A0 == 0x53545446)
{
/* Get the voltage value , temperature sensor under 3.3V and 25 celsius */
VTS_value = (uint16_t)(*(uint32_t *)0x1FFFC710>>16);
T_value = (uint16_t)(*(uint32_t *)0x1FFFC718);
}
else
{
Get_NVR(0x1FFFC130, (u8*)NVR_VTS, 8);
VTS_value = (uint16_t)(NVR_VTS[0]>>16);
T_value = 3000;
}
FLASH_iCacheCmd(FLASH_BANK1,FLASH_iCache_EN);
/* Voltage value of temperature sensor */
tempValue=TempAdVal*(3.3/4095);
/* Get the temperature inside the chip */
Temperate=(VTS_value-(tempValue*1000))/(AVG_SLOPE*1000)+T_value/100-1.25f;
4. Print the temperature in the main loop. Each conversion updates TempValue and prints it at 1 ms intervals.
src/main.csrc/main.c · main
while (1)
{
TempValue = TempratureCalculate(ADCConvertedValue);
log_debug("\r\n Temperature = %.1f C\r\n",TempValue);
systick_delay_ms(1);
}
When porting to another chip, the information block addresses and the AVG_SLOPE factor must be replaced together.
Corresponding source files: src/main.c, inc/main.h
5.1.3.5 ADC_DifferentialMode ADC differential mode
Example directory: projects/n32h49x_EVAL/examples/ADC/ADC_DifferentialMode/
configure the system and ADC clocks and set the differential pins as analog input→configure the regular channel and set the channel to differential input→wait for ready and finish differential calibration→start the conversion in software→the main loop reads the result and converts it to the voltage difference of the two pins
| Item | Source analysis |
|---|---|
| Function | ADC1 converts the external voltage difference on PA1 and PA2 in differential mode, and in the main loop converts it to the Vinp minus Vinn voltage value. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PA1 and PA2 are set as analog input. ADC1: independent, continuous conversion, single channel, software trigger, 12-bit right-aligned, sample time 55.5 ADCCLK. Channel 1 is configured as differential input, and differential calibration is run. System clock HSI+PLL 240 MHz, ADCHCLK is AHB divided by 16. |
| Program and data path | ADC_Initial configures channel 1 as differential input and runs differential calibration after ready.The main loop checks ADC_FLAG_ENDC, clears the flag, and reads the result.The result is converted to a voltage difference by the differential formula and stored in VINP_VINN_Value. |
| Main APIs | ADC_SetChannelSingleDiff, ADC_CalibrationOperation, ADC_GetFlagStatus, ADC_ClearFlag, ADC_GetDat, ADC_EnableSoftwareStartConv |
| Verification | Build and enter debug mode, then add the variables ADCTempValue and VINP_VINN_Value to the watch window. Feed an external supply into PA1 and PA2 in the range -3.3V to 3.3V, and the voltage difference variable changes with it. |
| Use note | Differential calibration differs from single-ended calibration, and differential input must use ADC_CALIBRATION_DIFF_MODE.Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example configures one channel as differential input and converts the result into a voltage difference.
Data path: PA1 and PA2 external voltage difference -> ADC1 channel 1 differential conversion -> data register -> ADC_GetDat -> converted to VINP_VINN_Value
1. Configure the channel as differential input. A single channel with sample time 55.5, after which channel 1 is set to differential.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.WorkMode = ADC_WORKMODE_INDEPENDENT;
ADC_InitStructure.MultiChEn = DISABLE;
ADC_InitStructure.ContinueConvEn = ENABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 1;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
ADC_ConfigRegularChannel(ADC1, ADC_CH_1, 1, ADC_SAMP_TIME_CYCLES_55_5);
/* Enable ADC1 channel 1 work on differential mode. */
ADC_SetChannelSingleDiff(ADC1,ADC_CH_1,ADC_DIFFERENTIAL_ENDED);
ADC_DIFFERENTIAL_ENDED makes the channel sample differentially, with the positive and negative ends on PA1 and PA2.
2. Run differential calibration. The calibration type for differential mode differs from single-ended.
src/main.csrc/main.c · ADC_Initial
/* Start ADC1 differential calibration */
ADC_CalibrationOperation(ADC1,ADC_CALIBRATION_DIFF_MODE);
/* Check the end of ADC1 calibration */
while (ADC_GetCalibrationStatus(ADC1,ADC_CALIBRATION_DIFF_MODE))
;
3. Read the result and convert to a voltage difference. The main loop waits for the conversion to end, then reads the data register and converts.
src/main.csrc/main.c · main
while (1)
{
if(ADC_GetFlagStatus(ADC1,ADC_FLAG_ENDC) == SET)
{
ADC_ClearFlag(ADC1,ADC_FLAG_ENDC);
ADCTempValue = ADC_GetDat(ADC1);
/* Calcalate (Vinp - Vinn ) Value*/
VINP_VINN_Value = (float)(((float)(ADCTempValue *2.0f /4095) - 1.0f) *3.3f);
}
}
The conversion maps the code value to a voltage difference of -3.3V to 3.3V, and when porting the factor should be adjusted to the actual reference voltage.
Corresponding source files: src/main.c, inc/main.h
5.1.3.6 ADC_Gain_Offset ADC gain and offset
Example directory: projects/n32h49x_EVAL/examples/ADC/ADC_Gain_Offset/
configure the system and ADC clocks and set the sampling pin as analog input→initialize the ADC and configure the regular channel→set the offset register and the gain compensation factor→enable DMA and finish single-ended calibration→start the conversion and the compensated result is written to a variable
| Item | Source analysis |
|---|---|
| Function | ADC1 samples the PB1 analog voltage with gain compensation and offset compensation enabled, and the result is written to the variable ADCConvertedValue by DMA. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, DMA_Config;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PB1 is set as analog input. ADC1: independent, continuous, single channel, software trigger, 12-bit right-aligned. Offset register 1 sets a positive offset of 0x400 with saturation enabled, and the gain compensation factor is 8192. DMA1 channel 1 moves one half-word in circular mode, system clock HSI+PLL 240 MHz. |
| Program and data path | ADC_Initial configures the regular channel, then fills the offset structure and sets the gain compensation.It then enables DMA, waits for ready, and finishes single-ended calibration. After one software-started conversion it enters an empty loop, and DMA keeps moving the compensated result. |
| Main APIs | ADC_SetOffsetConfig, ADC_SetGainCompensation, ADC_ConfigRegularChannel, ADC_SetDMATransferMode, ADC_EnableSoftwareStartConv |
| Verification | Build and enter debug mode, then add the variable ADCConvertedValue to the watch window. Change the PB1 voltage, and the result is about Voltage24095/3.3 plus 0x400. |
| Use note | The gain compensation factor is the multiple times 4096, and the offset data must be smaller than 0xfff. Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example shows how a linear transform is applied to the conversion result through offset and gain compensation.
Data path: PB1 analog voltage -> ADC1 regular channel 9 conversion -> gain compensation and offset added -> data register -> DMA transfer -> variable ADCConvertedValue
1. Configure the ADC and the regular channel. A single channel with a software trigger, and the sampling pin is PB1.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.WorkMode = ADC_WORKMODE_INDEPENDENT;
ADC_InitStructure.MultiChEn = DISABLE;
ADC_InitStructure.ContinueConvEn = ENABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 1;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_09_PB1, 1, ADC_SAMP_TIME_CYCLES_13_5);
2. Set the offset and gain compensation. Offset register 1 is set to a positive 0x400 with saturation enabled, and the gain factor is 8192.
src/main.csrc/main.c · ADC_Initial
/* ADC1 channel offset compensation configuration*/
ADC_OffsetStructure.OffsetChannel = ADC1_Channel_09_PB1;
ADC_OffsetStructure.OffsetData = OFFSET_VALUE;
ADC_OffsetStructure.OffsetDirPositiveEn = ENABLE;
ADC_OffsetStructure.OffsetSatenEn = ENABLE;
ADC_OffsetStructure.OffsetEn = ENABLE;
ADC_SetOffsetConfig(ADC1,ADC_REGESTER_OFFSET_1,&ADC_OffsetStructure);
/* Config ADC1 gain compensation factor */
ADC_SetGainCompensation(ADC1,GAIN_FACTOR);
The offset and gain constants are defined at the top of the file, where GAIN_FACTOR is 4096 times the multiple and OFFSET_VALUE is 0x400.
src/main.csrc/main.c
#define GAIN_FACTOR (4096*2)
#define OFFSET_VALUE (0x400)
3. DMA moves the compensated result. The destination is the variable address, refreshed continuously in circular mode.
src/main.csrc/main.c · DMA_Config
DMA_InitStructure.PeriphAddr = (uint32_t)&ADC1->DAT;
DMA_InitStructure.MemAddr = (uint32_t)&ADCConvertedValue;
DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
DMA_InitStructure.BufSize = 1;
DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
DMA_InitStructure.MemoryInc = DMA_MEM_INC_DISABLE;
DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_WIDTH_HALFWORD;
DMA_InitStructure.MemDataSize = DMA_MEM_DATA_WIDTH_HALFWORD;
DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;
DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
DMA_Init(DMA1_CH1, &DMA_InitStructure);
When porting, adjust GAIN_FACTOR and OFFSET_VALUE for the required linear relation.
Corresponding source files: src/main.c, inc/main.h
5.1.3.7 ADC_SingleRead ADC single read
Example directory: projects/n32h49x_EVAL/examples/ADC/ADC_SingleRead/
configure the system and ADC clocks and set the two sampling pins as analog input→initialize the ADC as single conversion single channel→wait for ready and finish single-ended calibration→reconfigure the channel and trigger in software before each read→read the code value into the array after the conversion ends
| Item | Source analysis |
|---|---|
| Function | ADC1 samples the PA0 and PA1 analog voltages in turn, one software trigger and one acquisition at a time, and stores the results in an array. |
| Source files | src/main.c: main, ADC_Initial, ADC_GetData, RCC_Configuration, GPIO_Configuration;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PA0 and PA1 are set as analog input. ADC1: independent, single conversion, single channel, software trigger, 12-bit right-aligned. Each acquisition temporarily sets the sample time to 239.5 ADCCLK, without DMA or interrupts. System clock HSI+PLL 240 MHz. |
| Program and data path | ADC_Initial only confirms ready and runs single-ended calibration.The main loop calls ADC_GetData to trigger conversions for channel 0 and channel 1 in turn.The function waits for ADC_FLAG_ENDC, clears the flag, and reads the value, which is stored in ADC1ConvertedValue. |
| Main APIs | ADC_ConfigRegularChannel, ADC_EnableSoftwareStartConv, ADC_GetFlagStatus, ADC_ClearFlag, ADC_GetDat |
| Verification | Build and enter debug mode, then add the array ADC1ConvertedValue to the watch window. Change the PA0 and PA1 voltages, and the array elements change accordingly. |
| Use note | The regular channel is reconfigured before each read and the ENDC and STR flags are cleared, which suits scenarios with few pins and on-demand acquisition. Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example does not rely on DMA or interrupts, and uses one read function to switch channels and acquire on demand.
Data path: target channel analog voltage -> ADC_GetData reconfigures the channel and triggers -> wait for ENDC -> ADC_GetDat -> array ADC1ConvertedValue
1. Configure the ADC for single conversion. Continuous conversion is not enabled, so every acquisition needs a software trigger.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.WorkMode = ADC_WORKMODE_INDEPENDENT;
ADC_InitStructure.MultiChEn = DISABLE;
ADC_InitStructure.ContinueConvEn = DISABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 1;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADCx, &ADC_InitStructure);
2. Wait for ready and finish single-ended calibration. The calibration flow matches the other examples and uses the passed ADC instance.
src/main.csrc/main.c · ADC_Initial
/* Enable ADCx */
ADC_Enable(ADCx, ENABLE);
/*Check ADC Ready*/
while(ADC_GetFlagStatus(ADCx,ADC_FLAG_RDY) == RESET)
;
/* Start ADCx calibration */
ADC_CalibrationOperation(ADCx,ADC_CALIBRATION_SINGLE_MODE);
/* Check the end of ADCx calibration */
while (ADC_GetCalibrationStatus(ADCx,ADC_CALIBRATION_SINGLE_MODE))
;
3. Single acquisition function. Each call reconfigures the channel, triggers in software, and waits for the conversion to end.
src/main.csrc/main.c · ADC_GetData
ADC_ConfigRegularChannel(ADCx, ADC_Channel, 1, ADC_SAMP_TIME_CYCLES_239_5);
/* Start ADC Software Conversion */
ADC_EnableSoftwareStartConv(ADCx, ENABLE);
while(ADC_GetFlagStatus(ADCx, ADC_FLAG_ENDC)==0){
}
ADC_ClearFlag(ADCx, ADC_FLAG_ENDC);
ADC_ClearFlag(ADCx, ADC_FLAG_STR);
dat=ADC_GetDat(ADCx);
return dat;
The ENDC and STR flags are cleared before and after the read, so the next trigger starts from a clean state.
4. Acquire the two channels in turn in the main loop. Channels 0 and 1 are read in order and the results are written to the array.
src/main.csrc/main.c · main
while (1)
{
ADC1ConvertedValue[0]=ADC_GetData(ADC1,ADC1_Channel_00_PA0);
ADC1ConvertedValue[1]=ADC_GetData(ADC1,ADC1_Channel_01_PA1);
}
When porting, only the array indices and the channel macros need to be extended to acquire more pins.
Corresponding source files: src/main.c, inc/main.h
5.1.3.8 AnalogWDG_SimComp Analog watchdog as a comparator
Example directory: projects/n32h49x_EVAL/examples/ADC/AnalogWDG_SimComp/
configure the system and ADC clocks and set two inputs as analog input and two outputs as push-pull→initialize the ADC as multi-channel and configure two watchdog threshold pairs→enable the watchdog interrupt and start the conversion in software→on an out-of-range event update the threshold in the hysteresis direction→toggle the corresponding output pin and keep detecting
| Item | Source analysis |
|---|---|
| Function | The analog watchdog 1 and watchdog 2 thresholds switch the hysteresis and level detection of an analog comparator, toggling PB2 or PB3 when the input goes out of range. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, NVIC_Configuration;src/n32h49x_it.c: the ADC1_2_IRQHandler interrupt handler;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PB0 and PB1 are set as analog input, and PB2 and PB3 as push-pull output. ADC1: independent, multi-channel, software trigger, 12-bit right-aligned. Watchdog 1 monitors channel PB1 and watchdog 2 monitors channel PB0, with initial thresholds high 0x060F and low 0. AWD1 and AWD2 interrupts are enabled with NVIC priority group 2. |
| Program and data path | ADC_Initial configures the two channels, the two watchdog threshold pairs, and the interrupts, then starts continuous conversion in software.In the interrupt the current threshold decides the hysteresis direction, then the threshold is updated and the corresponding pin is toggled. The main loop only increments a counter. |
| Main APIs | ADC_ConfigAnalogWatchdogThresholds, ADC_ConfigAnalogWatchdog1SingleChannel, ADC_ConfigAnalogWatchdog1WorkChannelType, ADC_SetAnalogWatchdog23MonitChannels, ADC_SetAnalogWatchdog23IntConfig, ADC_ConfigInt |
| Verification | Build, download, and run at full speed. When the PB0 input exceeds about 1.22V, PB2 toggles once, and when the PB1 input exceeds about 1.22V, PB3 toggles once. |
| Use note | The thresholds must be updated dynamically in the interrupt with each toggle to form the hysteresis. The example is based on the evaluation board N32H497VEL7_STB V1.0, and the development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1. |
Core-code walkthrough and porting
The example switches between two threshold levels to implement the hysteresis and level detection of a comparator with the analog watchdog.
Data path: PB0 and PB1 analog voltages -> ADC1 continuous conversion -> watchdog threshold comparison -> out-of-range AWD1 or AWD2 interrupt -> update the threshold and toggle PB2 or PB3
1. Configure the two channels and the watchdog thresholds. The sequence length is 2, and the two watchdogs guard PB1 and PB0 respectively.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.MultiChEn = ENABLE;
ADC_InitStructure.ContinueConvEn = ENABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 2;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel9 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_09_PB1, 1, ADC_SAMP_TIME_CYCLES_61_5);
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_08_PB0, 2, ADC_SAMP_TIME_CYCLES_61_5);
2. Configure the monitored channels and the interrupt. Watchdog 1 uses the single-channel interface and watchdog 2 uses the bit-mask interface to select the channel.
src/main.csrc/main.c · ADC_Initial
/* Configure ADC_AWDG1 and ADC_AWDG2 high and low analog watchdog thresholds */
ADC_ConfigAnalogWatchdogThresholds(ADC1,ADC_AWDG1, 0x060F, 0);
ADC_ConfigAnalogWatchdogThresholds(ADC1,ADC_AWDG2, 0x060F, 0);
/* Configure channelas the single analog watchdog1 guarded channel */
ADC_ConfigAnalogWatchdog1SingleChannel(ADC1, ADC1_Channel_09_PB1);
/* Enable analog watchdog 1 on one regular channel */
ADC_ConfigAnalogWatchdog1WorkChannelType(ADC1, ADC_ANALOG_WTDG_SINGLEREG_ENABLE);
/* Enable AWD1 interrupt ADC1*/
ADC_ConfigInt(ADC1, ADC_INT_AWD1, ENABLE);
ADC_SetAnalogWatchdog23MonitChannels(ADC1,ADC_AWDG2_EN_OFFSET,(1<<ADC1_Channel_08_PB0));
ADC_SetAnalogWatchdog23IntConfig(ADC1,ADC_AWDG2_INTEN_OFFSET,(1<<ADC1_Channel_08_PB0));
3. Update the threshold and toggle the output in the interrupt. The current threshold decides the hysteresis direction, and after the threshold is switched the corresponding pin is toggled.
src/n32h49x_it.csrc/n32h49x_it.c · ADC1_2_IRQHandler
if(ADC_GetIntStatus(ADC1,ADC_INT_AWD1) != RESET)
{
if((ADC1->WDG1HIGH & 0x0FFF) != 0x0FFF)
ADC_ConfigAnalogWatchdogThresholds(ADC1,ADC_AWDG1, 0x0FFF, 0x05EB);
else
ADC_ConfigAnalogWatchdogThresholds(ADC1,ADC_AWDG1, 0x060F, 0);
GPIOB->POD ^= GPIO_PIN_2;
/* Clear ADC1 AWD1 pending interrupt bit */
ADC_ClearIntPendingBit(ADC1, ADC_INT_AWD1);
}
The threshold switches between 0x060F and 0x0FFF to form a high-side hysteresis of about 1.22V, and these two constants should be adjusted for the target level when porting.
Corresponding source files: src/main.c, src/n32h49x_it.c, inc/main.h
5.1.3.9 AnalogWatchdog ADC analog watchdog
Example directory: projects/n32h49x_EVAL/examples/ADC/AnalogWatchdog/
configure the system and ADC clocks and set the sampling pin as analog input→initialize the ADC and configure two watchdog threshold pairs→enable the watchdog channel monitoring and interrupt→wait for ready and finish calibration, then start the conversion in software→on an out-of-range event enter the interrupt, clear the flag, and increment the counter
| Item | Source analysis |
|---|---|
| Function | ADC1 continuously converts the PB1 analog voltage, and when the value leaves the analog watchdog 1 or watchdog 2 threshold range it enters the interrupt and increments a counter. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, NVIC_Configuration;src/n32h49x_it.c: the ADC1_2_IRQHandler interrupt handler;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PB1 is set as analog input. ADC1: independent, continuous, single channel, software trigger, 12-bit right-aligned, sample time 61.5 ADCCLK. Watchdog 1 has a high threshold of 0x0B00 and a low threshold of 0x0300. Watchdog 2 has a high threshold of 0x0800 and a low threshold of 0x0400. Watchdog 1 guards a single channel and watchdog 2 guards channel PB1, and both interrupts are enabled. |
| Program and data path | ADC_Initial configures the watchdog thresholds and interrupts, then starts continuous conversion in software.In the interrupt the AWD1 and AWD2 sources are checked separately, the flag is cleared, and gCntAwdg is incremented.The main loop only increments a counter. |
| Main APIs | ADC_ConfigAnalogWatchdogThresholds, ADC_ConfigAnalogWatchdog1SingleChannel, ADC_ConfigAnalogWatchdog1WorkChannelType, ADC_SetAnalogWatchdog23MonitChannels, ADC_SetAnalogWatchdog23IntConfig, ADC_ConfigInt |
| Verification | Build and enter debug mode, then add the variable gCntAwdg to the watch window. Change the PB1 voltage, and leaving either watchdog threshold range raises the interrupt once, so the variable increments. |
| Use note | The status flag of watchdog 2 is tested with ADC_GetAnalogWatchdog23StatusFlag and cleared with ADC_ClearAnalogWatchdog23StatusFlag.Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example uses two analog watchdogs to monitor the same channel and counts in the interrupt on an out-of-range event.
Data path: PB1 analog voltage -> ADC1 continuous conversion -> watchdog 1 and watchdog 2 threshold comparison -> out-of-range interrupt -> clear the flag and increment gCntAwdg
1. Configure the channel and the watchdog thresholds. Watchdog 1 and watchdog 2 use different threshold windows.
src/main.csrc/main.c · ADC_Initial
/* ADC1 regular channel12 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_09_PB1, 1, ADC_SAMP_TIME_CYCLES_61_5);
/* Configure ADC_AWDG1 and ADC_AWDG2 high and low analog watchdog thresholds */
ADC_ConfigAnalogWatchdogThresholds(ADC1,ADC_AWDG1, 0x0B00, 0x0300);
ADC_ConfigAnalogWatchdogThresholds(ADC1,ADC_AWDG2, 0x0800, 0x0400);
/* Configure channel12 as the single analog watchdog1 guarded channel */
ADC_ConfigAnalogWatchdog1SingleChannel(ADC1, ADC1_Channel_09_PB1);
2. Enable the watchdog monitoring and the interrupt. Watchdog 1 guards the single regular channel and watchdog 2 selects the channel with a bit mask.
src/main.csrc/main.c · ADC_Initial
/* Enable analog watchdog 1 on one regular channel */
ADC_ConfigAnalogWatchdog1WorkChannelType(ADC1, ADC_ANALOG_WTDG_SINGLEREG_ENABLE);
/* Enable AWD1 interrupt */
ADC_ConfigInt(ADC1, ADC_INT_AWD1, ENABLE);
/* Enable analog watchdog 2 */
ADC_SetAnalogWatchdog23MonitChannels(ADC1,ADC_AWDG2_EN_OFFSET,(1<<ADC1_Channel_09_PB1));
ADC_SetAnalogWatchdog23IntConfig(ADC1,ADC_AWDG2_INTEN_OFFSET,(1<<ADC1_Channel_09_PB1));
3. Clear the flag and increment in the interrupt. The two watchdogs are checked separately, each cleared, and the same counter is incremented.
src/n32h49x_it.csrc/n32h49x_it.c · ADC1_2_IRQHandler
if(ADC_GetIntStatus(ADC1,ADC_INT_AWD1) != RESET)
{
/* Clear ADC1 AWD1 pending interrupt bit */
ADC_ClearIntPendingBit(ADC1, ADC_INT_AWD1);
gCntAwdg++;
}
else
{
/*no process */
}
if((ADC_GetAnalogWatchdog23IntConfig(ADC1,ADC_AWDG2_EN_OFFSET)&(1<<9)) != 0)
{
/* Clear ADC1 AWD2 pending interrupt bit */
ADC_ClearAnalogWatchdog23StatusFlag(ADC1,ADC_AWDG2_STS_OFFSET,(1<<9));
gCntAwdg++;
}
When porting, gCntAwdg can be replaced with the real handling action and the thresholds recalibrated for the target voltage range.
Corresponding source files: src/main.c, src/n32h49x_it.c, inc/main.h
5.1.3.10 ExtLinesTrigger External line trigger
Example directory: projects/n32h49x_EVAL/examples/ADC/ExtLinesTrigger/
configure the system and ADC clocks and set the sampling pins as analog input and the trigger pins as input→initialize the regular and injected channels of the ADC→configure the two external lines as rising-edge events and map them to the pins→the regular results are moved by DMA and the injected results by interrupt→a rising edge triggers sampling on the corresponding channel
| Item | Source analysis |
|---|---|
| Function | ADC1 regular channels are triggered by EXTI10 to sample PA1 and PB1, and injected channels by EXTI11 to sample PC0 and PC1, with the regular results over DMA and the injected results over the interrupt. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, EXTI_Configuration, DMA_Config, NVIC_Configuration;src/n32h49x_it.c: the ADC1_2_IRQHandler interrupt handler;inc/main.h: trigger line and trigger source macros and function declarations;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PA1, PB1, PC0, and PC1 are set as analog input, and PC10 and PC11 as input pull-down. Regular channels: independent, discontinuous scan mode, external line trigger, 12-bit right-aligned, discontinuous channel count 1. Injected sequence length 2 with an external line trigger, and the injected channels are PC0 and PC1. EXTI10 and EXTI11 are both event mode and rising edge, and DMA1 channel 1 moves 64 half-words in circular mode. |
| Program and data path | main configures the clocks, NVIC, GPIO, EXTI, and DMA first, then configures the ADC.A rising edge on PC10 triggers regular channel sampling, written to the regular array by DMA. A rising edge on PC11 triggers injected channel sampling, and the injected end-of-conversion interrupt writes the results to the injected array. |
| Main APIs | ADC_ConfigDiscModeChannelCount, ADC_EnableDiscMode, ADC_ConfigInjectedChannel, ADC_ConfigExternalTrigInjectedConv, ADC_ConfigRegularExtLineTrigSource, ADC_ConfigInjectedExtLineTrigSource |
| Verification | Build and enter debug mode, then add the arrays ADC_RegularConvertedValueTab[64] and ADC_InjectedConvertedValueTab[32] to the watch window. Give PC10 a rising edge to trigger regular sampling and PC11 a rising edge to trigger injected sampling. |
| Use note | The regular and injected groups are bound to different EXTI lines, and the pins must first be mapped to the EXTI lines in AFIO. Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example binds the regular and injected channels to two external lines respectively, driven by external rising edges.
Data path: PC10 rising edge -> EXTI10 triggers the regular channel scan -> DMA writes the regular array, and PC11 rising edge -> EXTI11 triggers the injected channels -> the injected end-of-conversion interrupt writes the injected array
1. Configure the regular and injected channels. The regular sequence has 2 channels and the injected sequence has 2 channels, and both triggers come from external lines.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.MultiChEn = ENABLE;
ADC_InitStructure.ContinueConvEn = DISABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_EXT_INT0_15;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 2;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel1 9 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_01_PA1, 1, ADC_SAMP_TIME_CYCLES_239_5);
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_09_PB1, 2, ADC_SAMP_TIME_CYCLES_239_5);
2. Configure the discontinuous mode and the injected channels. The regular channels use discontinuous scan and the injected channels use an external trigger.
src/main.csrc/main.c · ADC_Initial
/* Regular discontinuous mode channel number configuration */
ADC_ConfigDiscModeChannelCount(ADC1, 1);
/* Enable regular discontinuous mode */
ADC_EnableDiscMode(ADC1, ENABLE);
/* Set injected sequencer length */
ADC_ConfigInjectedSequencerLength(ADC1, 2);
/* ADC1 injected channel configuration */
ADC_ConfigInjectedChannel(ADC1, ADC1_Channel_10_PC0, 1, ADC_SAMP_TIME_CYCLES_239_5);
ADC_ConfigInjectedChannel(ADC1, ADC1_Channel_11_PC1, 2, ADC_SAMP_TIME_CYCLES_239_5);
/* ADC1 injected external trigger configuration */
ADC_ConfigExternalTrigInjectedConv(ADC1, ADC_EXT_TRIG_INJ_CONV_EXT_INT0_15);
3. Select the two external line sources. The regular and injected groups select EXTI10 and EXTI11 respectively.
src/main.csrc/main.c · ADC_Initial
ADC_ConfigRegularExtLineTrigSource(ADC1,Regular_ExtLine_TrigSource);
ADC_ConfigInjectedExtLineTrigSource(ADC1,Injected_ExtLine_TrigSource);
4. Configure the external lines as rising-edge events. GPIO_ConfigEXTILine maps the pins to the EXTI lines.
src/main.csrc/main.c · EXTI_Configuration
EXTI_InitStruct(&EXTI_InitStructure) ;
GPIO_ConfigEXTILine(REG_EXTI_LineSOURCE,REG_EXTI_PortSOURCE, REG_EXTI_PinSOURCE);
/* EXTI line11 configuration -----------------------------------------------*/
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Event;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
EXTI_InitStructure.EXTI_Line = REG_EXTI_LINE;
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_InitPeripheral(&EXTI_InitStructure);
5. Read the injected result in the interrupt. The injected end-of-conversion interrupt writes the channel 1 and channel 2 results to the injected array.
src/n32h49x_it.csrc/n32h49x_it.c · ADC1_2_IRQHandler
if(ADC_GetIntStatus(ADC1,ADC_INT_JENDC) != RESET)
{
/* Clear ADC1 JEOC pending interrupt bit */
ADC_ClearIntPendingBit(ADC1, ADC_INT_JENDC);
/* Get injected channel1 and channel2 converted value */
ADC_InjectedConvertedValueTab[Index++] = ADC_GetInjectedConversionDat(ADC1, ADC_INJECT_DATA_OFFSET_1);
ADC_InjectedConvertedValueTab[Index++] = ADC_GetInjectedConversionDat(ADC1, ADC_INJECT_DATA_OFFSET_2);
When porting, the Regular_ExtLine_TrigSource and Injected_ExtLine_TrigSource macros can be changed to use other EXTI lines.
Corresponding source files: src/main.c, src/n32h49x_it.c, inc/main.h
5.1.3.11 RegSimul_DualMode Dual ADC regular simultaneous
Example directory: projects/n32h49x_EVAL/examples/ADC/RegSimul_DualMode/
configure the system and ADC clocks and set the four sampling pins as analog input→initialize the master and slave ADC in regular simultaneous mode→initialize a DMA channel to move the synchronized results by word→enable and calibrate the master and slave ADC respectively→start the master ADC in software and wait for DMA to move 16 times
| Item | Source analysis |
|---|---|
| Function | ADC1 and ADC2 sample regular channels simultaneously, with ADC1 on PB0 and PB1 and ADC2 on PC0 and PC1, and the synchronized results are written to an array by DMA. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, DMA_Config;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PB0, PB1, PC0, and PC1 are set as analog input. ADC1 and ADC2 are both configured as dual-ADC regular simultaneous mode, continuous scan, software trigger, 12-bit right-aligned. DMA moves 16 words in word units, and the DMA mode is the 12-bit limit mode. The DMA requests of the master and slave ADC are both carried by the ADC1 channel, system clock HSI+PLL 240 MHz. |
| Program and data path | main configures the clocks, GPIO, and DMA, then calls ADC_Initial.ADC_Initial initializes ADC1 and ADC2 in turn and calibrates them separately, then enables DMA transfer.After starting the ADC1 conversion in software it waits for the DMA transfer complete flag. |
| Main APIs | ADC_Init, ADC_ConfigRegularChannel, ADC_CalibrationOperation, ADC_SetDMATransferMode, ADC_EnableSoftwareStartConv |
| Verification | Build and enter debug mode, then add the array ADC_DualConvertedValueTab[16] to the watch window. Set the PB0, PB1, PC0, and PC1 voltages before running at full speed, and after 16 conversions the results are written to the array. |
| Use note | The conversion is continuous, but DMA stores only the first 16 results. Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example demonstrates dual-ADC regular simultaneous mode, where the master and slave ADC sample at the same instant and the results are combined into one word moved by DMA.
Data path: PB0, PB1 and PC0, PC1 analog voltages -> ADC1 and ADC2 regular simultaneous conversion -> synchronized result word -> DMA transfer 16 times -> array ADC_DualConvertedValueTab
1. Configure the master ADC in regular simultaneous mode. The work modes of the master and slave ADC must match.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.WorkMode = ADC_WORKMODE_DUAL_REG_SIMULT;
ADC_InitStructure.MultiChEn = ENABLE;
ADC_InitStructure.ContinueConvEn = ENABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 2;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel1 and channel12 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_08_PB0, 1, ADC_SAMP_TIME_CYCLES_601_5);
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_09_PB1, 2, ADC_SAMP_TIME_CYCLES_601_5);
2. Configure the slave ADC. ADC2 uses the same mode and configures its own two channels.
src/main.csrc/main.c · ADC_Initial
ADC_InitStruct(&ADC_InitStructure);
ADC_InitStructure.WorkMode = ADC_WORKMODE_DUAL_REG_SIMULT;
ADC_InitStructure.MultiChEn = ENABLE;
ADC_InitStructure.ContinueConvEn = ENABLE;
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_SOFTWARE;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 2;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC2, &ADC_InitStructure);
/* ADC2 regular channel10 and channel1 configuration */
ADC_ConfigRegularChannel(ADC2, ADC2_Channel_10_PC0, 1, ADC_SAMP_TIME_CYCLES_601_5);
ADC_ConfigRegularChannel(ADC2, ADC2_Channel_11_PC1, 2, ADC_SAMP_TIME_CYCLES_601_5);
3. Configure DMA to move the synchronized results by word. The data width is word and normal mode moves 16 times.
src/main.csrc/main.c · DMA_Config
DMA_InitStructure.PeriphAddr = (uint32_t)&ADC1->DAT;
DMA_InitStructure.MemAddr = (uint32_t)ADC_DualConvertedValueTab;
DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
DMA_InitStructure.BufSize = 16;
DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
DMA_InitStructure.MemoryInc = DMA_MEM_INC_ENABLE;
DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_WIDTH_WORD;
DMA_InitStructure.MemDataSize = DMA_MEM_DATA_WIDTH_WORD;
DMA_InitStructure.CircularMode = DMA_MODE_NORMAL;
DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
DMA_Init(DMA1_CH1, &DMA_InitStructure);
4. Start the conversion and wait for the transfer to end. Only the master ADC is triggered in software, and the slave ADC follows the master.
src/main.csrc/main.c · main
/* Start ADC1 Software Conversion */
ADC_EnableSoftwareStartConv(ADC1, ENABLE);
/* Test on DMA1 channel1 transfer complete flag */
while (!DMA_GetFlagStatus(DMA_FLAG_TC1, DMA1))
;
/* Clear DMA1 channel1 transfer complete flag */
DMA_ClearFlag(DMA_FLAG_TC1, DMA1);
When porting, note that the conversion result of the slave ADC is read from the master data register together, so no separate read is needed.
Corresponding source files: src/main.c, inc/main.h
5.1.3.12 TIMTrigger_AutoInjection Timer trigger and auto injection
Example directory: projects/n32h49x_EVAL/examples/ADC/TIMTrigger_AutoInjection/
configure the system and ADC clocks and set the sampling pin as analog input and PC6 as output→initialize the regular and injected channels of the ADC and enable auto injection→configure CC4 of GTIM1 as the trigger source→enable the injected interrupt and DMA and start the timer→each CC4 event samples the regular and injected channels once, and the injected interrupt toggles the output
| Item | Source analysis |
|---|---|
| Function | The CC4 event of GTIM1 triggers ADC1 regular sampling of PA1, and after the regular conversion finishes it auto-injects PB1, with the injected result written to an array by the interrupt and PC6 toggled. |
| Source files | src/main.c: main, ADC_Initial, RCC_Configuration, GPIO_Configuration, TIM_Configuration, DMA_Config, NVIC_Configuration;src/n32h49x_it.c: the ADC1_2_IRQHandler interrupt handler;inc/main.h: function declarations and header includes;readme.txt: function, environment, and usage;MDK-ARM/, EWARM/: Keil and IAR projects. |
| Key configuration | PA1 and PB1 are set as analog input, PC6 as push-pull output, and PA3 is remapped as the GTIM1 CH4 output. ADC1: independent, single channel, GTIM1 CC4 trigger, 12-bit right-aligned, auto injection enabled. Injected sequence length 1, with the injected channel on PB1. DMA1 channel 1 moves 32 half-words of regular results in circular mode, and the GTIM1 period is 1600 in PWM1 mode. |
| Program and data path | main configures the clocks, NVIC, GPIO, TIM, DMA, and ADC in order, then enables GTIM1.Each CC4 event triggers one regular conversion, and the regular conversion auto-injects after it finishes. The injected end-of-conversion interrupt reads the value and toggles PC6. |
| Main APIs | ADC_EnableAutoInjectedConv, ADC_ConfigInjectedChannel, ADC_ConfigInt, ADC_GetInjectedConversionDat, ADC_SetDMATransferMode |
| Verification | Build and enter debug mode, then add the arrays ADC_RegularConvertedValueTab[32] and ADC_InjectedConvertedValueTab[32] to the watch window. Change the PA1 and PB1 voltages, each CC4 event converts once, and a PWM waveform is visible on PA3. |
| Use note | Auto injection and discontinuous mode cannot be used together, so this example does not enable discontinuous mode. Development environment is KEIL MDK-ARM V5.34 or IAR EWARM 8.50.1, hardware is the full-featured board N32H497ZGL7_EVB V1.0. |
Core-code walkthrough and porting
The example uses a timer compare event to drive the regular conversion and lets the regular conversion auto-inject one channel.
Data path: GTIM1 CC4 event -> ADC1 regular sampling of PA1 -> regular end auto-injects PB1 -> injected end-of-conversion interrupt reads the value -> writes the injected array and toggles PC6
1. Configure the regular channel, the injected channel, and auto injection. The regular channel uses the GTIM1 CC4 trigger and the injected sequence length is 1.
src/main.csrc/main.c · ADC_Initial
ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIG_REG_CONV_GTIM1_CC4;
ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R;
ADC_InitStructure.ChsNumber = 1;
ADC_InitStructure.Resolution = ADC_DATA_RES_12BIT;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel1 configuration */
ADC_ConfigRegularChannel(ADC1, ADC1_Channel_01_PA1, 1, ADC_SAMP_TIME_CYCLES_13_5);
/* Set injected sequencer length */
ADC_ConfigInjectedSequencerLength(ADC1, 1);
/* ADC1 injected channel9 configuration */
ADC_ConfigInjectedChannel(ADC1, ADC1_Channel_09_PB1, 1, ADC_SAMP_TIME_CYCLES_13_5);
/* Enable automatic injected conversion start after regular one */
ADC_EnableAutoInjectedConv(ADC1, ENABLE);
2. Enable the injected interrupt and DMA transfer. The injected end-of-conversion interrupt reads the value and DMA moves the regular results.
src/main.csrc/main.c · ADC_Initial
/* Enable JEOC interrupt */
ADC_ConfigInt(ADC1, ADC_INT_JENDC, ENABLE);
/* Enable ADC1 */
ADC_Enable(ADC1, ENABLE);
/*Check ADC Ready*/
while(ADC_GetFlagStatus(ADC1,ADC_FLAG_RDY) == RESET)
;
/* Start ADC1 calibration */
ADC_CalibrationOperation(ADC1,ADC_CALIBRATION_SINGLE_MODE);
/* Check the end of ADC1 calibration */
while (ADC_GetCalibrationStatus(ADC1,ADC_CALIBRATION_SINGLE_MODE))
;
/* Enable ADC1 DMA */
ADC_SetDMATransferMode(ADC1, ADC_MULTI_REG_DMA_EACH_ADC);
3. Configure GTIM1 to provide the CC4 trigger. The time base period is 1600 and CH4 uses PWM1 mode to produce the trigger event.
src/main.csrc/main.c · TIM_Configuration
PrescalerValue = (uint32_t)(SystemCoreClock / 16000000) - 1;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 1600;
TIM_TimeBaseStructure.Prescaler = PrescalerValue;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(GTIM1, &TIM_TimeBaseStructure);
4. Read the value and toggle the output in the injected interrupt. The interrupt reads the injected result and toggles PC6 for oscilloscope observation.
src/n32h49x_it.csrc/n32h49x_it.c · ADC1_2_IRQHandler
void ADC1_2_IRQHandler(void)
{
GPIO_SetBits(GPIOC, GPIO_PIN_6);
if(ADC_GetIntStatus(ADC1,ADC_INT_JENDC) != RESET)
{
/* Clear ADC1 JEOC pending interrupt bit */
ADC_ClearIntPendingBit(ADC1, ADC_INT_JENDC);
/* Get injected channel1 converted value */
ADC_InjectedConvertedValueTab[Index++] = ADC_GetInjectedConversionDat(ADC1, ADC_INJECT_DATA_OFFSET_1);
/* Reset PC.06 pin */
GPIO_ResetBits(GPIOC, GPIO_PIN_6);
if (Index == 32)
{
Index = 0;
}
}
}
When porting, change the trigger source to another timer compare channel and adjust the ADC external trigger macro accordingly.
Corresponding source files: src/main.c, src/n32h49x_it.c, inc/main.h
5.1.4 Notes and troubleshooting
| Scenario | Check & action | Source |
|---|---|---|
| Calibration and operation order | Complete calibration before any ADC operation; do not enable calibration auto-load while calibration is starting, or the calibration accuracy is affected. |
User manual |
| Write timing of the sequence registers and sample times | Do not change the ADC_RSEQx or ADC_JSEQ registers during a conversion, only while the ADC is idle; the channel selection bits must stay unchanged during sampling. |
User manual |
| Analog watchdog thresholds and resolution | When the resolution is below 12 bits, the LSB of the programmed threshold must be kept clear, because the full 12-bit conversion data is compared left-aligned; the watchdog 1 filter is effective only when the watchdog guards a single channel. |
User manual |
| Trigger period in oversampling reset mode | In reset mode, make sure the injected trigger period exceeds the oversampling period length, otherwise the oversampling cannot finish and blocks the regular sequencer. | User manual |
| Multi-ADC channels and stop conversion | Do not convert the same channel on several ADCs, because the sample times of two ADCs on that channel must not overlap; stop conversion is unavailable in multi-ADC mode, and only the master ADC needs configuration. |
User manual |
| ADC clock and timer clock | Only AHB_CLK can be selected as the working clock source, up to 240 MHz; the ADC_1MCLK timer clock must be configured to 1 MHz. |
User manual |
| Channel restriction of differential input | Some channels are internally fixed to single-ended inputs; do not configure them as differential, see the ADC chapter of the user manual for the exact list. |
User manual |