5.23 DBG Guide
This chapter describes the file composition and the 8 public functions of the DBG driver in the N32G41x standard peripheral library: reading the customer ID and the device ID, parsing the revision number and device information from DBG_ID, and configuring peripheral behaviour while the core is halted. This SDK provides no standalone example project for DBG. Read the SWD pin assignment and the DBG_ID and DBG_CTRL register definitions together with the “Debug support (DBG)” chapter of the user manual, and take the errata sheet as the authority on known chip issues.
5.23.1 Related files
| Relative path | Purpose |
|---|---|
firmware/n32g41x_std_periph_driver/inc/n32g41x_dbg.h |
Defines the DBG_*_STOP debug-halt macros and declares 8 public functions in the three sections ID retrieval, device information and configuration |
firmware/n32g41x_std_periph_driver/src/n32g41x_dbg.c |
Implements those 8 functions: byte-wise reads of two ID areas, parsing of the revision number, device model and FLASH and SRAM sizes from DBG->ID, and read-modify-write of DBG->CTRL |
firmware/CMSIS/device/n32g41x.h |
Defines UCID_BASE, UID_BASE, DBGMCU_ID_BASE and the length macros, the DBG register structure pointer, the ID field masks and the DBG_CTRL bit definitions |
5.23.2 API reference
The following 8 public functions are listed in the declaration order of n32g41x_dbg.h in 3 groups; each entry gives a summary and the original comment above the function in n32g41x_dbg.c.
ID retrieval
GetUCID, GetUID, GetDBGMCU_ID
Device information
DBG_GetRevNum, DBG_GetDevNum, DBG_GetFlashSize, DBG_GetSramSize
Configuration
DBG_ConfigPeriph
void GetUCID(uint8_t *UCIDbuf)Get the 128-bit unique customer ID UCID.
name GetUCID.
fun Get the 128-bit unique customer ID UCID.
param UCIDbuf : pointer to a buffer of at least UCID_LENGTH bytes.
return none
Use note: The implementation reads UCID_LENGTH (16) bytes byte by byte starting from UCID_BASE (0x1FFFF4D0) into UCIDbuf; the caller must provide a buffer of at least 16 bytes.
void GetUID(uint8_t *UIDbuf)Get the 96-bit unique device ID UID.
name GetUID.
fun Get the 96-bit unique device ID UID.
param UIDbuf : pointer to a buffer of at least UID_LENGTH bytes.
return none
Use note: The implementation reads UID_LENGTH (12) bytes byte by byte starting from UID_BASE (0x1FFFF500) into UIDbuf; the caller must provide a buffer of at least 12 bytes.
void GetDBGMCU_ID(uint8_t *DBGMCU_IDbuf)get the DBG_ID number.
name GetDBGMCU_ID.
fun get the DBG_ID number.
param DBGMCU_IDbuf : pointer to a buffer of at least DBGMCU_ID_LENGTH bytes.
return none
Use note: The implementation first reads DBG->ID as a word and then splits it into DBGMCU_ID_LENGTH (4) bytes, least significant byte first, into DBGMCU_IDbuf.
uint32_t DBG_GetRevNum(void)get the revision number.
name DBG_GetRevNum.
fun get the revision number.
param none
return 8-bit revision number: REV_NUM_H[3:0] (bits 7:4) and
REV_NUM_L[3:0] (bits 3:0). Read-only, fixed at production.
Use note: The implementation returns the low 8 bits of DBG->ID, that is, the 8-bit revision number formed by REV_NUM_H[3:0] in bits 7:4 and REV_NUM_L[3:0] in bits 3:0.
uint32_t DBG_GetDevNum(void)get the device identifier.
name DBG_GetDevNum.
fun get the device identifier.
param none
return Device identifier
Use note: The implementation places DEV_NUM_L[3:0] from bits 23:20 of DBG->ID into bits 3:0 of the result and DEV_NUM_H and DEV_NUM_M from bits 15:8 into bits 11:4, forming a 12-bit device model.
uint32_t DBG_GetFlashSize(void)Get FLASH size of this chip.
name DBG_GetFlashSize.
fun Get FLASH size of this chip.
param none
return FLASH size in bytes. The value is the DBG_ID.FLASH[19:16] field
multiplied by 32 KB, so it is always a multiple of 32 KB.
Use note: The implementation returns the product of FLASH[3:0] in bits 19:16 of DBG->ID and 32 KB, in bytes.
uint32_t DBG_GetSramSize(void)Get SRAM size of this chip.
name DBG_GetSramSize.
fun Get SRAM size of this chip.
param none
return SRAM size in bytes. The value is the DBG_ID.SRAM[31:28] field
multiplied by 8 KB, so it is always a multiple of 8 KB.
Use note: The implementation returns the product of SRAM[3:0] in bits 31:28 of DBG->ID and 8 KB, in bytes.
void DBG_ConfigPeriph(uint32_t DBG_Periph, FunctionalState Cmd)Configures the specified peripheral run or stop when the MCU under Debug mode.
name DBG_ConfigPeriph.
fun Configures the specified peripheral run or stop when the MCU under Debug mode.
param DBG_Periph :
- DBG_IWDG_STOP \* IWDG stopped when Core is halted. *\
- DBG_WWDG_STOP \* WWDG stopped when Core is halted. *\
- DBG_ATIM1_STOP \* ATIM1 counter stopped when core is halted *\
- DBG_GTIM1_STOP \* GTIM1 counter stopped when core is halted *\
- DBG_GTIM2_STOP \* GTIM2 counter stopped when core is halted *\
- DBG_GTIM3_STOP \* GTIM3 counter stopped when core is halted *\
- DBG_CAN_STOP \* CAN stopped when core is halted *\
- DBG_I2C1SMBUS_TIMEOUT \* I2C1 SMBUS timeout mode stopped when Core is halted *\
- DBG_I2C2SMBUS_TIMEOUT \* I2C2 SMBUS timeout mode stopped when Core is halted *\
- DBG_ATIM2_STOP \* ATIM2 counter stopped when core is halted *\
- DBG_GTIM4_STOP \* GTIM4 counter stopped when core is halted *\
- DBG_BTIM1_STOP \* BTIM1 counter stopped when core is halted *\
- DBG_BTIM2_STOP \* BTIM2 counter stopped when core is halted *\
param Cmd:
- ENABLE
- DISABLE
return none
Use note: When Cmd is not DISABLE the implementation ORs DBG_Periph into DBG->CTRL, otherwise it clears those bits; several macros can be passed as one bitwise OR to configure several peripherals at once.
5.23.3 Demo descriptions
This SDK provides no standalone example project for DBG.
5.23.4 Notes and troubleshooting
| Scenario | Check & action | Source |
|---|---|---|
| Peripherals keep running while the core is halted at a breakpoint | Where the timer counters, the WWDG/IWDG counters, CAN reception or the I2C SMBUS timeout must also stop during a debug halt, use DBG_ConfigPeriph to set the corresponding bit in DBG_CTRL;the POR default of DBG_CTRL is 0 and a system reset does not reset this register. |
User manual |
| The debugger cannot connect | The N32G41x debug interface is SWD, with SWDIO on PA13 and SWCLK on PA14; after a program turns these two pins into ordinary IO the debugger cannot connect, so keep a branch that restores SWD, as in the IORemap example of the GPIO section. |
User manual |
| How the DBG registers may be accessed | The DBG registers must be accessed as words (32 bits) and their base address is 0xE0042000;DBG_ID supports 32-bit access only and holds fixed, unmodifiable values, so use the word-reading DBG_GetRevNum and DBG_GetDevNum when a revision number or device model is needed. |
User manual |
| Combining the device model fields | The device model in DBG_ID consists of 12 bits in DEV_NUM_H[3:0], DEV_NUM_M[3:0] and DEV_NUM_L[3:0], held in bits 15:12, bits 11:8 and bits 23:20;after reading them in the manual order they must be combined by the application. |
User manual |
| Writing the reserved bits | Bits 27:24 of DBG_ID and bits 31:21 and bits 7:0 of DBG_CTRL are reserved and must keep their reset values. |
User manual |
The N32G412 and N32G415 series errata sheet V1.0.0 (2026.6.30) lists a single row for revision A chips with an empty errata link column, and gives no specific entries.