5.15 RCC Guide
This chapter describes the file composition and the 42 public functions of the RCC driver in the N32G033 standard peripheral library, together with the 2 examples LSI_Calibration and RCC_ClockConfig. Read the reset sources, the clock tree, HSI/LSI switching and the clock-calibration principle together with the “Reset and clock control (RCC)” chapter of the user manual; for known silicon issues, refer to the errata sheet.
5.15.1 Related files
| Relative path | Purpose |
|---|---|
firmware/n32g033_std_periph_driver/inc/n32g033_rcc.h |
Defines the macros for system clock source, bus prescalers, peripheral clock gating, MCO output, EMC/Glitch detection and calibration, and declares the 42 public functions grouped into nine functional sections |
firmware/n32g033_std_periph_driver/src/n32g033_rcc.c |
Implements the 42 functions above: RCC reset, HSI/LSI enable and stability wait, system clock and bus prescalers, peripheral clock gating and software reset, MCO output, reset flags and interrupts, EMC/Glitch detection, clock-source selection and filter prescalers, LSI calibration |
projects/n32g033_EVAL/examples/RCC/ |
RCC example root directory, containing 2 examples: LSI_Calibration and RCC_ClockConfig |
projects/n32g033_EVAL/examples/RCC/RCC_ClockConfig/ |
Example directory composition: MDK-ARM/, EWARM/, inc/, src/, readme.txt |
projects/n32g033_EVAL/bsp/inc/, projects/n32g033_EVAL/bsp/src/ |
Board-level common files; the examples use log.h for serial logging |
5.15.2 API reference
The 42 public functions below are grouped into 9 groups in the declaration order of n32g033_rcc.h; each entry gives a function summary and the source comment verbatim above that function in n32g033_rcc.c.
Reset and oscillator enable
RCC_DeInit, RCC_EnableHsi, RCC_WaitHsiStable
Oscillator calibration
RCC_SetHsiCalibValue, RCC_ConfigLsiCalibSource, RCC_SetLsiCalibValue
System clock and bus prescalers
RCC_ConfigSysclkPres, RCC_ConfigSysclk, RCC_GetSysclkSrc, RCC_ConfigHclk, RCC_ConfigPclk, RCC_ConfigAdcHclk, RCC_GetClocksFreqValue
Peripheral clock enable and reset
RCC_EnableAHBPeriphClk, RCC_EnableAPBPeriphClk, RCC_EnableAHBPeriphReset, RCC_EnableAPBPeriphReset
Clock output (MCO)
RCC_ConfigMcoClkPre, RCC_ConfigMco
Flags and interrupts
RCC_GetFlagStatus, RCC_ClearResetFlag, RCC_GetIntStatus, RCC_ClrIntPendingBit
EMC and Glitch detection
RCC_EnableEMCReset, RCC_EnableEMCDetect, RCC_EnableEMCSwitch, RCC_ConfigEMCDetectLevel, RCC_EnableGlitchDetect, RCC_EnableGlitchReset, RCC_EnableGlitchSwitch, RCC_ConfigGlitchDetectLevel, RCC_EnableM0LockupReset
Timer and UART clock sources
RCC_ConfigTimClk, RCC_ConfigTim6Clk, RCC_ConfigUart3Clk
Input filtering and LSI calibration
RCC_ConfigIOFilter, RCC_ConfigTIM4Filter, RCC_ConfigTIM3Filter, RCC_ConfigTIM1Filter, RCC_ConfigLSICalibPeriod, RCC_EnableLSICalibration, RCC_GetHSICalibPeriod
void RCC_DeInit(void)Reset the RCC registers.
name RCC_DeInit.
fun Reset the RCC registers.
param none
return none
void RCC_EnableHsi(FunctionalState Cmd)Enables the Internal High Speed oscillator (HSI).
name RCC_EnableHsi.
fun Enables the Internal High Speed oscillator (HSI).
param Cmd:
- ENABLE
- DISABLE
return none
note HSI can not be stopped if it is used directly or through the PLL as system clock.
ErrorStatus RCC_WaitHsiStable(void)Waits for HSI start-up.
name RCC_WaitHsiStable.
fun Waits for HSI start-up.
param none
return ErrorStatus:
- SUCCESS HSI oscillator is stable and ready to use
- ERROR HSI oscillator not yet ready
void RCC_SetHsiCalibValue(uint16_t calibration_value)Adjusts the Internal High Speed oscillator (HSI) calibration value.
name RCC_SetHsiCalibValue.
fun Adjusts the Internal High Speed oscillator (HSI) calibration value.
param calibration_value(the calibration trimming value):
This parameter must be a number between 0 and 0x3FF
return none
void RCC_ConfigLsiCalibSource(uint32_t cal_src)Configures LSI calibration values source.
name RCC_ConfigLsiCalibSource.
fun Configures LSI calibration values source.
param cal_src:
- RCC_LSICAL_SRC_AFEC LSI calibration values are sourced from AFEC
- RCC_LSICAL_SRC_TRIM LSI calibration values are sourced from LSITRIM
return none
void RCC_SetLsiCalibValue(uint16_t calibration_value)Adjusts the Internal Low Speed oscillator (LSI) calibration value.
name RCC_SetLsiCalibValue.
fun Adjusts the Internal Low Speed oscillator (LSI) calibration value.
param calibration_value(the calibration trimming value):
This parameter must be a number between 0 and 0x1FF
return none
void RCC_ConfigSysclkPres(uint32_t sysclk_pres)Configures the system clock (SYSCLK) prescaler.
name RCC_ConfigSysclkPres.
fun Configures the system clock (SYSCLK) prescaler.
param sysclk_pres(HSI divider used as system clock):
- RCC_SYSCLK_PRES_DIV1 HSI divide 1 used as system clock
- RCC_SYSCLK_PRES_DIV2 HSI divide 2 used as system clock
return none
void RCC_ConfigSysclk(uint32_t sysclk_source)Configures the system clock (SYSCLK).
name RCC_ConfigSysclk.
fun Configures the system clock (SYSCLK).
param sysclk_source(clock source used as system clock):
- RCC_SYSCLK_SRC_HSI HSI(or divide 2) selected as system clock
- RCC_SYSCLK_SRC_LSI LSI selected as system clock
return none
uint32_t RCC_GetSysclkSrc(void)Returns the clock source used as system clock.
name RCC_GetSysclkSrc.
fun Returns the clock source used as system clock.
param none
return (The clock source used as system clock):
- RCC_CFG_SCLKSTS_HSI HSI used as system clock
- RCC_CFG_SCLKSTS_LSI LSI used as system clock
void RCC_ConfigHclk(uint32_t sysclk_div)Configures the AHB clock (HCLK).
name RCC_ConfigHclk.
fun Configures the AHB clock (HCLK).
param sysclk_div(AHB clock is derived from the system clock (SYSCLK)):
- RCC_SYSCLK_DIV1 AHB clock = SYSCLK
- RCC_SYSCLK_DIV2 AHB clock = SYSCLK/2
- RCC_SYSCLK_DIV4 AHB clock = SYSCLK/4
- RCC_SYSCLK_DIV8 AHB clock = SYSCLK/8
- RCC_SYSCLK_DIV16 AHB clock = SYSCLK/16
return none
void RCC_ConfigPclk(uint32_t hclk_div)Configures the Low Speed APB clock (PCLK).
name RCC_ConfigPclk.
fun Configures the Low Speed APB clock (PCLK).
param hclk_div(APB clock is derived from the AHB clock (HCLK)):
- RCC_HCLK_DIV1 APB clock = HCLK
- RCC_HCLK_DIV2 APB clock = HCLK/2
- RCC_HCLK_DIV4 APB clock = HCLK/4
- RCC_HCLK_DIV8 APB clock = HCLK/8
- RCC_HCLK_DIV16 APB clock = HCLK/16
return none
void RCC_ConfigAdcHclk(uint32_t hclk_prescaler)Configures the ADCHCLK prescaler.
name RCC_ConfigAdcHclk.
fun Configures the ADCHCLK prescaler.
param hclk_prescaler(ADCHCLK prescaler):
- RCC_ADCHCLK_DIV2 ADCHPRE[2:0] = 000, HCLK Clock Divided By 2
- RCC_ADCHCLK_DIV4 ADCHPRE[2:0] = 011, HCLK Clock Divided By 4
- RCC_ADCHCLK_DIV8 ADCHPRE[2:0] = 100, HCLK Clock Divided By 8
- RCC_ADCHCLK_DIV16 ADCHPRE[2:0] = 101, HCLK Clock Divided By 16
- RCC_ADCHCLK_DIV32 ADCHPRE[2:0] = 110, HCLK Clock Divided By 32
- RCC_ADCHCLK_DIV_OTHERS ADCHPRE[2:0] = others, HCLK Clock Divided By 32
return none
void RCC_GetClocksFreqValue(RCC_ClocksType* RCC_Clocks)Returns the frequencies of different on chip clocks.
name RCC_GetClocksFreqValue.
fun Returns the frequencies of different on chip clocks.
param RCC_clocks pointer to a RCC_ClocksType structure which will hold
the clocks frequencies.
return none
void RCC_EnableAHBPeriphClk(uint32_t AHB_periph, FunctionalState Cmd)Enables the AHB peripheral clock.
name RCC_EnableAHBPeriphClk.
fun Enables the AHB peripheral clock.
param AHB_periph (AHB peripheral to gates its clock):
- RCC_AHB_PERIPH_SQRT
- RCC_AHB_PERIPH_HDIV
- RCC_AHB_PERIPH_ADC
- RCC_AHB_PERIPH_DMA
param Cmd:
- ENABLE
- DISABLE
return none
void RCC_EnableAPBPeriphClk(uint32_t APB_periph, FunctionalState Cmd)Enables the High Speed APB peripheral clock.
name RCC_EnableAPBPeriphClk.
fun Enables the High Speed APB peripheral clock.
param APB_periph (APB peripheral to gates its clock):
- RCC_APB_PERIPH_GPIO
- RCC_APB_PERIPH_I2C1
- RCC_APB_PERIPH_I2C2
- RCC_APB_PERIPH_PWR
- RCC_APB_PERIPH_SPI1
- RCC_APB_PERIPH_SPI2
- RCC_APB_PERIPH_TIM1
- RCC_APB_PERIPH_TIM3
- RCC_APB_PERIPH_TIM4
- RCC_APB_PERIPH_TIM6
- RCC_APB_PERIPH_UART1
- RCC_APB_PERIPH_UART2
- RCC_APB_PERIPH_UART3
- RCC_APB_PERIPH_COMP
- RCC_APB_PERIPH_COMPFILT
- RCC_APB_PERIPH_OPA
param Cmd:
- ENABLE
- DISABLE
return none.
void RCC_EnableAHBPeriphReset(uint32_t AHB_periph)AHB peripheral reset.
name RCC_EnableAHBPeriphReset.
fun AHB peripheral reset.
param AHB_periph specifies the AHB peripheral to reset.
- RCC_AHB_PERIPH_SQRT
- RCC_AHB_PERIPH_HDIV
- RCC_AHB_PERIPH_ADC
return none.
void RCC_EnableAPBPeriphReset(uint32_t APB_periph)Low Speed APB (APB1) peripheral reset.
name RCC_EnableAPB1PeriphReset.
fun Low Speed APB (APB1) peripheral reset.
param APB1_periph specifies the APB1 peripheral to reset.
- RCC_APB_PERIPH_GPIO
- RCC_APB_PERIPH_I2C1
- RCC_APB_PERIPH_I2C2
- RCC_APB_PERIPH_SPI1
- RCC_APB_PERIPH_SPI2
- RCC_APB_PERIPH_TIM1
- RCC_APB_PERIPH_TIM3
- RCC_APB_PERIPH_TIM4
- RCC_APB_PERIPH_TIM6
- RCC_APB_PERIPH_UART1
- RCC_APB_PERIPH_UART2
- RCC_APB_PERIPH_UART3
- RCC_APB_PERIPH_COMP
- RCC_APB_PERIPH_OPA
return none.
Use note: This function is declared at line 239 of n32g033_rcc.h; the name in the source comment reads RCC_EnableAPB1PeriphReset., which differs from the function name RCC_EnableAPBPeriphReset; the comment is copied verbatim.
void RCC_ConfigMcoClkPre(uint32_t MCO_PLL_prescaler)Configures the MCO System and HSI clock prescaler.
name RCC_ConfigMcoClkPre.
fun Configures the MCO System and HSI clock prescaler.
param MCO_PLL_prescaler specifies the MCO PLL clock prescaler.
This parameter can be on of the following values:
- RCC_MCO_CLK_DIV2 MCOPRE[2:0] = 010, System and HSI Clock Divided By 2
- RCC_MCO_CLK_DIV3 MCOPRE[2:0] = 011, System and HSI Clock Divided By 3
- RCC_MCO_CLK_DIV4 MCOPRE[2:0] = 100, System and HSI Clock Divided By 4
- RCC_MCO_CLK_DIV5 MCOPRE[2:0] = 101, System and HSI Clock Divided By 5
- RCC_MCO_CLK_DIV6 MCOPRE[2:0] = 110, System and HSI Clock Divided By 6
- RCC_MCO_CLK_DIV7 MCOPRE[2:0] = 111, System and HSI Clock Divided By 7
return none.
void RCC_ConfigMco(uint32_t MCO_source)Selects the clock source to output on MCO pin.
name RCC_ConfigMco.
fun Selects the clock source to output on MCO pin.
param MCO_source(clock source to output):
- RCC_MCO_NOCLK No clock selected
- RCC_MCO_LSI LSI oscillator clock selected
- RCC_MCO_SYSCLK System clock selected
- RCC_MCO_HSI HSI oscillator clock selected
return none.
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG)Checks whether the specified RCC flag is set or not.
name RCC_GetFlagStatus.
fun Checks whether the specified RCC flag is set or not.
param RCC_flag:
- RCC_CTRL_FLAG_HSIRDF HSI oscillator clock ready
- RCC_CTRL_FLAG_LSICALCF LSI Calibration finish
- RCC_CLKINT_FLAG_LSIRDF LSI oscillator clock ready
- RCC_CTRLSTS_FLAG_PINRSTF Pin reset
- RCC_CTRLSTS_FLAG_PORRSTF POR/PDR reset
- RCC_CTRLSTS_FLAG_SFTRSTF Software reset
- RCC_CTRLSTS_FLAG_IWDGRSTF Independent Watchdog reset
- RCC_CTRLSTS_FLAG_GLITCHF Glitch reset
- RCC_CTRLSTS_FLAG_EMCGBNRSTF EMCGBN reset
- RCC_CTRLSTS_FLAG_EMCGBRSTF EMCGB reset
- RCC_CTRLSTS_FLAG_LKUPRSTF M0 lock up reset
return FlagStatus:
- SET
- RESET
void RCC_ClearResetFlag(void)Clears the RCC reset flags.
name RCC_ClearResetFlag.
fun Clears the RCC reset flags.
param none
return none
note Clear the following flags:
- RCC_CTRLSTS_FLAG_PINRSTF Pin reset
- RCC_CTRLSTS_FLAG_PORRSTF POR/PDR reset
- RCC_CTRLSTS_FLAG_SFTRSTF Software reset
- RCC_CTRLSTS_FLAG_IWDGRSTF Independent Watchdog reset
- RCC_CTRLSTS_FLAG_GLITCHF Glitch reset
- RCC_CTRLSTS_FLAG_EMCGBNRSTF EMCGBN reset
- RCC_CTRLSTS_FLAG_EMCGBRSTF EMCGB reset
- RCC_CTRLSTS_FLAG_LKUPRSTF M0 lock up reset
INTStatus RCC_GetIntStatus(uint8_t interrupt_flag)Checks whether the specified RCC interrupt has occurred or not.
name RCC_GetIntStatus.
fun Checks whether the specified RCC interrupt has occurred or not.
param interrupt_flag(RCC interrupt source to check):
- RCC_INT_LSIRDIF LSI ready interrupt
- RCC_INT_HSIRDIF HSI ready interrupt
return The new state of RccInt
- SET
- RESET
void RCC_ClrIntPendingBit(uint32_t interrupt_clear)Clears the RCC’s interrupt pending bits.
name RCC_ClrIntPendingBit.
fun Clears the RCC's interrupt pending bits.
param RccInt specifies the interrupt pending bit to clear.
- RCC_CLR_LSIRDIF Clear LSI ready interrupt flag
- RCC_CLR_HSIRDIF Clear HSI ready interrupt flag
return none.
void RCC_EnableEMCReset(uint32_t EMC_type, FunctionalState Cmd)Configure whether to generate a reset request when an EMC error occurs.
name RCC_EnableEMCReset.
fun Configure whether to generate a reset request when an EMC error occurs.
param EMC_type:
- RCC_EMC_GB
- RCC_EMC_GBN
param Cmd:
- ENABLE
- DISABLE
return none.
void RCC_EnableEMCDetect(uint32_t EMC_type, FunctionalState Cmd)Configure whether to enable EMC detection.
name RCC_EnableEMCDetect.
fun Configure whether to enable EMC detection.
param EMC_type:
- RCC_EMC_GB
- RCC_EMC_GBN
param Cmd:
- ENABLE
- DISABLE
return none.
void RCC_EnableEMCSwitch(uint32_t EMC_type, FunctionalState Cmd)Configure whether to enable EMC switch.
name RCC_EnableEMCSwitch.
fun Configure whether to enable EMC switch.
param EMC_type:
- RCC_EMC_GB
- RCC_EMC_GBN
param Cmd:
- ENABLE
- DISABLE
return none.
void RCC_ConfigEMCDetectLevel(uint32_t EMC_type, uint8_t level)Configures the voltage threshold detected by the EMC.
name RCC_ConfigEMCDetectLevel.
fun Configures the voltage threshold detected by the EMC.
param EMC_type:
- RCC_EMC_GB
- RCC_EMC_GBN
param level (The input parameters must be the following values):
- 0x0 ~ 0x3
return none
void RCC_EnableGlitchDetect(FunctionalState Cmd)Configure whether to enable Glitch.
name RCC_EnableGlitchDetect.
fun Configure whether to enable Glitch.
param Cmd:
- ENABLE
- DISABLE
return none.
note After enabling the GVDET bit by RCC_EnableGlitchDetect(), a delay of 10us or more is required to
enable the GVRST bit and GVSW bit by RCC_EnableGlitchReset() and RCC_EnableGlitchSwitch().
void RCC_EnableGlitchReset(FunctionalState Cmd)Configure whether to enable Glitch reset.
name RCC_EnableGlitchReset.
fun Configure whether to enable Glitch reset.
param Cmd:
- ENABLE
- DISABLE
return none.
void RCC_EnableGlitchSwitch(FunctionalState Cmd)Configure whether to enable Glitch switch.
name RCC_EnableGlitchSwitch.
fun Configure whether to enable Glitch switch.
param Cmd:
- ENABLE
- DISABLE
return none.
void RCC_ConfigGlitchDetectLevel(uint8_t level)Configures the voltage threshold detected by the Glitch.
name RCC_ConfigGlitchDetectLevel.
fun Configures the voltage threshold detected by the Glitch.
param level (The input parameters must be the following values):
- 0x0 ~ 0x1F
return none
void RCC_EnableM0LockupReset(FunctionalState Cmd)Configure whether to enable M0 lockup reset.
name RCC_EnableM0LockupReset.
fun Configure whether to enable M0 lockup reset.
param Cmd:
- ENABLE
- DISABLE
return none.
void RCC_ConfigTimClk(uint32_t timer_clksrc)Configures the TIM1/3/4 clock source(TIMCLK).
name RCC_ConfigTimClk.
fun Configures the TIM1/3/4 clock source(TIMCLK).
param timer_clksrc(TIM clock source):
- RCC_TIM_CLKSRC_HCLK
- RCC_TIM_CLKSRC_SYSCLK
return none
void RCC_ConfigTim6Clk(uint32_t timer_clksrc)Configures the TIM6 clock source(TIM6CLK).
name RCC_ConfigTim6Clk.
fun Configures the TIM6 clock source(TIM6CLK).
param timer_clksrc(TIM6 clock source):
- RCC_TIM6_CLKSRC_SYSCLK
- RCC_TIM6_CLKSRC_LSI
return none
void RCC_ConfigUart3Clk(uint32_t uart3_clksrc)Configures the UART3 clock source(UART3CLK).
name RCC_ConfigUart3Clk.
fun Configures the UART3 clock source(UART3CLK).
param uart3_clksrc(UART3 clock source):
- RCC_UART3_CLKSRC_PCLK
- RCC_UART3_CLKSRC_LSI
return none
void RCC_ConfigIOFilter(uint32_t ioflitclk_div)Configures the Speed of GPIO fliter.
name RCC_ConfigIOFilter.
fun Configures the Speed of GPIO fliter.
param ioflitclk_div value(IO Fliter clock is derived from the AHB clock (HCLK)):
-0 ~ 0xF
return none
void RCC_ConfigTIM4Filter(uint32_t tim4flitclk_div)Configures the Speed of TIM4 fliter.
name RCC_ConfigTIM4Filter.
fun Configures the Speed of TIM4 fliter.
param tim4flitclk_div value(TIM4 Fliter clock is derived from the AHB clock (HCLK)):
-0 ~ 0x1F
return none
void RCC_ConfigTIM3Filter(uint32_t tim3flitclk_div)Configures the Speed of TIM3 fliter.
name RCC_ConfigTIM3Filter.
fun Configures the Speed of TIM3 fliter.
param tim3flitclk_div value(TIM3 Fliter clock is derived from the AHB clock (HCLK)):
-0 ~ 0x1F
return none
void RCC_ConfigTIM1Filter(uint32_t tim1flitclk_div)Configures the Speed of TIM1 fliter.
name RCC_ConfigTIM1Filter.
fun Configures the Speed of TIM1 fliter.
param tim1flitclk_div value(TIM1 Fliter clock is derived from the AHB clock (HCLK)):
-0 ~ 0x1F
return none
void RCC_ConfigLSICalibPeriod(uint32_t lsi_period)Configure LSI Calibration Period.
name RCC_ConfigLSICalibPeriod.
fun Configure LSI Calibration Period.
param lsi_period:
- RCC_LSICAL_PERIOD_128 Count the HSI clock within 128 LSI cycles
- RCC_LSICAL_PERIOD_256 Count the HSI clock within 256 LSI cycles
- RCC_LSICAL_PERIOD_512 Count the HSI clock within 512 LSI cycles
- RCC_LSICAL_PERIOD_1024 Count the HSI clock within 1024 LSI cycles
return none
void RCC_EnableLSICalibration(FunctionalState Cmd)Configure whether to start LSI Calibration calculation.
name RCC_EnableLSICalibration.
fun Configure whether to start LSI Calibration calculation.
param Cmd:
- ENABLE
- DISABLE
return none.
uint32_t RCC_GetHSICalibPeriod(void)Gets the HSI(64MHz) captures the number of LSI cycles within the clock calibration period.
name RCC_GetHSICalibPeriod
fun Gets the HSI(64MHz) captures the number of LSI cycles within the clock calibration period.
param none
return HSI captures value.
5.15.3 Demo descriptions
This section describes the 2 RCC examples: LSI_Calibration measures the LSI frequency with HSI and adjusts the trim value by the deviation, and RCC_ClockConfig switches the system clock between HSI, HSI/2 and LSI and reports the result on MCO and the serial port.
5.15.3.1 LSI_Calibration LSI frequency measurement and trim calibration
Example directory: projects/n32g033_EVAL/examples/RCC/LSI_Calibration/
Configure the pin and output LSI on MCO→wait for HSI and LSI to be ready→set the calibration period and start the calibration count→read the count result after calibration→compute the trim from the measured frequency and write it back to the LSI calibration register
| Item | Source analysis |
|---|---|
| Function | First let LSI stabilize and be output on MCO, then use the fixed 64 MHz HSI to count within the calibration period, compute the actual LSI frequency and adjust the trim value. |
| Source files | src/main.c contains main and GPIO_Configuration;inc/main.h gives the peripheral headers and declarations;readme.txt gives the configuration and test steps;project files are in MDK-ARM/ and EWARM/. |
| Key configuration | Clock: HSI 64 MHz, LSI about 32 KHz; calibration period: RCC_LSICAL_PERIOD_128;MCO: PA8 alternate output; trim source: RCC_LSICAL_SRC_TRIM. |
| Program and data path | main -> GPIO_Configuration enables the GPIO clock and sets PA8 alternate -> RCC_ConfigMco selects LSI output -> wait for HSIRDF and LSIRDF -> RCC_ConfigLSICalibPeriod sets the period -> RCC_EnableLSICalibration starts it -> wait for LSICALCF -> compute the frequency with RCC_GetHSICalibPeriod -> compute the trim from the deviation -> RCC_SetLsiCalibValue writes it back. |
| Main APIs | RCC_ConfigMco, RCC_GetFlagStatus, RCC_ConfigLSICalibPeriod, RCC_EnableLSICalibration, RCC_GetHSICalibPeriod, RCC_ConfigLsiCalibSource, RCC_SetLsiCalibValue |
| Verification | After building and downloading, the device calibrates LSI by the measured frequency; capture the MCO waveform on PA8 with an oscilloscope and observe the frequency changing with the trim adjustment. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1;LSICALCF must be set before reading the LSI calibration count result, otherwise the count is incomplete. |
Core-code walkthrough and porting
The example first routes LSI to MCO for observation, then waits for both oscillators to be ready, starts one LSI calibration count and adjusts the trim by the result.
Data path: GPIO_Configuration sets PA8 alternate -> RCC_ConfigMco outputs LSI -> wait for HSIRDF/LSIRDF -> RCC_ConfigLSICalibPeriod -> RCC_EnableLSICalibration -> wait for LSICALCF -> RCC_GetHSICalibPeriod computes the frequency -> RCC_ConfigLsiCalibSource -> RCC_SetLsiCalibValue
1. First route LSI to the MCO pin. Configure PA8 as alternate output, then select LSI as the MCO clock source for oscilloscope observation.
/* MCO Configuration */
GPIO_Configuration();
RCC_ConfigMco(RCC_MCO_LSI);
If only calibration is needed without observation, the MCO output can be omitted; the calibration logic itself does not depend on it.
2. Wait for both oscillators to be ready before counting. Calibration requires HSI and LSI to be stable, so wait for each ready flag in turn.
/* Wait HSI ready */
while (RCC_GetFlagStatus(RCC_CTRL_FLAG_HSIRDF) == RESET)
{}
/* Wait LSI ready */
while (RCC_GetFlagStatus(RCC_CLKINT_FLAG_LSIRDF) == RESET)
{}
Change the HSI/LSI ready flags to the corresponding macros to reuse this for another calibration item; the wait loops should carry no side effects beyond a timeout.
3. Set the calibration period, start it and wait for the done flag. Within one period LSI counts up to the configured number while HSI counts, and LSICALCF is set when done.
RCC_EnableLSICalibration(ENABLE);
/* Wait HSI ready */
while (RCC_GetFlagStatus(RCC_CTRL_FLAG_LSICALCF) == RESET)
{}
The calibration period can be 128, 256, 512 or 1024 LSI cycles; a longer period gives a smoother result but takes longer.
4. Compute the frequency from the count and select the trim source. Multiply 64 MHz by the period count then divide by the HSI count to get the LSI frequency, and switch the trim source to LSITRIM so software can write the value.
Lsi_Cal_Value = ((uint64_t)HSI_VALUE * 128 / RCC_GetHSICalibPeriod());
/* LSI trim value computation */
Lsi_Trim_Value1 = (RCC->LSCTRL & 0x01FF);
RCC_ConfigLsiCalibSource(RCC_LSICAL_SRC_TRIM);
When using another calibration period, the 128 in the formula must match the value of RCC_ConfigLSICalibPeriod.
5. Write the computed trim back to the LSI calibration register. Increase or decrease the trim by the deviation between the measured frequency and 32 KHz, then write it to take effect.
/* LSI trim*/
RCC_SetLsiCalibValue(Lsi_Trim_Value1);
The valid trim range is 0 to 0x1FF, so clamp it during the computation to avoid writing an invalid value.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_rcc.h
5.15.3.2 RCC_ClockConfig system clock switching and output
Example directory: projects/n32g033_EVAL/examples/RCC/RCC_ClockConfig/
Print the post-reset clock information→switch the system clock to HSI or LSI according to a macro→print the current clock frequencies again→configure the pin and output the divided system clock on MCO
| Item | Source analysis |
|---|---|
| Function | Configure the system clock as HSI, HSI/2 or LSI respectively, print the current SYSCLK, HCLK and PCLK, and output the divided system clock on the PA8 MCO. |
| Source files | src/main.c contains PrintfClockInfo, SetSysClockToHSI and SetSysClock_LSI;inc/n32g033_it.h defines the system-clock-source selection macros;readme.txt gives the configuration and test steps;project files are in MDK-ARM/ and EWARM/. |
| Key configuration | Clock-source macro: SYSCLK_SOURCE_SELECT, defaulting to SYSCLK_SOURCE_HSI_DIV2;MCO: PA8 alternate output, prescaler RCC_MCO_CLK_DIV4, source RCC_MCO_SYSCLK;log port: PA9, baud rate 115200. |
| Program and data path | main -> PrintfClockInfo prints the post-reset clock -> according to SYSCLK_SOURCE_SELECT call SetSysClockToHSI or SetSysClock_LSI -> PrintfClockInfo again -> enable the GPIO clock and set PA8 alternate -> RCC_ConfigMcoClkPre sets the prescaler -> RCC_ConfigMco outputs SYSCLK. |
| Main APIs | RCC_GetClocksFreqValue, RCC_EnableHsi, RCC_WaitHsiStable, RCC_ConfigHclk, RCC_ConfigPclk, RCC_ConfigSysclkPres, RCC_ConfigSysclk, RCC_GetSysclkSrc, RCC_ConfigMcoClkPre, RCC_ConfigMco |
| Verification | After building, downloading and resetting, the serial port prints SYSCLK, HCLK and PCLK under HSI, HSI/2 and LSI respectively; check the MCO output frequency on PA8 with an oscilloscope. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1; after switching the system clock to LSI, the serial baud rate must be changed to 1200 for correct printing. |
Core-code walkthrough and porting
The example first prints the post-reset clock, then switches the system clock by a macro and prints again, and finally outputs the divided system clock on MCO.
Data path: PrintfClockInfo reads the clock frequencies and prints them -> SetSysClockToHSI or SetSysClock_LSI switches the system clock -> PrintfClockInfo prints again -> configure PA8 alternate -> RCC_ConfigMcoClkPre -> RCC_ConfigMco outputs SYSCLK
1. Read back and print each clock frequency through the structure. Call this once before and once after switching for comparison; because the core frequency changes, reinitializing logging before printing avoids garbled output.
void PrintfClockInfo(const char* msg)
{
log_init(); // should reinit after sysclk changed
log_info("\n--------------------------------\n");
log_info("%s:\n", msg);
RCC_GetClocksFreqValue(&RCC_ClockFreq);
log_info("SYSCLK: %d\n", RCC_ClockFreq.SysclkFreq);
log_info("HCLK: %d\n", RCC_ClockFreq.HclkFreq);
log_info("PCLK: %d\n", RCC_ClockFreq.PclkFreq);
}
The members of RCC_ClocksType are fixed per driver version; reinitializing the serial port before printing avoids a baud-rate mismatch.
2. Switch the system clock to HSI. First enable HSI and wait for it to stabilize, then configure the Flash wait state and the bus prescalers, and finally select HSI as the system clock and wait for it to take effect.
RCC_EnableHsi(ENABLE);
/* Wait till HSI is ready */
HSIStartUpStatus = RCC_WaitHsiStable();
if (HSIStartUpStatus == SUCCESS)
{
/* Flash 1 wait state */
FLASH_SetLatency(FLASH_LATENCY_1);
/* HCLK = SYSCLK */
RCC_ConfigHclk(RCC_SYSCLK_DIV1);
HSI cannot be turned off while it is used as the system clock; adjust the Flash wait state together before switching to a higher frequency.
3. Switch the system clock to LSI. Once LSI is ready, set the AHB and APB prescalers to no division, select LSI as the system clock and wait for the status bit to switch.
/* Wait till LSI is ready */
if (RCC_GetFlagStatus(RCC_CLKINT_FLAG_LSIRDF) == SET)
{
/* HCLK = SYSCLK */
RCC_ConfigHclk(RCC_SYSCLK_DIV1);
/* PCLK = HCLK */
RCC_ConfigPclk(RCC_HCLK_DIV1);
After LSI becomes the system clock the core frequency is very low, so peripherals that depend on the core frequency such as the serial port and timers must be reconfigured for the new frequency.
4. Configure MCO to output the system clock. Set the MCO prescaler first, then select SYSCLK as the output source.
RCC_ConfigMcoClkPre(RCC_MCO_CLK_DIV4);
/*** Select the corresponding MCO clock source ***/
RCC_ConfigMco(RCC_MCO_SYSCLK);
The MCO output pin must first be configured to the matching alternate function; to use HSI or LSI as the source, just change the selection macro.
Corresponding source files: src/main.c, inc/n32g033_it.h, firmware/n32g033_std_periph_driver/inc/n32g033_rcc.h
5.15.4 Notes and troubleshooting
| Scenario | Check & action | Source |
|---|---|---|
| System clock range | The RCC chapter of the user manual states that the system clock is at most 64 MHz, AHB at most 64 MHz and APB at most 32 MHz; when changing the prescaler make sure the APB frequency does not exceed 32 MHz. |
User manual |
| Clock-source switching order | The RCC chapter of the user manual states that after reset HSI is selected as the system clock and switching is allowed only after the target clock source is ready; switching is controlled by RCC_CFG.SCLKSW and reflected by SCLKSTS. |
User manual |
| HSI turn-off condition | The RCC chapter of the user manual states that HSI cannot be turned off while it is the system clock directly or through the PLL; only after switching to LSI and completing the switch may HSI be disabled to save power. |
User manual |
| LSI calibration count | The RCC chapter of the user manual states that the calibration counts HSI cycles within the LSI period set by LSICALLEN and sets LSICALCF when done;the formula is LSI frequency = 64000000 x N / RCC_LSICAL. |
User manual |
| MCO output configuration | The RCC chapter of the user manual states that the GPIO of the MCO pin must be configured as an alternate function and the output source is selected by RCC_CFG.MCO[1:0];it can output a divided SYSCLK, a divided HSI or LSI. |
User manual |
| Glitch detection timing | The RCC chapter of the user manual states that after enabling GVDET a delay of 10 µs or more is required before enabling GVRST and GVSW; if the timing is not met the detection and protection may not take effect. |
User manual |
| STOP clock source for TIM6/UART3 | The RCC chapter of the user manual states that if TIM6 and UART3 are to work in STOP mode their clock source must be configured as LSI; otherwise these two peripherals stop in STOP mode. |
User manual |
| Reset source identification | The RCC chapter of the user manual states that the reset source can be identified from the reset flags of RCC_CTRLSTS and writing 1 to RMRSTF clears these flags;before reading the flags decide whether the previous reset-source information must be preserved. |
User manual |
Errata sheet V1.0.0 (2025.9.25) covers revision A silicon and lists no RCC entries.