AI FAE Platform5.18 TIM Guide
This chapter describes the file layout, the 146 public functions, and the 19 examples (6Steps, ComplementarySignals, DMA, DMABurst, ExtTrigger_Synchro, InputCapture, OCActive, OCInactive, OCToggle, OnePulse, PWM_Input, PWM_Output, TimeBase, TimeBasic_TIM1, TimeBasic_TIM3, TimeBasic_TIM4, TimeBasic_TIM6, TimeBasic6_wakeup, and TIMx_Synchro) of the TIM driver in the N32G033 standard peripheral library. Read the “TIM1”, “TIM3”, “TIM4”, and “TIM6” chapters of the user manual for the time base and counter modes, input capture and output compare, break and dead time, and the encoder interface with master/slave synchronization, and the errata sheet for known chip issues.
5.18.1 Related files
| Relative path | Purpose |
|---|---|
firmware/n32g033_std_periph_driver/inc/n32g033_tim.h |
Defines the time base, output compare, input capture, break and dead time, and input filter structures, the macros for counter modes, polarity, interrupts, and flags, and declares the 146 public functions |
firmware/n32g033_std_periph_driver/src/n32g033_tim.c |
Implements those 146 functions: TIMx reset, time base and channel initialization, clock and encoder interface, output compare and polarity, break and dead time, trigger and slave mode, register write and readout, flag and interrupt handling, asymmetric mode and input filtering, and encoder data readout |
projects/n32g033_EVAL/examples/TIM/ |
TIM example root directory, with 19 examples: 6Steps, ComplementarySignals, DMA, DMABurst, ExtTrigger_Synchro, InputCapture, OCActive, OCInactive, OCToggle, OnePulse, PWM_Input, PWM_Output, TimeBase, TimeBasic_TIM1, TimeBasic_TIM3, TimeBasic_TIM4, TimeBasic_TIM6, TimeBasic6_wakeup, and TIMx_Synchro |
projects/n32g033_EVAL/examples/TIM/PWM_Output/ |
Project layout of this example: MDK-ARM/, EWARM/, inc/, src/, and readme.txt |
projects/n32g033_EVAL/bsp/ |
Board support file shared by the examples: the SysTick millisecond delay interface in delay.h (used by TimeBasic6_wakeup) |
5.18.2 API reference
The following 146 public functions are listed in the declaration order of n32g033_tim.h in 12 groups; each entry gives a summary and the original comment above the function in n32g033_tim.c.
Reset, time base, and channel initialization
TIM_DeInit, TIM_InitTimeBase, TIM_InitOc1, TIM_InitOc2, TIM_InitOc3, TIM_InitOc4, TIM_InitOc5, TIM_InitOc6, TIM_InitOc7, TIM_ICInit, TIM_ConfigPwmIc, TIM_ConfigBkdt, TIM_BreakFiltConfig, TIM_BreakFiltEnable, TIM_BreakInputSourceEnable
Structure default filling
TIM_InitTimBaseStruct, TIM_InitOcStruct, TIM_InitIcStruct, TIM_InitBkdtStruct
Enable, interrupt, event, and DMA
TIM_Enable, TIM_EnableCtrlPwmOutputs, TIM_ConfigInt, TIM_GenerateEvent, TIM_ConfigDma, TIM_EnableDma
Clock, counter mode, and encoder interface
TIM_ConfigInternalClk, TIM_ConfigInternalTrigToExt, TIM_ConfigExtTrigAsClk, TIM_ConfigExtClkMode1, TIM_ConfigExtClkMode2, TIM_ConfigPrescaler, TIM_ConfigCntMode, TIM_ConfigEncoderInterface, TIM_ConfigEncoderInterface2
Forced output compare, preload, and OCREF control
TIM_ConfigForcedOc1, TIM_ConfigForcedOc2, TIM_ConfigForcedOc3, TIM_ConfigForcedOc4, TIM_ConfigForcedOc5, TIM_ConfigForcedOc6, TIM_ConfigForcedOc7, TIM_ConfigArPreload, TIM_SelectComEvt, TIM_SelectCapCmpDmaSrc, TIM_EnableCapCmpPreloadControl, TIM_ConfigOc1Preload, TIM_ConfigOc2Preload, TIM_ConfigOc3Preload, TIM_ConfigOc4Preload, TIM_ConfigOc5Preload, TIM_ConfigOc6Preload, TIM_ConfigOc7Preload
Output-compare fast feature and OCREF clear
TIM_ConfigOc1Fast, TIM_ConfigOc2Fast, TIM_ConfigOc3Fast, TIM_ConfigOc4Fast, TIM_ConfigOc5Fast, TIM_ConfigOc6Fast, TIM_ConfigOc7Fast, TIM_ClrOc1Ref, TIM_ClrOc2Ref, TIM_ClrOc3Ref, TIM_ClrOc4Ref, TIM_ClrOc5Ref, TIM_ClrOc6Ref, TIM_ClrOc7Ref, TIM_ClrOcRefInputSource
Polarity, capture/compare enable, and output compare mode
TIM_ConfigOc1Polarity, TIM_ConfigOc1NPolarity, TIM_ConfigOc2Polarity, TIM_ConfigOc2NPolarity, TIM_ConfigOc3Polarity, TIM_ConfigOc3NPolarity, TIM_ConfigOc4Polarity, TIM_ConfigOc4NPolarity, TIM_ConfigOc5Polarity, TIM_ConfigOc6Polarity, TIM_ConfigOc7Polarity, TIM_EnableCapCmpCh, TIM_EnableCapCmpChN, TIM_SelectOcMode
Update event, slave mode, and one-pulse
TIM_EnableUpdateEvt, TIM_ConfigUpdateEvt, TIM_ConfigUpdateRequestIntSrc, TIM_SelectHallSensor, TIM_SelectOnePulseMode, TIM_SelectOutputTrig, TIM_SelectSlaveMode, TIM_SelectMasterSlaveMode
Register write and input trigger
TIM_SetCnt, TIM_SetAutoReload, TIM_SetCmp1, TIM_SetCmp2, TIM_SetCmp3, TIM_SetCmp4, TIM_SetCmp5, TIM_SetCmp6, TIM_SetCmp7, TIM_SetCmp1D, TIM_SetCmp2D, TIM_SetCmp3D, TIM_SetCmp4D, ConfigTI1, ConfigTI2, ConfigTI3, ConfigTI4, TIM_SetInCap1Prescaler, TIM_SetInCap2Prescaler, TIM_SetInCap3Prescaler, TIM_SetInCap4Prescaler, TIM_SelectInputTrig, TIM_ConfigExtTrig, TIM_SetClkDiv
Capture, counter, and status readout
TIM_GetCap1, TIM_GetCap2, TIM_GetCap3, TIM_GetCap4, TIM_GetCap5, TIM_GetCap6, TIM_GetCap7, TIM_GetCap1D, TIM_GetCap2D, TIM_GetCap3D, TIM_GetCap4D, TIM_GetCnt, TIM_GetPrescaler, TIM_GetAutoReload, TIM_GetCCENStatus, TIM_GetFlagStatus, TIM_ClearFlag, TIM_GetIntStatus, TIM_ClrIntPendingBit
Asymmetric mode and input filter
TIM_AsymmetricEnable, TIM_IC1FiltConfig, TIM_IC2FiltConfig, TIM_IC3FiltConfig, TIM_IC1FiltEnable, TIM_IC2FiltEnable, TIM_IC3FiltEnable, TIM_GetFiltStatus
ENCLVR load and encoder data
TIM_TrgiLoadLvrToCNTEnable, TIM_GetLVR, TIM_CH3LoadLvrToCNTEnable, TIM_CH3LoadLvrToCNTPolarity, TIM_GetENCDAT, TIM_GetENCDATSign
void TIM_DeInit(TIM_Module* TIMx)Deinitializes the TIMx registers.
name TIM_DeInit
fun Deinitializes the TIMx registers.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
return none
void TIM_InitTimeBase(TIM_Module* TIMx, TIM_TimeBaseInitType* TIM_TimeBaseInitStruct)Initializes the TIMx time base unit.
name TIM_InitTimeBase
fun Initializes the TIMx time base unit.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_TimeBaseInitStruct: refer to the definition of TIM_TimeBaseInitType
- Prescaler
* 0x0000 ~ 0xFFFF
- CounterMode
* TIM_CNT_MODE_UP
* TIM_CNT_MODE_DOWN
* TIM_CNT_MODE_CENTER_ALIGN1
* TIM_CNT_MODE_CENTER_ALIGN2
* TIM_CNT_MODE_CENTER_ALIGN3
- Period
* 0x00000000 ~ 0xFFFFFFFF
- ClkDiv
* 0x00~ 0x1F
- RepetCnt
* 0x00 ~ 0xFF
- CapCh1Sel
* TIM_CAPCH1SEL_IOM
* TIM_CAPCH1SEL_COMP
- EtrOrClr
* TIM_ETRSEL
* TIM_COMPSEL
return none
void TIM_InitOc1(TIM_Module* TIMx, OCInitType* TIM_OCInitStruct)Initializes the TIMx Channel 1.
name TIM_InitOc1
fun Initializes the TIMx Channel 1.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCInitStruct: refer to the definition of OCInitType
- OCMode
* TIM_OCMODE_TIMING
* TIM_OCMODE_ACTIVE
* TIM_OCMODE_INACTIVE
* TIM_OCMODE_TOGGLE
* TIM_FORCED_ACTION_INACTIVE
* TIM_FORCED_ACTION_ACTIVE
* TIM_OCMODE_PWM1
* TIM_OCMODE_PWM2
- OutputState
* TIM_OUTPUT_STATE_DISABLE
* TIM_OUTPUT_STATE_ENABLE
- OutputNState
* TIM_OUTPUT_NSTATE_DISABLE
* TIM_OUTPUT_NSTATE_ENABLE
- Pulse
* 0x00000000 ~ 0xFFFFFFFF
- OCPolarity
* TIM_OC_POLARITY_HIGH
* TIM_OC_POLARITY_LOW
- OCNPolarity
* TIM_OCN_POLARITY_HIGH
* TIM_OCN_POLARITY_LOW
- OCIdleState
* TIM_OC_IDLE_STATE_SET
* TIM_OC_IDLE_STATE_RESET
- OCNIdleState
* TIM_OCN_IDLE_STATE_SET
* TIM_OCN_IDLE_STATE_RESET
return none
void TIM_InitOc2(TIM_Module* TIMx, OCInitType* TIM_OCInitStruct)Initializes the TIMx Channel 2.
name TIM_InitOc2
fun Initializes the TIMx Channel 2.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCInitStruct: refer to the definition of OCInitType
- OCMode
* TIM_OCMODE_TIMING
* TIM_OCMODE_ACTIVE
* TIM_OCMODE_INACTIVE
* TIM_OCMODE_TOGGLE
* TIM_FORCED_ACTION_INACTIVE
* TIM_FORCED_ACTION_ACTIVE
* TIM_OCMODE_PWM1
* TIM_OCMODE_PWM2
- OutputState
* TIM_OUTPUT_STATE_DISABLE
* TIM_OUTPUT_STATE_ENABLE
- OutputNState
* TIM_OUTPUT_NSTATE_DISABLE
* TIM_OUTPUT_NSTATE_ENABLE
- Pulse
* 0x00000000 ~ 0xFFFFFFFF
- OCPolarity
* TIM_OC_POLARITY_HIGH
* TIM_OC_POLARITY_LOW
- OCNPolarity
* TIM_OCN_POLARITY_HIGH
* TIM_OCN_POLARITY_LOW
- OCIdleState
* TIM_OC_IDLE_STATE_SET
* TIM_OC_IDLE_STATE_RESET
- OCNIdleState
* TIM_OCN_IDLE_STATE_SET
* TIM_OCN_IDLE_STATE_RESET
return none
void TIM_InitOc3(TIM_Module* TIMx, OCInitType* TIM_OCInitStruct)Initializes the TIMx Channel 3.
name TIM_InitOc3
fun Initializes the TIMx Channel 3.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCInitStruct: refer to the definition of OCInitType
- OCMode
* TIM_OCMODE_TIMING
* TIM_OCMODE_ACTIVE
* TIM_OCMODE_INACTIVE
* TIM_OCMODE_TOGGLE
* TIM_FORCED_ACTION_INACTIVE
* TIM_FORCED_ACTION_ACTIVE
* TIM_OCMODE_PWM1
* TIM_OCMODE_PWM2
- OutputState
* TIM_OUTPUT_STATE_DISABLE
* TIM_OUTPUT_STATE_ENABLE
- OutputNState
* TIM_OUTPUT_NSTATE_DISABLE
* TIM_OUTPUT_NSTATE_ENABLE
- Pulse
* 0x00000000 ~ 0xFFFFFFFF
- OCPolarity
* TIM_OC_POLARITY_HIGH
* TIM_OC_POLARITY_LOW
- OCNPolarity
* TIM_OCN_POLARITY_HIGH
* TIM_OCN_POLARITY_LOW
- OCIdleState
* TIM_OC_IDLE_STATE_SET
* TIM_OC_IDLE_STATE_RESET
- OCNIdleState
* TIM_OCN_IDLE_STATE_SET
* TIM_OCN_IDLE_STATE_RESET
return none
void TIM_InitOc4(TIM_Module* TIMx, OCInitType* TIM_OCInitStruct)Initializes the TIMx Channel 4.
name TIM_InitOc4
fun Initializes the TIMx Channel 4.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param TIM_OCInitStruct: refer to the definition of OCInitType
- OCMode
* TIM_OCMODE_TIMING
* TIM_OCMODE_ACTIVE
* TIM_OCMODE_INACTIVE
* TIM_OCMODE_TOGGLE
* TIM_FORCED_ACTION_INACTIVE
* TIM_FORCED_ACTION_ACTIVE
* TIM_OCMODE_PWM1
* TIM_OCMODE_PWM2
- OutputState
* TIM_OUTPUT_STATE_DISABLE
* TIM_OUTPUT_STATE_ENABLE
- OutputNState
* TIM_OUTPUT_NSTATE_DISABLE
* TIM_OUTPUT_NSTATE_ENABLE
- Pulse
* 0x00000000 ~ 0xFFFFFFFF
- OCPolarity
* TIM_OC_POLARITY_HIGH
* TIM_OC_POLARITY_LOW
- OCNPolarity
* TIM_OCN_POLARITY_HIGH
* TIM_OCN_POLARITY_LOW
- OCIdleState
* TIM_OC_IDLE_STATE_SET
* TIM_OC_IDLE_STATE_RESET
- OCNIdleState
* TIM_OCN_IDLE_STATE_SET
* TIM_OCN_IDLE_STATE_RESET
return none
void TIM_InitOc5(TIM_Module* TIMx, OCInitType* TIM_OCInitStruct)Initializes the TIMx Channel 5.
name TIM_InitOc5
fun Initializes the TIMx Channel 5.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCInitStruct: refer to the definition of OCInitType
- OCMode
* TIM_OCMODE_TIMING
* TIM_OCMODE_ACTIVE
* TIM_OCMODE_INACTIVE
* TIM_OCMODE_TOGGLE
* TIM_FORCED_ACTION_INACTIVE
* TIM_FORCED_ACTION_ACTIVE
* TIM_OCMODE_PWM1
* TIM_OCMODE_PWM2
- OutputState
* TIM_OUTPUT_STATE_DISABLE
* TIM_OUTPUT_STATE_ENABLE
- Pulse
* 0x00000000 ~ 0xFFFFFFFF
- OCPolarity
* TIM_OC_POLARITY_HIGH
* TIM_OC_POLARITY_LOW
return none
void TIM_InitOc6(TIM_Module* TIMx, OCInitType* TIM_OCInitStruct)Initializes the TIMx Channel 6.
name TIM_InitOc6
fun Initializes the TIMx Channel 6.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCInitStruct: refer to the definition of OCInitType
- OCMode
* TIM_OCMODE_TIMING
* TIM_OCMODE_ACTIVE
* TIM_OCMODE_INACTIVE
* TIM_OCMODE_TOGGLE
* TIM_FORCED_ACTION_INACTIVE
* TIM_FORCED_ACTION_ACTIVE
* TIM_OCMODE_PWM1
* TIM_OCMODE_PWM2
- OutputState
* TIM_OUTPUT_STATE_DISABLE
* TIM_OUTPUT_STATE_ENABLE
- Pulse
* 0x0000 ~ 0xFFFF
- OCPolarity
* TIM_OC_POLARITY_HIGH
* TIM_OC_POLARITY_LOW
return none
void TIM_InitOc7(TIM_Module* TIMx, OCInitType* TIM_OCInitStruct)Initializes the TIMx Channel 7.
name TIM_InitOc7
fun Initializes the TIMx Channel 7.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCInitStruct: refer to the definition of OCInitType
- OCMode
* TIM_OCMODE_TIMING
* TIM_OCMODE_ACTIVE
* TIM_OCMODE_INACTIVE
* TIM_OCMODE_TOGGLE
* TIM_FORCED_ACTION_INACTIVE
* TIM_FORCED_ACTION_ACTIVE
* TIM_OCMODE_PWM1
* TIM_OCMODE_PWM2
- OutputState
* TIM_OUTPUT_STATE_DISABLE
* TIM_OUTPUT_STATE_ENABLE
- Pulse
* 0x0000 ~ 0xFFFF
- OCPolarity
* TIM_OC_POLARITY_HIGH
* TIM_OC_POLARITY_LOW
return none
void TIM_ICInit(TIM_Module* TIMx, TIM_ICInitType* TIM_ICInitStruct)Initializes the TIM peripheral according to the specified parameters in the TIM_ICInitStruct.
name TIM_ICInit
fun Initializes the TIM peripheral according to the specified
parameters in the TIM_ICInitStruct.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_ICInitStruct: refer to the definition of TIM_ICInitType
- Channel
* TIM_CH_1
* TIM_CH_2
* TIM_CH_3
* TIM_CH_4
- ICPolarity
* TIM_IC_POLARITY_RISING
* TIM_IC_POLARITY_FALLING
- ICSelection
* TIM_IC_SELECTION_DIRECTTI
* TIM_IC_SELECTION_INDIRECTTI
* TIM_IC_SELECTION_TRC
- ICPrescaler
* TIM_IC_PSC_DIV1
* TIM_IC_PSC_DIV2
* TIM_IC_PSC_DIV4
* TIM_IC_PSC_DIV8
- ICFilter
* ICFilter can be a number between 0x0 and 0xF
return none
void TIM_ConfigPwmIc(TIM_Module* TIMx, TIM_ICInitType* TIM_ICInitStruct)Configures the TIM peripheral according to the specified parameters in the TIM_ICInitStruct to measure an external PWM signal.
name TIM_ConfigPwmIc
fun Configures the TIM peripheral according to the specified
parameters in the TIM_ICInitStruct to measure an external PWM signal.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_ICInitStruct: refer to the definition of TIM_ICInitType
- Channel
* TIM_CH_1
* TIM_CH_2
- ICPolarity
* TIM_IC_POLARITY_RISING
* TIM_IC_POLARITY_FALLING
- ICSelection
* TIM_IC_SELECTION_DIRECTTI
* TIM_IC_SELECTION_INDIRECTTI
- ICPrescaler
* TIM_IC_PSC_DIV1
* TIM_IC_PSC_DIV2
* TIM_IC_PSC_DIV4
* TIM_IC_PSC_DIV8
- ICFilter
* ICFilter can be a number between 0x0 and 0xF
return none
void TIM_ConfigBkdt(TIM_Module* TIMx, TIM_BDTRInitType* TIM_BDTRInitStruct)Configures the: Break feature, dead time, Lock level, the OSSI, the OSSR State and the AOE(automatic output enable).
name TIM_ConfigBkdt
fun Configures the: Break feature, dead time, Lock level, the OSSI,
the OSSR State and the AOE(automatic output enable).
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param TIM_BDTRInitStruct: refer to the definition of TIM_BDTRInitType
- OSSRState
* TIM_OSSR_STATE_ENABLE
* TIM_OSSR_STATE_DISABLE
- OSSIState
* TIM_OSSI_STATE_ENABLE
* TIM_OSSI_STATE_DISABLE
- LOCKLevel
* TIM_LOCK_LEVEL_OFF
* TIM_LOCK_LEVEL_1
* TIM_LOCK_LEVEL_2
* TIM_LOCK_LEVEL_3
- DeadTime
* DeadTime can be a number between 0x00 and 0xFF
- Break
* TIM_BREAK_IN_ENABLE
* TIM_BREAK_IN_DISABLE
- BreakPolarity
* TIM_BREAK_POLARITY_LOW
* TIM_BREAK_POLARITY_HIGH
- AutomaticOutput
* TIM_AUTO_OUTPUT_ENABLE
* TIM_AUTO_OUTPUT_DISABLE
return none
void TIM_BreakFiltConfig(TIM_Module* TIMx, TIM_FiltInitType* TIM_FiltInitStruct)Config the filter of break input.
name TIM_BreakFiltConfig
fun Config the filter of break input.
param TIMx:
- TIM1
- TIM3
param TIM_FiltInitStruct:
- refer to the definition of TIM_FiltInitType
return none
void TIM_BreakFiltEnable(TIM_Module* TIMx,FunctionalState Cmd)Enable or disable the filter of break input.
name TIM_BreakFiltEnable
fun Enable or disable the filter of break input.
param TIMx:
- TIM1
- TIM3
param Cmd :
- ENABLE
- DISABLE
return none
void TIM_BreakInputSourceEnable(TIM_Module* TIMx, uint32_t Source, uint32_t Polarity, FunctionalState Cmd)Enable or disable the break input source , and set the polarity of the break input source.
name TIM_BreakInputSourceEnable
fun Enable or disable the break input source , and set the polarity of the break input source.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param Source
- TIM_BREAK_LOCKUP
- TIM_BREAK_PVD
- TIM_BREAK_IOM1
- TIM_BREAK_IOM2
- TIM_BREAK_IOM3
- TIM_BREAK_IOM4
- TIM_BREAK_COMP1
param Polarity
- TIM_BREAK_IOM_COMP_POLARITY_INVERT
- TIM_BREAK_IOM_COMP_POLARITY_NONINVERT
param Cmd
- ENABLE
- DISABLE
return none
note Only a system reset can reset TIM_BREAK_LOCKUP/TIM_BREAK_PVD after they are enabled.
void TIM_InitTimBaseStruct(TIM_TimeBaseInitType* TIM_TimeBaseInitStruct)Fills each TIM_TimeBaseInitStruct member with its default value.
name TIM_InitTimBaseStruct
fun Fills each TIM_TimeBaseInitStruct member with its default value.
param TIM_TimeBaseInitStruct: refer to the definition of TIM_TimeBaseInitType
- Prescaler
* 0x0000 ~ 0xFFFF
- CounterMode
* TIM_CNT_MODE_UP
* TIM_CNT_MODE_DOWN
* TIM_CNT_MODE_CENTER_ALIGN1
* TIM_CNT_MODE_CENTER_ALIGN2
* TIM_CNT_MODE_CENTER_ALIGN3
- Period
* 0x00000000 ~ 0xFFFFFFFF
- ClkDiv
* 0x00~ 0x1F
- RepetCnt
* 0x00 ~ 0xFF
- CapCh1Sel
* TIM_CAPCH1SEL_IOM
* TIM_CAPCH1SEL_COMP
- ClrSel
* TIM_ETRSEL
* TIM_COMPSEL
return none
void TIM_InitOcStruct(OCInitType* TIM_OCInitStruct)Fills each TIM_OCInitStruct member with its default value.
name TIM_InitOcStruct
fun Fills each TIM_OCInitStruct member with its default value.
param TIM_OCInitStruct: refer to the definition of OCInitType
- OCMode
* TIM_OCMODE_TIMING
* TIM_OCMODE_ACTIVE
* TIM_OCMODE_INACTIVE
* TIM_OCMODE_TOGGLE
* TIM_FORCED_ACTION_INACTIVE
* TIM_FORCED_ACTION_ACTIVE
* TIM_OCMODE_PWM1
* TIM_OCMODE_PWM2
- OutputState
* TIM_OUTPUT_STATE_DISABLE
* TIM_OUTPUT_STATE_ENABLE
- OutputNState
* TIM_OUTPUT_NSTATE_DISABLE
* TIM_OUTPUT_NSTATE_ENABLE
- Pulse
* 0x00000000 ~ 0xFFFFFFFF
- OCPolarity
* TIM_OC_POLARITY_HIGH
* TIM_OC_POLARITY_LOW
- OCNPolarity
* TIM_OCN_POLARITY_HIGH
* TIM_OCN_POLARITY_LOW
- OCIdleState
* TIM_OC_IDLE_STATE_SET
* TIM_OC_IDLE_STATE_RESET
- OCNIdleState
* TIM_OCN_IDLE_STATE_SET
* TIM_OCN_IDLE_STATE_RESET
return none
void TIM_InitIcStruct(TIM_ICInitType* TIM_ICInitStruct)Fills each TIM_ICInitStruct member with its default value.
name TIM_InitIcStruct
fun Fills each TIM_ICInitStruct member with its default value.
param TIM_ICInitStruct: refer to the definition of TIM_ICInitType
- Channel
* TIM_CH_1
* TIM_CH_2
* TIM_CH_3
* TIM_CH_4
- ICPolarity
* TIM_IC_POLARITY_RISING
* TIM_IC_POLARITY_FALLING
- ICSelection
* TIM_IC_SELECTION_DIRECTTI
* TIM_IC_SELECTION_INDIRECTTI
* TIM_IC_SELECTION_TRC
- ICPrescaler
* TIM_IC_PSC_DIV1
* TIM_IC_PSC_DIV2
* TIM_IC_PSC_DIV4
* TIM_IC_PSC_DIV8
- ICFilter
* ICFilter can be a number between 0x0 and 0xF
return none
void TIM_InitBkdtStruct(TIM_BDTRInitType* TIM_BDTRInitStruct)Fills each TIM_BDTRInitStruct member with its default value.
name TIM_InitBkdtStruct
fun Fills each TIM_BDTRInitStruct member with its default value.
param TIM_BDTRInitStruct: refer to the definition of TIM_BDTRInitType
- OSSRState
* TIM_OSSR_STATE_ENABLE
* TIM_OSSR_STATE_DISABLE
- OSSIState
* TIM_OSSI_STATE_ENABLE
* TIM_OSSI_STATE_DISABLE
- LOCKLevel
* TIM_LOCK_LEVEL_OFF
* TIM_LOCK_LEVEL_1
* TIM_LOCK_LEVEL_2
* TIM_LOCK_LEVEL_3
- DeadTime
* DeadTime can be a number between 0x00 and 0xFF
- Break
* TIM_BREAK_IN_ENABLE
* TIM_BREAK_IN_DISABLE
- BreakPolarity
* TIM_BREAK_POLARITY_LOW
* TIM_BREAK_POLARITY_HIGH
- AutomaticOutput
* TIM_AUTO_OUTPUT_ENABLE
* TIM_AUTO_OUTPUT_DISABLE
return none
void TIM_Enable(TIM_Module* TIMx, FunctionalState Cmd)Enables or disables the specified TIM peripheral.
name TIM_Enable
fun Enables or disables the specified TIM peripheral.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param Cmd :
- ENABLE
- DISABLE
return none
void TIM_EnableCtrlPwmOutputs(TIM_Module* TIMx, FunctionalState Cmd)Enables or disables the TIM peripheral Main Outputs.
name TIM_EnableCtrlPwmOutputs
fun Enables or disables the TIM peripheral Main Outputs.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param Cmd :
- ENABLE
- DISABLE
return none
void TIM_ConfigInt(TIM_Module* TIMx, uint32_t TIM_IT, FunctionalState Cmd)Enables or disables the specified TIM interrupts.
name TIM_ConfigInt
fun Enables or disables the specified TIM interrupts.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_IT:
- TIM_INT_CC1
- TIM_INT_CC2
- TIM_INT_CC3
- TIM_INT_CC4
- TIM_INT_CC5
- TIM_INT_CC6
- TIM_INT_CC7
- TIM_INT_C3LDCNT
- TIM_INT_UPDATE
- TIM_INT_TRIG
- TIM_INT_BREAK
- TIM_INT_COM
param Cmd :
- ENABLE
- DISABLE
return none
void TIM_GenerateEvent(TIM_Module* TIMx, uint32_t TIM_EventSource)Configures the TIMx event to be generate by software.
name TIM_GenerateEvent
fun Configures the TIMx event to be generate by software.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_EventSource:
- TIM_EVT_SRC_CC1
- TIM_EVT_SRC_CC2
- TIM_EVT_SRC_CC3
- TIM_EVT_SRC_CC4
- TIM_EVT_SRC_UPDATE
- TIM_EVT_SRC_COM
- TIM_EVT_SRC_TRIG
- TIM_EVT_SRC_BREAK
return none
void TIM_ConfigDma(TIM_Module* TIMx, uint32_t TIM_DMABase, uint32_t TIM_DMABurstLength)Configures the TIMx’s DMA interface.
name TIM_ConfigDma
fun Configures the TIMx's DMA interface.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_DMABase:
- TIM_DMABASE_CTRL1
- TIM_DMABASE_CTRL2
- TIM_DMABASE_STS
- TIM_DMABASE_EVTGEN
- TIM_DMABASE_SMCTRL
- TIM_DMABASE_DMAINTEN
- TIM_DMABASE_CAPCMPMOD1
- TIM_DMABASE_CAPCMPMOD2
- TIM_DMABASE_CAPCMPMOD3
- TIM_DMABASE_CAPCMPEN
- TIM_DMABASE_CAPCMPDAT1
- TIM_DMABASE_CAPCMPDAT2
- TIM_DMABASE_CAPCMPDAT3
- TIM_DMABASE_CAPCMPDAT4
- TIM_DMABASE_CAPCMPDAT5
- TIM_DMABASE_CAPCMPDAT6
- TIM_DMABASE_PSC
- TIM_DMABASE_AR
- TIM_DMABASE_CNT
- TIM_DMABASE_REPCNT
- TIM_DMABASE_BKDT
- TIM_DMABASE_CAPCMPDAT7
- TIM_DMABASE_BKFR
- TIM_DMABASE_C1FILT
- TIM_DMABASE_C2FILT
- TIM_DMABASE_C3FILT
- TIM_DMABASE_FILTO
- TIM_DMABASE_AF1
- TIM_DMABASE_ENCDAT
- TIM_DMABASE_ENCMCTRL
- TIM_DMABASE_ENCLVR
param TIM_DMABurstLength:
- This parameter can be one value between:
TIM_DMABURST_LENGTH_1TRANSFER and TIM_DMABURST_LENGTH_37TRANSFERS.
return none
void TIM_EnableDma(TIM_Module* TIMx, uint32_t TIM_DMASource, FunctionalState Cmd)Enables or disables the TIMx’s DMA Requests.
name TIM_EnableDma
fun Enables or disables the TIMx's DMA Requests.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_DMASource:
- TIM_DMA_CC1
- TIM_DMA_CC2
- TIM_DMA_CC3
- TIM_DMA_CC4
- TIM_DMA_UPDATE
- TIM_DMA_COM
- TIM_DMA_TRIG
param Cmd:
- DISABLE
- ENABLE
return none
void TIM_ConfigInternalClk(TIM_Module* TIMx)Configures the TIMx internal Clock
name TIM_ConfigInternalClk
fun Configures the TIMx internal Clock
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
return none
void TIM_ConfigInternalTrigToExt(TIM_Module* TIMx, uint32_t TIM_InputTriggerSource)Configures the TIMx Internal Trigger as External Clock
name TIM_ConfigInternalTrigToExt
fun Configures the TIMx Internal Trigger as External Clock
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_InputTriggerSource:
- TIM_TRIG_SEL_IN_TR0
- TIM_TRIG_SEL_IN_TR1
- TIM_TRIG_SEL_IN_TR2
- TIM_TRIG_SEL_IN_TR3
return none
void TIM_ConfigExtTrigAsClk(TIM_Module* TIMx, uint32_t TIM_TIxExternalCLKSource, uint32_t IcPolarity, uint32_t ICFilter)Configures the TIMx Trigger as External Clock
name TIM_ConfigExtTrigAsClk
fun Configures the TIMx Trigger as External Clock
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_TIxExternalCLKSource:
- TIM_TRIG_SEL_TI1F_ED
- TIM_TRIG_SEL_TI1FP1
- TIM_TRIG_SEL_TI2FP2
param ICPolarity
- TIM_IC_POLARITY_RISING
- TIM_IC_POLARITY_FALLING
param ICFilter
- ICFilter can be a number between 0x0 and 0xF
return none
void TIM_ConfigExtClkMode1(TIM_Module* TIMx,uint32_t TIM_ExtTRGPrescaler,uint32_t TIM_ExtTRGPolarity,uint32_t ExtTRGFilter)Configures the External clock Mode1
name TIM_ConfigExtClkMode1
fun Configures the External clock Mode1
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_ExtTRGPrescaler:
- TIM_EXT_TRG_PSC_OFF
- TIM_EXT_TRG_PSC_DIV2
- TIM_EXT_TRG_PSC_DIV4
- TIM_EXT_TRG_PSC_DIV8
param TIM_ExtTRGPolarity
- TIM_EXT_TRIG_POLARITY_INVERTED
- TIM_EXT_TRIG_POLARITY_NONINVERTED
param ExtTRGFilter
- ExtTRGFilter can be a number between 0x0 and 0xF
return none
void TIM_ConfigExtClkMode2(TIM_Module* TIMx,uint32_t TIM_ExtTRGPrescaler,uint32_t TIM_ExtTRGPolarity,uint32_t ExtTRGFilter)Configures the External clock Mode2
name TIM_ConfigExtClkMode2
fun Configures the External clock Mode2
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_ExtTRGPrescaler:
- TIM_EXT_TRG_PSC_OFF
- TIM_EXT_TRG_PSC_DIV2
- TIM_EXT_TRG_PSC_DIV4
- TIM_EXT_TRG_PSC_DIV8
param TIM_ExtTRGPolarity
- TIM_EXT_TRIG_POLARITY_INVERTED
- TIM_EXT_TRIG_POLARITY_NONINVERTED
param ExtTRGFilter
- ExtTRGFilter can be a number between 0x0 and 0xF
return none
void TIM_ConfigPrescaler(TIM_Module* TIMx, uint32_t Prescaler, uint32_t TIM_PSCReloadMode)Configures the TIMx Prescaler.
name TIM_ConfigPrescaler
fun Configures the TIMx Prescaler.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param Prescaler:
- 0x0000 ~ 0xFFFF
param TIM_PSCReloadMode
- TIM_PSC_RELOAD_MODE_UPDATE
- TIM_PSC_RELOAD_MODE_IMMEDIATE
return none
void TIM_ConfigCntMode(TIM_Module* TIMx, uint32_t CntMode)Specifies the TIMx Counter Mode to be used.
name TIM_ConfigCntMode
fun Specifies the TIMx Counter Mode to be used.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param CntMode
- TIM_CNT_MODE_UP
- TIM_CNT_MODE_DOWN
- TIM_CNT_MODE_CENTER_ALIGN1
- TIM_CNT_MODE_CENTER_ALIGN2
- TIM_CNT_MODE_CENTER_ALIGN3
return none
void TIM_ConfigEncoderInterface(TIM_Module* TIMx,uint32_t TIM_EncoderMode,uint32_t TIM_IC1Polarity,uint32_t TIM_IC2Polarity)Configures the TIMx Encoder Interface.
name TIM_ConfigEncoderInterface
fun Configures the TIMx Encoder Interface.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param TIM_EncoderMode
- TIM_ENCODE_QUA_MODE_TI1
- TIM_ENCODE_QUA_MODE_TI2
- TIM_ENCODE_QUA_MODE_TI12
param TIM_IC1Polarity
- TIM_IC_POLARITY_FALLING
- TIM_IC_POLARITY_RISING
param TIM_IC2Polarity
- TIM_IC_POLARITY_FALLING
- TIM_IC_POLARITY_RISING
return none
void TIM_ConfigEncoderInterface2(TIM_Module* TIMx,uint32_t TIM_EncoderMode,uint32_t TIM_IC1Polarity,uint32_t TIM_IC2Polarity)Configures the TIMx Encoder Interface.
name TIM_ConfigEncoderInterface2
fun Configures the TIMx Encoder Interface.
param TIMx (The input parameters must be the following values):
- TIM4
param TIM_EncoderMode
- TIM_ENCODE2_DISABLE
- TIM_ENCODE2_QUA_MODE_TI1
- TIM_ENCODE2_QUA_MODE_TI2
- TIM_ENCODE2_QUA_MODE_TI12
- TIM_ENCODE2_QUA_MODE_SINGLE_TI1
- TIM_ENCODE2_QUA_MODE_SINGLE_TI2
- TIM_ENCODE2_DUL_CLKPLUS_MODE1
- TIM_ENCODE2_DUL_CLKPLUS_MODE2
- TIM_ENCODE2_SINGLE_CLKPLUS_MODE1
- TIM_ENCODE2_SINGLE_CLKPLUS_MODE2
- TIM_ENCODE2_CCW_MODE1
- TIM_ENCODE2_CCW_MODE2
param TIM_IC1Polarity
- TIM_IC_POLARITY_FALLING
- TIM_IC_POLARITY_RISING
param TIM_IC2Polarity
- TIM_IC_POLARITY_FALLING
- TIM_IC_POLARITY_RISING
return none
note When using this function, the slave mode must be disabled.
void TIM_ConfigForcedOc1(TIM_Module* TIMx, uint32_t TIM_ForcedAction)Forces the TIMx output 1 waveform to active or inactive level.
name TIM_ConfigForcedOc1
fun Forces the TIMx output 1 waveform to active or inactive level.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_ForcedAction
- TIM_FORCED_ACTION_ACTIVE
- TIM_FORCED_ACTION_INACTIVE
return none
void TIM_ConfigForcedOc2(TIM_Module* TIMx, uint32_t TIM_ForcedAction)Forces the TIMx output 2 waveform to active or inactive level.
name TIM_ConfigForcedOc2
fun Forces the TIMx output 2 waveform to active or inactive level.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_ForcedAction
- TIM_FORCED_ACTION_ACTIVE
- TIM_FORCED_ACTION_INACTIVE
return none
void TIM_ConfigForcedOc3(TIM_Module* TIMx, uint32_t TIM_ForcedAction)Forces the TIMx output 3 waveform to active or inactive level.
name TIM_ConfigForcedOc3
fun Forces the TIMx output 3 waveform to active or inactive level.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_ForcedAction
- TIM_FORCED_ACTION_ACTIVE
- TIM_FORCED_ACTION_INACTIVE
return none
void TIM_ConfigForcedOc4(TIM_Module* TIMx, uint32_t TIM_ForcedAction)Forces the TIMx output 4 waveform to active or inactive level.
name TIM_ConfigForcedOc4
fun Forces the TIMx output 4 waveform to active or inactive level.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param TIM_ForcedAction
- TIM_FORCED_ACTION_ACTIVE
- TIM_FORCED_ACTION_INACTIVE
return none
void TIM_ConfigForcedOc5(TIM_Module* TIMx, uint32_t TIM_ForcedAction)Forces the TIMx output 5 waveform to active or inactive level.
name TIM_ConfigForcedOc5
fun Forces the TIMx output 5 waveform to active or inactive level.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_ForcedAction
- TIM_FORCED_ACTION_ACTIVE
- TIM_FORCED_ACTION_INACTIVE
return none
void TIM_ConfigForcedOc6(TIM_Module* TIMx, uint32_t TIM_ForcedAction)Forces the TIMx output 6 waveform to active or inactive level.
name TIM_ConfigForcedOc6
fun Forces the TIMx output 6 waveform to active or inactive level.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_ForcedAction
- TIM_FORCED_ACTION_ACTIVE
- TIM_FORCED_ACTION_INACTIVE
return none
void TIM_ConfigForcedOc7(TIM_Module* TIMx, uint32_t TIM_ForcedAction)Forces the TIMx output 7 waveform to active or inactive level.
name TIM_ConfigForcedOc7
fun Forces the TIMx output 7 waveform to active or inactive level.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_ForcedAction
- TIM_FORCED_ACTION_ACTIVE
- TIM_FORCED_ACTION_INACTIVE
return none
void TIM_ConfigArPreload(TIM_Module* TIMx, FunctionalState Cmd)Enables or disables TIMx peripheral Preload register on AR.
name TIM_ConfigArPreload
fun Enables or disables TIMx peripheral Preload register on AR.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param Cmd
- ENABLE
- DISABLE
return none
void TIM_SelectComEvt(TIM_Module* TIMx, FunctionalState Cmd)Selects the TIM peripheral Commutation event.
name TIM_SelectComEvt
fun Selects the TIM peripheral Commutation event.
param TIMx (The input parameters must be the following values):
- TIM1
param Cmd
- ENABLE
- DISABLE
return none
void TIM_SelectCapCmpDmaSrc(TIM_Module* TIMx, FunctionalState Cmd)Selects the TIMx peripheral Capture Compare DMA source.
name TIM_SelectCapCmpDmaSrc
fun Selects the TIMx peripheral Capture Compare DMA source.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param Cmd
- ENABLE
- DISABLE
return none
void TIM_EnableCapCmpPreloadControl(TIM_Module* TIMx, FunctionalState Cmd)Sets or Resets the TIM peripheral Capture Compare Preload Control bit.
name TIM_EnableCapCmpPreloadControl
fun Sets or Resets the TIM peripheral Capture Compare Preload Control bit.
param TIMx (The input parameters must be the following values):
- TIM1
param Cmd
- ENABLE
- DISABLE
return none
void TIM_ConfigOc1Preload(TIM_Module* TIMx, uint32_t TIM_OCPreload)Enables or disables the TIMx peripheral Preload register on CCDAT1.
name TIM_ConfigOc1Preload
fun Enables or disables the TIMx peripheral Preload register on CCDAT1.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_PRE_LOAD_ENABLE
- TIM_OC_PRE_LOAD_DISABLE
return none
void TIM_ConfigOc2Preload(TIM_Module* TIMx, uint32_t TIM_OCPreload)Enables or disables the TIMx peripheral Preload register on CCDAT2.
name TIM_ConfigOc2Preload
fun Enables or disables the TIMx peripheral Preload register on CCDAT2.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_PRE_LOAD_ENABLE
- TIM_OC_PRE_LOAD_DISABLE
return none
void TIM_ConfigOc3Preload(TIM_Module* TIMx, uint32_t TIM_OCPreload)Enables or disables the TIMx peripheral Preload register on CCDAT3.
name TIM_ConfigOc3Preload
fun Enables or disables the TIMx peripheral Preload register on CCDAT3.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_PRE_LOAD_ENABLE
- TIM_OC_PRE_LOAD_DISABLE
return none
void TIM_ConfigOc4Preload(TIM_Module* TIMx, uint32_t TIM_OCPreload)Enables or disables the TIMx peripheral Preload register on CCDAT4.
name TIM_ConfigOc4Preload
fun Enables or disables the TIMx peripheral Preload register on CCDAT4.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param TIM_OCPreload
- TIM_OC_PRE_LOAD_ENABLE
- TIM_OC_PRE_LOAD_DISABLE
return none
void TIM_ConfigOc5Preload(TIM_Module* TIMx, uint32_t TIM_OCPreload)Enables or disables the TIMx peripheral Preload register on CCDAT5.
name TIM_ConfigOc5Preload
fun Enables or disables the TIMx peripheral Preload register on CCDAT5.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_PRE_LOAD_ENABLE
- TIM_OC_PRE_LOAD_DISABLE
return none
void TIM_ConfigOc6Preload(TIM_Module* TIMx, uint32_t TIM_OCPreload)Enables or disables the TIMx peripheral Preload register on CCDAT6.
name TIM_ConfigOc6Preload
fun Enables or disables the TIMx peripheral Preload register on CCDAT6.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_PRE_LOAD_ENABLE
- TIM_OC_PRE_LOAD_DISABLE
return none
void TIM_ConfigOc7Preload(TIM_Module* TIMx, uint32_t TIM_OCPreload)Enables or disables the TIMx peripheral Preload register on CCDAT6.
name TIM_ConfigOc7Preload
fun Enables or disables the TIMx peripheral Preload register on CCDAT6.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_PRE_LOAD_ENABLE
- TIM_OC_PRE_LOAD_DISABLE
return none
void TIM_ConfigOc1Fast(TIM_Module* TIMx, uint32_t TIM_OCFast)Configures the TIMx Output Compare 1 Fast feature.
name TIM_ConfigOc1Fast
fun Configures the TIMx Output Compare 1 Fast feature.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_FAST_ENABLE
- TIM_OC_FAST_DISABLE
return none
void TIM_ConfigOc2Fast(TIM_Module* TIMx, uint32_t TIM_OCFast)Configures the TIMx Output Compare 2 Fast feature.
name TIM_ConfigOc2Fast
fun Configures the TIMx Output Compare 2 Fast feature.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_FAST_ENABLE
- TIM_OC_FAST_DISABLE
return none
void TIM_ConfigOc3Fast(TIM_Module* TIMx, uint32_t TIM_OCFast)Configures the TIMx Output Compare 3 Fast feature.
name TIM_ConfigOc3Fast
fun Configures the TIMx Output Compare 3 Fast feature.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_FAST_ENABLE
- TIM_OC_FAST_DISABLE
return none
void TIM_ConfigOc4Fast(TIM_Module* TIMx, uint32_t TIM_OCFast)Configures the TIMx Output Compare 4 Fast feature.
name TIM_ConfigOc4Fast
fun Configures the TIMx Output Compare 4 Fast feature.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param TIM_OCPreload
- TIM_OC_FAST_ENABLE
- TIM_OC_FAST_DISABLE
return none
void TIM_ConfigOc5Fast(TIM_Module* TIMx, uint32_t TIM_OCFast)Configures the TIMx Output Compare 5 Fast feature.
name TIM_ConfigOc5Fast
fun Configures the TIMx Output Compare 5 Fast feature.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_FAST_ENABLE
- TIM_OC_FAST_DISABLE
return none
void TIM_ConfigOc6Fast(TIM_Module* TIMx, uint32_t TIM_OCFast)Configures the TIMx Output Compare 6 Fast feature.
name TIM_ConfigOc6Fast
fun Configures the TIMx Output Compare 6 Fast feature.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_FAST_ENABLE
- TIM_OC_FAST_DISABLE
return none
void TIM_ConfigOc7Fast(TIM_Module* TIMx, uint32_t TIM_OCFast)Configures the TIMx Output Compare 7 Fast feature.
name TIM_ConfigOc7Fast
fun Configures the TIMx Output Compare 7 Fast feature.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_FAST_ENABLE
- TIM_OC_FAST_DISABLE
return none
void TIM_ClrOc1Ref(TIM_Module* TIMx, uint32_t TIM_OCClear)Clears or safeguards the OCREF1 signal on an external event
name TIM_ClrOc1Ref
fun Clears or safeguards the OCREF1 signal on an external event
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_CLR_ENABLE
- TIM_OC_CLR_DISABLE
return none
void TIM_ClrOc2Ref(TIM_Module* TIMx, uint32_t TIM_OCClear)Clears or safeguards the OCREF2 signal on an external event
name TIM_ClrOc2Ref
fun Clears or safeguards the OCREF2 signal on an external event
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_CLR_ENABLE
- TIM_OC_CLR_DISABLE
return none
void TIM_ClrOc3Ref(TIM_Module* TIMx, uint32_t TIM_OCClear)Clears or safeguards the OCREF3 signal on an external event
name TIM_ClrOc3Ref
fun Clears or safeguards the OCREF3 signal on an external event
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_CLR_ENABLE
- TIM_OC_CLR_DISABLE
return none
void TIM_ClrOc4Ref(TIM_Module* TIMx, uint32_t TIM_OCClear)Clears or safeguards the OCREF4 signal on an external event
name TIM_ClrOc4Ref
fun Clears or safeguards the OCREF4 signal on an external event
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param TIM_OCPreload
- TIM_OC_CLR_ENABLE
- TIM_OC_CLR_DISABLE
return none
void TIM_ClrOc5Ref(TIM_Module* TIMx, uint32_t TIM_OCClear)Clears or safeguards the OCREF5 signal on an external event
name TIM_ClrOc5Ref
fun Clears or safeguards the OCREF5 signal on an external event
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_CLR_ENABLE
- TIM_OC_CLR_DISABLE
return none
void TIM_ClrOc6Ref(TIM_Module* TIMx, uint32_t TIM_OCClear)Clears or safeguards the OCREF6 signal on an external event
name TIM_ClrOc6Ref
fun Clears or safeguards the OCREF6 signal on an external event
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_CLR_ENABLE
- TIM_OC_CLR_DISABLE
return none
void TIM_ClrOc7Ref(TIM_Module* TIMx, uint32_t TIM_OCClear)Clears or safeguards the OCREF7 signal on an external event
name TIM_ClrOc7Ref
fun Clears or safeguards the OCREF7 signal on an external event
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_CLR_ENABLE
- TIM_OC_CLR_DISABLE
return none
void TIM_ClrOcRefInputSource(TIM_Module* TIMx, uint32_t OCRefClearInputSource)Set the OCREF clear input source
name TIM_ClrOcRefInputSource
fun Set the OCREF clear input source
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param OCRefClearInputSource
- TIM_ETRSEL
- TIM_COMPSEL
return none
void TIM_ConfigOc1Polarity(TIM_Module* TIMx, uint32_t OcPolarity)Configures the TIMx channel 1 polarity.
name TIM_ConfigOc1Polarity
fun Configures the TIMx channel 1 polarity.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_POLARITY_HIGH
- TIM_OC_POLARITY_LOW
return none
void TIM_ConfigOc1NPolarity(TIM_Module* TIMx, uint32_t OcNPolarity)Configures the TIMx channel 1N polarity.
name TIM_ConfigOc1NPolarity
fun Configures the TIMx channel 1N polarity.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OCN_POLARITY_HIGH
- TIM_OCN_POLARITY_LOW
return none
void TIM_ConfigOc2Polarity(TIM_Module* TIMx, uint32_t OcPolarity)Configures the TIMx channel 2 polarity.
name TIM_ConfigOc2Polarity
fun Configures the TIMx channel 2 polarity.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_POLARITY_HIGH
- TIM_OC_POLARITY_LOW
return none
void TIM_ConfigOc2NPolarity(TIM_Module* TIMx, uint32_t OcNPolarity)Configures the TIMx channel 2N polarity.
name TIM_ConfigOc2NPolarity
fun Configures the TIMx channel 2N polarity.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OCN_POLARITY_HIGH
- TIM_OCN_POLARITY_LOW
return none
void TIM_ConfigOc3Polarity(TIM_Module* TIMx, uint32_t OcPolarity)Configures the TIMx channel 3 polarity.
name TIM_ConfigOc3Polarity
fun Configures the TIMx channel 3 polarity.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_OCPreload
- TIM_OC_POLARITY_HIGH
- TIM_OC_POLARITY_LOW
return none
void TIM_ConfigOc3NPolarity(TIM_Module* TIMx, uint32_t OcNPolarity)Configures the TIMx channel 3N polarity.
name TIM_ConfigOc3NPolarity
fun Configures the TIMx channel 3N polarity.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OCN_POLARITY_HIGH
- TIM_OCN_POLARITY_LOW
return none
void TIM_ConfigOc4Polarity(TIM_Module* TIMx, uint32_t OcPolarity)Configures the TIMx channel 4 polarity.
name TIM_ConfigOc4Polarity
fun Configures the TIMx channel 4 polarity.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param TIM_OCPreload
- TIM_OC_POLARITY_HIGH
- TIM_OC_POLARITY_LOW
return none
void TIM_ConfigOc4NPolarity(TIM_Module* TIMx, uint32_t OcNPolarity)Configures the TIMx channel 4N polarity.
name TIM_ConfigOc4NPolarity
fun Configures the TIMx channel 4N polarity.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OCN_POLARITY_HIGH
- TIM_OCN_POLARITY_LOW
return none
void TIM_ConfigOc5Polarity(TIM_Module* TIMx, uint32_t OcPolarity)Configures the TIMx channel 5 polarity.
name TIM_ConfigOc5Polarity
fun Configures the TIMx channel 5 polarity.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_POLARITY_HIGH
- TIM_OC_POLARITY_LOW
return none
void TIM_ConfigOc6Polarity(TIM_Module* TIMx, uint32_t OcPolarity)Configures the TIMx channel 6 polarity.
name TIM_ConfigOc6Polarity
fun Configures the TIMx channel 6 polarity.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_POLARITY_HIGH
- TIM_OC_POLARITY_LOW
return none
void TIM_ConfigOc7Polarity(TIM_Module* TIMx, uint32_t OcPolarity)Configures the TIMx channel 7 polarity.
name TIM_ConfigOc7Polarity
fun Configures the TIMx channel 7 polarity.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_OCPreload
- TIM_OC_POLARITY_HIGH
- TIM_OC_POLARITY_LOW
return none
void TIM_EnableCapCmpCh(TIM_Module* TIMx, uint32_t Channel, uint32_t TIM_CCx)Enables or disables the TIM Capture Compare Channel x.
name TIM_EnableCapCmpCh
fun Enables or disables the TIM Capture Compare Channel x.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param Channel
- TIM_CH_1
- TIM_CH_2
- TIM_CH_3
- TIM_CH_4
- TIM_CH_5
- TIM_CH_6
- TIM_CH_7
param TIM_CCx
- TIM_CAP_CMP_ENABLE
- TIM_CAP_CMP_DISABLE
return none
void TIM_EnableCapCmpChN(TIM_Module* TIMx, uint32_t Channel, uint32_t TIM_CCxN)Enables or disables the TIM Capture Compare Channel xN.
name TIM_EnableCapCmpChN
fun Enables or disables the TIM Capture Compare Channel xN.
param TIMx (The input parameters must be the following values):
- TIM1
param Channel
- TIM_CH_1
- TIM_CH_2
- TIM_CH_3
- TIM_CH_4
param TIM_CCx
- TIM_CAP_CMP_N_ENABLE
- TIM_CAP_CMP_N_DISABLE
return none
void TIM_SelectOcMode(TIM_Module* TIMx, uint32_t Channel, uint32_t OcMode)Selects the TIM Output Compare Mode.
name TIM_SelectOcMode
fun Selects the TIM Output Compare Mode.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param Channel
- TIM_CH_1
- TIM_CH_2
- TIM_CH_3
- TIM_CH_4
- TIM_CH_5
- TIM_CH_6
- TIM_CH_7
param OcMode
- TIM_OCMODE_TIMING
- TIM_OCMODE_ACTIVE
- TIM_OCMODE_INACTIVE
- TIM_OCMODE_TOGGLE
- TIM_OCMODE_PWM1
- TIM_OCMODE_PWM2
- TIM_FORCED_ACTION_ACTIVE
- TIM_FORCED_ACTION_INACTIVE
return none
void TIM_EnableUpdateEvt(TIM_Module* TIMx, FunctionalState Cmd)Enables or Disables the TIMx Update event.
name TIM_EnableUpdateEvt
fun Enables or Disables the TIMx Update event.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param Cmd
- ENABLE
- DISABLE
return none
void TIM_ConfigUpdateEvt(TIM_Module* TIMx, FunctionalState Cmd)Enables or Disables the TIMx Update event.
name TIM_ConfigUpdateEvt
fun Enables or Disables the TIMx Update event.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param Cmd
- ENABLE
- DISABLE
return none
void TIM_ConfigUpdateRequestIntSrc(TIM_Module* TIMx, uint32_t TIM_UpdateSource)Configures the TIMx Update Request Interrupt source.
name TIM_ConfigUpdateRequestIntSrc
fun Configures the TIMx Update Request Interrupt source.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_UpdateSource
- TIM_UPDATE_SRC_GLOBAL
- TIM_UPDATE_SRC_REGULAR
return none
void TIM_SelectHallSensor(TIM_Module* TIMx, FunctionalState Cmd)Enables or disables the TIMx’s Hall sensor interface.
name TIM_SelectHallSensor
fun Enables or disables the TIMx's Hall sensor interface.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param Cmd
- ENABLE
- DISABLE
return none
void TIM_SelectOnePulseMode(TIM_Module* TIMx, uint32_t TIM_OPMode)Selects the TIMx’s One Pulse Mode.
name TIM_SelectOnePulseMode
fun Selects the TIMx's One Pulse Mode.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_OPMode
- TIM_OPMODE_SINGLE
- TIM_OPMODE_REPET
return none
void TIM_SelectOutputTrig(TIM_Module* TIMx, uint32_t TIM_TRGOSource)Selects the TIMx Trigger Output Mode.
name TIM_SelectOutputTrig
fun Selects the TIMx Trigger Output Mode.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_TRGOSource
- TIM_TRGO_SRC_RESET
- TIM_TRGO_SRC_ENABLE
- TIM_TRGO_SRC_UPDATE
- TIM_TRGO_SRC_OC1
- TIM_TRGO_SRC_OC1REF
- TIM_TRGO_SRC_OC2REF
- TIM_TRGO_SRC_OC3REF
- TIM_TRGO_SRC_OC4REF
- TIM_TRGO_SRC_OC5REF
- TIM_TRGO_SRC_OC6REF
- TIM_TRGO_SRC_OC7REF
return none
void TIM_SelectSlaveMode(TIM_Module* TIMx, uint32_t TIM_SlaveMode)Selects the TIMx Slave Mode.
name TIM_SelectSlaveMode
fun Selects the TIMx Slave Mode.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_SlaveMode
- TIM_SLAVE_MODE_DISABLE
- TIM_SLAVE_MODE_RESET
- TIM_SLAVE_MODE_GATED
- TIM_SLAVE_MODE_TRIG
- TIM_SLAVE_MODE_EXT1
- TIM_SLAVE_MODE_GATED_RESET
- TIM_SLAVE_MODE_TRIG_RESET
return none
void TIM_SelectMasterSlaveMode(TIM_Module* TIMx, uint32_t TIM_MasterSlaveMode)Sets or Resets the TIMx Master/Slave Mode.
name TIM_SelectMasterSlaveMode
fun Sets or Resets the TIMx Master/Slave Mode.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_SlaveMode
- TIM_MASTER_SLAVE_MODE_ENABLE
- TIM_MASTER_SLAVE_MODE_DISABLE
return none
void TIM_SetCnt(TIM_Module* TIMx, uint32_t Counter)Sets the TIMx Counter Register value
name TIM_SetCnt
fun Sets the TIMx Counter Register value
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param Counter
- Counter can be a number between 0x00000000 and 0xFFFFFFFF
return none
void TIM_SetAutoReload(TIM_Module* TIMx, uint32_t Autoreload)Sets the TIMx Autoreload Register value
name TIM_SetAutoReload
fun Sets the TIMx Autoreload Register value
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param Autoreload
- Autoreload can be a number between 0x00000000 and 0xFFFFFFFF
return none
void TIM_SetCmp1(TIM_Module* TIMx, uint32_t Compare1)Sets the TIMx Capture Compare1 Register value
name TIM_SetCmp1
fun Sets the TIMx Capture Compare1 Register value
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param Compare1
- Compare1 can be a number between 0x00000000 and 0xFFFFFFFF
return none
void TIM_SetCmp2(TIM_Module* TIMx, uint32_t Compare2)Sets the TIMx Capture Compare2 Register value
name TIM_SetCmp2
fun Sets the TIMx Capture Compare2 Register value
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param Compare2
- Compare2 can be a number between 0x00000000 and 0xFFFFFFFF
return none
void TIM_SetCmp3(TIM_Module* TIMx, uint32_t Compare3)Sets the TIMx Capture Compare3 Register value
name TIM_SetCmp3
fun Sets the TIMx Capture Compare3 Register value
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param Compare3
- Compare3 can be a number between 0x00000000 and 0xFFFFFFFF
return none
void TIM_SetCmp4(TIM_Module* TIMx, uint16_t Compare4)Sets the TIMx Capture Compare4 Register value
name TIM_SetCmp4
fun Sets the TIMx Capture Compare4 Register value
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param Compare4
- Compare4 can be a number between 0x0000 and 0xFFFF
return none
void TIM_SetCmp5(TIM_Module* TIMx, uint16_t Compare5)Sets the TIMx Capture Compare5 Register value
name TIM_SetCmp5
fun Sets the TIMx Capture Compare5 Register value
param TIMx (The input parameters must be the following values):
- TIM1
param Compare5
- Compare5 can be a number between 0x0000 and 0xFFFF
return none
void TIM_SetCmp6(TIM_Module* TIMx, uint16_t Compare6)Sets the TIMx Capture Compare6 Register value
name TIM_SetCmp6
fun Sets the TIMx Capture Compare6 Register value
param TIMx (The input parameters must be the following values):
- TIM1
param Compare6
- Compare6 can be a number between 0x0000 and 0xFFFF
return none
void TIM_SetCmp7(TIM_Module* TIMx, uint16_t Compare7)Sets the TIMx Capture Compare7 Register value
name TIM_SetCmp7
fun Sets the TIMx Capture Compare7 Register value
param TIMx (The input parameters must be the following values):
- TIM1
param Compare7
- Compare7 can be a number between 0x0000 and 0xFFFF
return none
void TIM_SetCmp1D(TIM_Module* TIMx, uint16_t compare1D)Sets the CCDDAT1[16:31] in TIM1_CCDAT1 register
name TIM_SetCmp1D
fun Sets the CCDDAT1[16:31] in TIM1_CCDAT1 register
param TIMx (The input parameters must be the following values):
- TIM1
param compare1D
- compare1D can be a number between 0x0000 and 0xFFFF
return none
void TIM_SetCmp2D(TIM_Module* TIMx, uint16_t compare2D)Sets the CCDDAT2[16:31] in TIM1_CCDAT2 register
name TIM_SetCmp2D
fun Sets the CCDDAT2[16:31] in TIM1_CCDAT2 register
param TIMx (The input parameters must be the following values):
- TIM1
param compare2D
- compare2D can be a number between 0x0000 and 0xFFFF
return none
void TIM_SetCmp3D(TIM_Module* TIMx, uint16_t compare3D)Sets the CCDDAT3[16:31] in TIM1_CCDAT3 register
name TIM_SetCmp3D
fun Sets the CCDDAT3[16:31] in TIM1_CCDAT3 register
param TIMx (The input parameters must be the following values):
- TIM1
param compare3D
- compare3D can be a number between 0x0000 and 0xFFFF
return none
void TIM_SetCmp4D(TIM_Module* TIMx, uint16_t compare4D)Sets the CCDDAT4[16:31] in TIM1_CCDAT4 register
name TIM_SetCmp4D
fun Sets the CCDDAT4[16:31] in TIM1_CCDAT4 register
param TIMx (The input parameters must be the following values):
- TIM1
param compare4D
- compare4D can be a number between 0x0000 and 0xFFFF
return none
void ConfigTI1(TIM_Module* TIMx, uint32_t ICPolarity, uint32_t ICSelection, uint32_t ICFilter)Configure the TI1 as Input.
name ConfigTI1
fun Configure the TI1 as Input.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param ICPolarity
- TIM_IC_POLARITY_RISING
- TIM_IC_POLARITY_FALLING
param ICSelection
- TIM_IC_SELECTION_DIRECTTI
- TIM_IC_SELECTION_INDIRECTTI
- TIM_IC_SELECTION_TRC
param ICFilter
- ICFilter can be a number between 0x0 and 0xF
return none
void ConfigTI2(TIM_Module* TIMx, uint32_t ICPolarity, uint32_t ICSelection, uint32_t ICFilter)Configure the TI2 as Input.
name ConfigTI2
fun Configure the TI2 as Input.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param ICPolarity
- TIM_IC_POLARITY_RISING
- TIM_IC_POLARITY_FALLING
param ICSelection
- TIM_IC_SELECTION_DIRECTTI
- TIM_IC_SELECTION_INDIRECTTI
- TIM_IC_SELECTION_TRC
param ICFilter
- ICFilter can be a number between 0x0 and 0xF
return none
void ConfigTI3(TIM_Module* TIMx, uint32_t ICPolarity, uint32_t ICSelection, uint32_t ICFilter)Configure the TI3 as Input.
name ConfigTI3
fun Configure the TI3 as Input.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param ICPolarity
- TIM_IC_POLARITY_RISING
- TIM_IC_POLARITY_FALLING
param ICSelection
- TIM_IC_SELECTION_DIRECTTI
- TIM_IC_SELECTION_INDIRECTTI
- TIM_IC_SELECTION_TRC
param ICFilter
- ICFilter can be a number between 0x0 and 0xF
return none
void ConfigTI4(TIM_Module* TIMx, uint32_t ICPolarity, uint32_t ICSelection, uint32_t ICFilter)Configure the TI4 as Input.
name ConfigTI4
fun Configure the TI4 as Input.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param ICPolarity
- TIM_IC_POLARITY_RISING
- TIM_IC_POLARITY_FALLING
param ICSelection
- TIM_IC_SELECTION_DIRECTTI
- TIM_IC_SELECTION_INDIRECTTI
- TIM_IC_SELECTION_TRC
param ICFilter
- ICFilter can be a number between 0x0 and 0xF
return none
void TIM_SetInCap1Prescaler(TIM_Module* TIMx, uint32_t ICPrescaler)Sets the TIMx Input Capture 1 prescaler.
name TIM_SetInCap1Prescaler
fun Sets the TIMx Input Capture 1 prescaler.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param ICPrescaler
- TIM_IC_PSC_DIV1
- TIM_IC_PSC_DIV2
- TIM_IC_PSC_DIV4
- TIM_IC_PSC_DIV8
return none
void TIM_SetInCap2Prescaler(TIM_Module* TIMx, uint32_t ICPrescaler)Sets the TIMx Input Capture 2 prescaler.
name TIM_SetInCap2Prescaler
fun Sets the TIMx Input Capture 2 prescaler.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param ICPrescaler
- TIM_IC_PSC_DIV1
- TIM_IC_PSC_DIV2
- TIM_IC_PSC_DIV4
- TIM_IC_PSC_DIV8
return none
void TIM_SetInCap3Prescaler(TIM_Module* TIMx, uint32_t ICPrescaler)Sets the TIMx Input Capture 3 prescaler.
name TIM_SetInCap3Prescaler
fun Sets the TIMx Input Capture 3 prescaler.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param ICPrescaler
- TIM_IC_PSC_DIV1
- TIM_IC_PSC_DIV2
- TIM_IC_PSC_DIV4
- TIM_IC_PSC_DIV8
return none
void TIM_SetInCap4Prescaler(TIM_Module* TIMx, uint32_t ICPrescaler)Sets the TIMx Input Capture 4 prescaler.
name TIM_SetInCap4Prescaler
fun Sets the TIMx Input Capture 4 prescaler.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
param ICPrescaler
- TIM_IC_PSC_DIV1
- TIM_IC_PSC_DIV2
- TIM_IC_PSC_DIV4
- TIM_IC_PSC_DIV8
return none
void TIM_SelectInputTrig(TIM_Module* TIMx, uint32_t TIM_InputTriggerSource)Selects the Input Trigger source
name TIM_SelectInputTrig
fun Selects the Input Trigger source
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_InputTriggerSource:
- TIM_TRIG_SEL_IN_TR0
- TIM_TRIG_SEL_IN_TR1
- TIM_TRIG_SEL_IN_TR2
- TIM_TRIG_SEL_IN_TR3
- TIM_TRIG_SEL_TI1F_ED
- TIM_TRIG_SEL_TI1FP1
- TIM_TRIG_SEL_TI2FP2
- TIM_TRIG_SEL_ETRF
return none
void TIM_ConfigExtTrig(TIM_Module* TIMx,uint32_t TIM_ExtTRGPrescaler,uint32_t TIM_ExtTRGPolarity,uint32_t ExtTRGFilter)Configures the TIMx External Trigger (ETR).
name TIM_ConfigExtTrig
fun Configures the TIMx External Trigger (ETR).
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_ExtTRGPrescaler:
- TIM_EXT_TRG_PSC_OFF
- TIM_EXT_TRG_PSC_DIV2
- TIM_EXT_TRG_PSC_DIV4
- TIM_EXT_TRG_PSC_DIV8
param TIM_ExtTRGPolarity
- TIM_EXT_TRIG_POLARITY_INVERTED
- TIM_EXT_TRIG_POLARITY_NONINVERTED
param ExtTRGFilter
- ExtTRGFilter can be a number between 0x0 and 0xF
return none
void TIM_SetClkDiv(TIM_Module* TIMx, uint32_t TIM_CKD)Sets the TIMx Clock Division value.
name TIM_SetClkDiv
fun Sets the TIMx Clock Division value.
param TIMx (The input parameters must be the following values):
- TIM1
param TIM_CKD:
- TIM_CLK_DIV1
- TIM_CLK_DIV2
- TIM_CLK_DIV4
return none
uint32_t TIM_GetCap1(TIM_Module* TIMx)Gets the TIMx Input Capture 1 value.
name TIM_GetCap1
fun Gets the TIMx Input Capture 1 value.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
return Capture Compare 1 Register value.
uint32_t TIM_GetCap2(TIM_Module* TIMx)Gets the TIMx Input Capture 2 value.
name TIM_GetCap2
fun Gets the TIMx Input Capture 2 value.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
return Capture Compare 2 Register value.
uint32_t TIM_GetCap3(TIM_Module* TIMx)Gets the TIMx Input Capture 3 value.
name TIM_GetCap3
fun Gets the TIMx Input Capture 3 value.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
return Capture Compare 3 Register value.
uint16_t TIM_GetCap4(TIM_Module* TIMx)Gets the TIMx Input Capture 4 value.
name TIM_GetCap4
fun Gets the TIMx Input Capture 4 value.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
return Capture Compare 4 Register value.
uint16_t TIM_GetCap5(TIM_Module* TIMx)Gets the TIMx Input Capture 5 value.
name TIM_GetCap5
fun Gets the TIMx Input Capture 5 value.
param TIMx (The input parameters must be the following values):
- TIM1
return Capture Compare 5 Register value.
uint16_t TIM_GetCap6(TIM_Module* TIMx)Gets the TIMx Input Capture 6 value.
name TIM_GetCap6
fun Gets the TIMx Input Capture 6 value.
param TIMx (The input parameters must be the following values):
- TIM1
return Capture Compare 6 Register value.
uint16_t TIM_GetCap7(TIM_Module* TIMx)Gets the TIMx Input Capture 7 value.
name TIM_GetCap7
fun Gets the TIMx Input Capture 7 value.
param TIMx (The input parameters must be the following values):
- TIM1
return Capture Compare 7 Register value.
uint16_t TIM_GetCap1D(TIM_Module* TIMx)Gets the TIMx Input Capture 1D value.
name TIM_GetCap1D
fun Gets the TIMx Input Capture 1D value.
param TIMx (The input parameters must be the following values):
- TIM1
return Capture Compare 1D Register value.
uint16_t TIM_GetCap2D(TIM_Module* TIMx)Gets the TIMx Input Capture 2D value.
name TIM_GetCap2D
fun Gets the TIMx Input Capture 2D value.
param TIMx (The input parameters must be the following values):
- TIM1
return Capture Compare 2D Register value.
uint16_t TIM_GetCap3D(TIM_Module* TIMx)Gets the TIMx Input Capture 3D value.
name TIM_GetCap3D
fun Gets the TIMx Input Capture 3D value.
param TIMx (The input parameters must be the following values):
- TIM1
return Capture Compare 3D Register value.
uint16_t TIM_GetCap4D(TIM_Module* TIMx)Gets the TIMx Input Capture 4D value.
name TIM_GetCap4D
fun Gets the TIMx Input Capture 4D value.
param TIMx (The input parameters must be the following values):
- TIM1
return Capture Compare 4D Register value.
uint32_t TIM_GetCnt(TIM_Module* TIMx)Gets the TIMx Counter value.
name TIM_GetCnt
fun Gets the TIMx Counter value.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
return Counter Register value.
uint16_t TIM_GetPrescaler(TIM_Module* TIMx)Gets the TIMx Prescaler value.
name TIM_GetPrescaler
fun Gets the TIMx Prescaler value.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
return Prescaler Register value.
uint32_t TIM_GetAutoReload(TIM_Module* TIMx)Gets the TIMx AR value.
name TIM_GetAutoReload
fun Gets the TIMx AR value.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
return AR Register value.
FlagStatus TIM_GetCCENStatus(TIM_Module* TIMx, uint32_t TIM_CCEN)Checks whether the specified TIM flag is set or not.
name TIM_GetCCENStatus
fun Checks whether the specified TIM flag is set or not.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
param TIM_CCEN :
- TIM_CC1EN
- TIM_CC1NEN
- TIM_CC2EN
- TIM_CC2NEN
- TIM_CC3EN
- TIM_CC3NEN
- TIM_CC4EN
- TIM_CC4NEN
- TIM_CC5EN
- TIM_CC6EN
- TIM_CC7EN
return The new state of TIM_FLAG (SET or RESET).
FlagStatus TIM_GetFlagStatus(TIM_Module* TIMx, uint32_t TIM_FLAG)Checks whether the specified TIM flag is set or not.
name TIM_GetFlagStatus
fun Checks whether the specified TIM flag is set or not.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_FLAG :
- TIM_FLAG_CC1
- TIM_FLAG_CC2
- TIM_FLAG_CC3
- TIM_FLAG_CC4
- TIM_FLAG_CC5
- TIM_FLAG_CC6
- TIM_FLAG_CC7
- TIM_FLAG_CC1OF
- TIM_FLAG_CC2OF
- TIM_FLAG_CC3OF
- TIM_FLAG_CC4OF
- TIM_FLAG_UPDATE
- TIM_FLAG_COM
- TIM_FLAG_TRIG
- TIM_FLAG_BREAK
- TIM_FLAG_LBKP
- TIM_FLAG_PBKP
- TIM_FLAG_COMP
- TIM_FLAG_IOM
- TIM_FLAG_C3LDCNT
return The new state of TIM_FLAG (SET or RESET).
void TIM_ClearFlag(TIM_Module* TIMx, uint32_t TIM_FLAG)Clears the TIMx’s pending flags.
name TIM_ClearFlag
fun Clears the TIMx's pending flags.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_FLAG :
- TIM_FLAG_CC1
- TIM_FLAG_CC2
- TIM_FLAG_CC3
- TIM_FLAG_CC4
- TIM_FLAG_CC5
- TIM_FLAG_CC6
- TIM_FLAG_CC7
- TIM_FLAG_CC1OF
- TIM_FLAG_CC2OF
- TIM_FLAG_CC3OF
- TIM_FLAG_CC4OF
- TIM_FLAG_UPDATE
- TIM_FLAG_COM
- TIM_FLAG_TRIG
- TIM_FLAG_BREAK
- TIM_FLAG_LBKP
- TIM_FLAG_PBKP
- TIM_FLAG_COMP
- TIM_FLAG_IOM
- TIM_FLAG_C3LDCNT
return none.
INTStatus TIM_GetIntStatus(TIM_Module* TIMx, uint32_t TIM_IT)Checks whether the TIM interrupt has occurred or not.
name TIM_GetIntStatus
fun Checks whether the TIM interrupt has occurred or not.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_IT :
- TIM_INT_UPDATE
- TIM_INT_CC1
- TIM_INT_CC2
- TIM_INT_CC3
- TIM_INT_CC4
- TIM_INT_CC5
- TIM_INT_CC6
- TIM_INT_CC7
- TIM_INT_C3LDCNT
- TIM_INT_COM
- TIM_INT_TRIG
- TIM_INT_BREAK
return The new state of the TIM_IT(SET or RESET).
void TIM_ClrIntPendingBit(TIM_Module* TIMx, uint32_t TIM_IT)Clears the TIMx’s interrupt pending bits.
name TIM_ClrIntPendingBit
fun Clears the TIMx's interrupt pending bits.
param TIMx (The input parameters must be the following values):
- TIM1
- TIM3
- TIM4
- TIM6
param TIM_IT :
- TIM_INT_UPDATE
- TIM_INT_CC1
- TIM_INT_CC2
- TIM_INT_CC3
- TIM_INT_CC4
- TIM_INT_CC5
- TIM_INT_CC6
- TIM_INT_CC7
- TIM_INT_C3LDCNT
- TIM_INT_COM
- TIM_INT_TRIG
- TIM_INT_BREAK
return none.
void TIM_AsymmetricEnable(TIM_Module* TIMx, FunctionalState Cmd)Enable or disable asymmetric mode in center-aligned.
name TIM_Asymmetric_Enable.
fun Enable or disable asymmetric mode in center-aligned.
param TIMx:
- TIM1
param Cmd
- ENABLE
- DISABLE
return none
Use note: Declared at line 713 of n32g033_tim.h; the name line of its comment reads TIM_Asymmetric_Enable., which differs from the function name TIM_AsymmetricEnable, and the fun line describes the behavior.
void TIM_IC1FiltConfig(TIM_Module* TIMx, TIM_FiltInitType* TIM_FiltInitStruct)Config the filter of channel1.
name TIM_IC1FiltConfig
fun Config the filter of channel1.
param TIMx:
- TIM4
param TIM_FiltInitStruct:
- refer to the definition of TIM_FiltInitType
return none
void TIM_IC2FiltConfig(TIM_Module* TIMx, TIM_FiltInitType* TIM_FiltInitStruct)Config the filter of channel2.
name TIM_IC2FiltConfig
fun Config the filter of channel2.
param TIMx:
- TIM4
param TIM_FiltInitStruct:
- refer to the definition of TIM_FiltInitType
return none
void TIM_IC3FiltConfig(TIM_Module* TIMx, TIM_FiltInitType* TIM_FiltInitStruct)Config the filter of channel3.
name TIM_IC3FiltConfig
fun Config the filter of channel3.
param TIMx:
- TIM4
param TIM_FiltInitStruct:
- refer to the definition of TIM_FiltInitType
return none
void TIM_IC1FiltEnable(TIM_Module* TIMx,FunctionalState Cmd)Enable or disable the filter of channel1.
name TIM_IC1FiltEnable
fun Enable or disable the filter of channel1.
param TIMx:
- TIM4
param Cmd :
- ENABLE
- DISABLE
return none
void TIM_IC2FiltEnable(TIM_Module* TIMx,FunctionalState Cmd)Enable or disable the filter of channel2.
name TIM_IC2FiltEnable
fun Enable or disable the filter of channel2.
param TIMx:
- TIM4
param Cmd :
- ENABLE
- DISABLE
return none
void TIM_IC3FiltEnable(TIM_Module* TIMx,FunctionalState Cmd)Enable or disable the filter of channel3.
name TIM_IC3FiltEnable
fun Enable or disable the filter of channel3.
param TIMx:
- TIM4
param Cmd :
- ENABLE
- DISABLE
return none
FlagStatus TIM_GetFiltStatus(TIM_Module* TIMx, uint32_t TIM_FiltFlag)Checks the specified filter status.
name TIM_GetFiltStatus
fun Checks the specified filter status.
param TIMx (The input parameters must be the following values):
- TIM4
param TIM_FiltFlag :
- TIM_C1FILTO
- TIM_C2FILTO
- TIM_C3FILTO
return The new state of TIM_FiltFlag (SET or RESET).
void TIM_TrgiLoadLvrToCNTEnable(FunctionalState Cmd)The TRGI signal triggers the loading of the ENCLVR value into the CNT.
name TIM_TrgiLoadLvrToCNTEnable
fun The TRGI signal triggers the loading of the ENCLVR value into the CNT.
param Cmd :
- ENABLE
- DISABLE
return none
note only for TIM3
uint32_t TIM_GetLVR(TIM_Module* TIMx)Get the TIMx LVR value.
name TIM_GetLVR
fun Get the TIMx LVR value.
param TIMx (The input parameters must be the following values):
- TIM3
- TIM4
return ENCLVR Register value.
void TIM_CH3LoadLvrToCNTEnable(FunctionalState Cmd)The CH3 triggers the loading of the ENCLVR value into the CNT.
name TIM_CH3LoadLvrToCNTEnable
fun The CH3 triggers the loading of the ENCLVR value into the CNT.
param Cmd :
- ENABLE
- DISABLE
return none
note only for TIM4
void TIM_CH3LoadLvrToCNTPolarity(uint32_t Polarity)Config CH3 Polarity to trigger ENCLVR value loading into the CNT.
name TIM_CH3LoadLvrToCNTPolarity
fun Config CH3 Polarity to trigger ENCLVR value loading into the CNT.
param Polarity :
- TIM_CH3_POLARITY_HIGH
- TIM_CH3_POLARITY_LOW
- TIM_CH3_POLARITY_RISING
- TIM_CH3_POLARITY_FALLING
return none
note only for TIM4
uint32_t TIM_GetENCDAT(TIM_Module* TIMx)Gets the TIMx ENCDAT value.
name TIM_GetENCDAT
fun Gets the TIMx ENCDAT value.
param TIMx (The input parameters must be the following values):
- TIM4
return ENCDAT Register value.
uint32_t TIM_GetENCDATSign(TIM_Module* TIMx)Get the sign of TIMx ENCDAT value.
name TIM_GetENCDATSign
fun Get the sign of TIMx ENCDAT value.
param TIMx (The input parameters must be the following values):
- TIM4
return Sign of TIMx ENCDAT value.
5.18.3 Demo descriptions
This section covers the 19 TIM examples: 6Steps uses SysTick to raise COM events for a six-step commutation waveform, ComplementarySignals emits four complementary pairs with dead time and break, DMA rewrites the compare value by circular DMA, DMABurst rewrites the period and duty by a single DMA burst, ExtTrigger_Synchro cascades and synchronizes two timers on an external trigger, InputCapture measures frequency by input capture, OCActive and OCInactive show output compare in active and inactive state, OCToggle toggles the output on compare match, OnePulse emits one pulse on an external edge, PWM_Input measures the frequency and duty of an external PWM, PWM_Output emits four PWM channels with different duty cycles, TimeBase generates timer interrupts on compare events, TimeBasic_TIM1, TimeBasic_TIM3, TimeBasic_TIM4, and TimeBasic_TIM6 toggle an IO on the update interrupt, TimeBasic6_wakeup wakes the chip from STOP mode on the TIM6 update interrupt, and TIMx_Synchro lets a slave timer count within one period of the master.
5.18.3.1 6Steps six-step commutation
Example directory: projects/n32g033_EVAL/examples/TIM/6Steps/
enable clocks and configure 6 complementary pins→set the time base and three compare values→open the commutation interrupt and main output→raise commutation events on SysTick
| Item | Source analysis |
|---|---|
| Function | TIM1 produces a six-step commutation waveform through 3 complementary outputs in frozen compare mode; a COM event every 100 ms advances one commutation step. |
| Source files | src/main.c holds RCC, GPIO, NVIC, SysTick, and the main function;src/n32g033_it.c holds SysTick_Handler and TIMx_IRQHandler;inc/main.h and inc/n32g033_it.h are the headers;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4, PA3, and PA5 are CH1, CH2, and CH3 of TIM1, and PA7, PB4, and PB5 are CH1N, CH2N, and CH3N; clock: TIM1_CLK=64 MHz, PSC=0, AR=4095; mode: channel compare frozen, automatic output enable on; dead time: DeadTime=1, break disabled; interrupt: TIM1 COM event interrupt with preemption priority 1. |
| Program and data path | main -> RCC_Configuration opens TIM1 and 6 GPIO clocks -> GPIO_Configuration sets the 6 pins to alternate push-pull -> the main function sets the time base, three compare values, and BDTR -> TIM_Enable and TIM_EnableCtrlPwmOutputs open the outputs -> SysTick_Handler raises a COM event every 100 ms -> TIMx_IRQHandler switches the channel states by the step variable. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_InitBkdtStruct, TIM_ConfigBkdt, TIM_ConfigInt, TIM_GenerateEvent, TIM_Enable, TIM_EnableCtrlPwmOutputs |
| Verification | Build and enter debug mode, then watch the 6 outputs of TIM1 on an oscilloscope or logic analyzer; the waveform advances one commutation step every 100 ms in the order AB, AC, BC, BA, CA, CB. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the system clock is HSI with SYS_CLK=64 MHz; the example does not enable the break input. |
Core-code walkthrough and porting
The example first sets TIM1 to frozen compare mode and writes the three channel compare values, then raises a COM event on SysTick and switches the channel states in the interrupt.
Data path: RCC_Configuration opens the TIM1 and GPIO clocks -> GPIO_Configuration configures the 6 alternate pins -> main sets the time base and three compare values and writes BDTR -> TIM_EnableCtrlPwmOutputs opens the main output -> SysTick_Handler raises a COM event -> TIMx_IRQHandler switches the channels by step
1. The time base sets the commutation pace. The counter runs from 0 to 4095 and rolls over, so one period determines the pace of the commutation event.
/* Time Base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_TimeBaseStructure.Period = 4095;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.RepetCnt = 0;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
Keep the product of Prescaler and Period unchanged to hold the commutation frequency; changing Period also changes the valid range of the compare values.
2. The three channels use frozen compare mode and the compare values are reference only. In frozen mode a compare match does not change the output, and the channel state is fully software controlled.
/* Channel 1, 2 and 3 Configuration in PWM mode */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_TIMING;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.OutputNState = TIM_OUTPUT_NSTATE_ENABLE;
TIM_OCInitStructure.Pulse = 2047;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_OCInitStructure.OCNPolarity = TIM_OCN_POLARITY_HIGH;
TIM_OCInitStructure.OCIdleState = TIM_OC_IDLE_STATE_SET;
TIM_OCInitStructure.OCNIdleState = TIM_OCN_IDLE_STATE_RESET;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
TIM_OCInitStructure.Pulse = 1023;
TIM_InitOc2(TIMx, &TIM_OCInitStructure);
TIM_OCInitStructure.Pulse = 511;
TIM_InitOc3(TIMx, &TIM_OCInitStructure);
/* Automatic Output enable, Break, dead time and lock configuration*/
TIM_InitBkdtStruct(&TIM_BDTRInitStructure);
TIM_BDTRInitStructure.OSSRState = TIM_OSSR_STATE_ENABLE;
TIM_BDTRInitStructure.OSSIState = TIM_OSSI_STATE_ENABLE;
TIM_BDTRInitStructure.LOCKLevel = TIM_LOCK_LEVEL_OFF;
TIM_BDTRInitStructure.DeadTime = 1;
TIM_BDTRInitStructure.Break = TIM_BREAK_IN_DISABLE;
TIM_BDTRInitStructure.AutomaticOutput = TIM_AUTO_OUTPUT_ENABLE;
TIM_ConfigBkdt(TIMx, &TIM_BDTRInitStructure);
The channel count follows the number of commutation steps; when the channel mapping changes, update the pins in GPIO_Configuration too.
3. Enable the counter and the COM interrupt and open the main output. The complementary pins drive only while the main output enable bit is set.
/*TIM1 Capture Compare Preload Controller Enable*/
TIM_EnableCapCmpPreloadControl(TIMx, ENABLE);
/* interrupt Enable */
TIM_ConfigInt(TIMx, TIM_INT_COM, ENABLE);
/* TIM1 counter enable */
TIM_Enable(TIMx, ENABLE);
/* Main Output Enable */
TIM_EnableCtrlPwmOutputs(TIMx, ENABLE);
4. Raise the COM event in software and advance commutation in the interrupt. SysTick raises a COM event every 100 ms, and the interrupt rewrites the channel states by step.
void SysTick_Handler(void)
{
/* Generate TIM1 COM event by software */
TIM_GenerateEvent(TIMx, TIM_EVT_SRC_COM);
}
void TIMx_IRQHandler(void)
{
/* Clear TIMx COM pending bit */
TIM_ClrIntPendingBit(TIMx, TIM_INT_COM);
if (step == 1)
{
/* Next step: Step 2 Configuration ---------------------------- */
/* Channel3 configuration */
TIM_EnableCapCmpCh(TIMx, TIM_CH_3, TIM_CAP_CMP_DISABLE);
TIM_EnableCapCmpChN(TIMx, TIM_CH_3, TIM_CAP_CMP_N_DISABLE);
/* Channel1 configuration */
TIM_SelectOcMode(TIMx, TIM_CH_1, TIM_OCMODE_PWM1);
TIM_EnableCapCmpCh(TIMx, TIM_CH_1, TIM_CAP_CMP_ENABLE);
TIM_EnableCapCmpChN(TIMx, TIM_CH_1, TIM_CAP_CMP_N_DISABLE);
/* Channel2 configuration */
TIM_SelectOcMode(TIMx, TIM_CH_2, TIM_OCMODE_PWM1);
TIM_EnableCapCmpCh(TIMx, TIM_CH_2, TIM_CAP_CMP_DISABLE);
TIM_EnableCapCmpChN(TIMx, TIM_CH_2, TIM_CAP_CMP_N_ENABLE);
step++;
}
Replace the step branches with a commutation table lookup to port this to any number of steps; the event source can also move to another time base.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.2 ComplementarySignals complementary output and dead time
Example directory: projects/n32g033_EVAL/examples/TIM/ComplementarySignals/
enable clocks and configure four complementary pairs and the break pin→compute the period and four compare values→set the dead time and break input→open the counter and main output
| Item | Source analysis |
|---|---|
| Function | TIM1 emits 4 complementary PWM pairs with dead time; when the break input PA2 is active all outputs enter the idle state. |
| Source files | src/main.c holds RCC, GPIO, and the main function;src/n32g033_it.c keeps only the frame;inc/main.h declares the pin and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4, PA3, PA5, and PB3 are CH1-CH4, PA7, PB4, PB5, and PB6 are CH1N-CH4N, and PA2 is the break input; clock: PSC=0, target frequency 16 kHz; mode: PWM2 with output and complementary output both enabled; dead time: DeadTime=11; break: active high with automatic output enable. |
| Program and data path | main -> RCC_Configuration opens TIM1 and 9 GPIO clocks -> GPIO_Configuration configures the 8 complementary pins and the break pin -> computes the period and four compare values for 16 kHz -> TIM_InitOc1 through TIM_InitOc4 write the four channels -> TIM_ConfigBkdt writes the dead time and break -> TIM_BreakInputSourceEnable enables the break input -> opens the counter and the main output. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_InitOc4, TIM_InitBkdtStruct, TIM_ConfigBkdt, TIM_BreakInputSourceEnable, TIM_Enable, TIM_EnableCtrlPwmOutputs |
| Verification | Watch the four complementary pairs of TIM1 on an oscilloscope; four complementary PWM pairs appear while PA2 is low and vanish while PA2 is high. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the four channel duty cycles are 50%, 25%, 12.5%, and 12.5%. |
Core-code walkthrough and porting
The example computes the period and channel compare values for a 16 kHz target, then adds the dead time and break, and finally lets the break input control the outputs.
Data path: main computes TimerPeriod and the four compare values -> TIM_InitTimeBase writes the time base -> TIM_InitOc1 through TIM_InitOc4 write the four channels -> TIM_ConfigBkdt writes the dead time and break -> TIM_BreakInputSourceEnable enables break -> TIM_EnableCtrlPwmOutputs opens the output
1. Compute the period and the four compare values first. The duty is converted from a percentage to a compare value, and channel 4 uses the same 12.5% as channel 3.
/* Compute the value to be set in AR register to generate signal frequency at x hz */
TimerPeriod = (SystemCoreClock / 16000) - 1;
/* Compute CCDAT1 value to generate a duty cycle at 50% for channel 1 */
Channel1Pulse = (uint16_t)(((uint32_t)5 * (TimerPeriod - 1)) / 10);
/* Compute CCDAT2 value to generate a duty cycle at 25% for channel 2 */
Channel2Pulse = (uint16_t)(((uint32_t)25 * (TimerPeriod - 1)) / 100);
/* Compute CCDAT3 value to generate a duty cycle at 12.5% for channel 3 */
Channel3Pulse = (uint16_t)(((uint32_t)125 * (TimerPeriod - 1)) / 1000);
/* Compute CCDAT4 value to generate a duty cycle at 12.5% for channel 3 */
Channel4Pulse = (uint16_t)(((uint32_t)125 * (TimerPeriod - 1)) / 1000);
When the target frequency changes, replace only the divisor in SystemCoreClock / 16000 and the compare values scale with it.
2. Configure the time base and the four channels together and set the idle level by polarity. The four channels share one structure and differ only in Pulse.
/* Time Base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_TimeBaseStructure.Period = TimerPeriod;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.RepetCnt = 0;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
/* Channel 1, 2 and 3 Configuration in PWM mode */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM2;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.OutputNState = TIM_OUTPUT_NSTATE_ENABLE;
TIM_OCInitStructure.Pulse = Channel1Pulse;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_LOW;
TIM_OCInitStructure.OCNPolarity = TIM_OCN_POLARITY_LOW;
TIM_OCInitStructure.OCIdleState = TIM_OC_IDLE_STATE_SET;
TIM_OCInitStructure.OCNIdleState = TIM_OCN_IDLE_STATE_RESET;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
TIM_OCInitStructure.Pulse = Channel2Pulse;
TIM_InitOc2(TIMx, &TIM_OCInitStructure);
TIM_OCInitStructure.Pulse = Channel3Pulse;
TIM_InitOc3(TIMx, &TIM_OCInitStructure);
TIM_OCInitStructure.Pulse = Channel4Pulse;
TIM_InitOc4(TIMx, &TIM_OCInitStructure);
Keep only the channels you need when fewer than four are used, and leave the unused channels uninitialized.
3. Configure the dead time, break, and main output together. The dead-time count and break polarity go into BDTR, and TIM_BreakInputSourceEnable then opens the break source.
/* Automatic Output enable, Break, dead time and lock configuration*/
TIM_InitBkdtStruct(&TIM_BDTRInitStructure);
TIM_BDTRInitStructure.OSSRState = TIM_OSSR_STATE_ENABLE;
TIM_BDTRInitStructure.OSSIState = TIM_OSSI_STATE_ENABLE;
TIM_BDTRInitStructure.LOCKLevel = TIM_LOCK_LEVEL_OFF;
TIM_BDTRInitStructure.DeadTime = 11;
TIM_BDTRInitStructure.Break = TIM_BREAK_IN_ENABLE;
TIM_BDTRInitStructure.BreakPolarity = TIM_BREAK_POLARITY_HIGH;
TIM_BDTRInitStructure.AutomaticOutput = TIM_AUTO_OUTPUT_ENABLE;
TIM_ConfigBkdt(TIMx, &TIM_BDTRInitStructure);
TIM_BreakInputSourceEnable(TIMx,TIM_BREAK_IOM1,TIM_BREAK_IOM_COMP_POLARITY_NONINVERT,ENABLE);
/* TIMx counter enable */
TIM_Enable(TIMx, ENABLE);
/* Main Output Enable */
TIM_EnableCtrlPwmOutputs(TIMx, ENABLE);
Change the break polarity to active low for a low-level protection circuit and set the dead time to the switching time of the power devices.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.3 DMA update the duty by DMA
Example directory: projects/n32g033_EVAL/examples/TIM/DMA/
enable clocks and configure the complementary pins and DMA→compute the period and three duty values→set the channel and update DMA request→rewrite the compare value by DMA on each update event
| Item | Source analysis |
|---|---|
| Function | TIM1 emits CH3 and CH3N as a complementary pair, and circular DMA rewrites the compare value every 6 update events. |
| Source files | src/main.c holds RCC, GPIO, DMA_Configuration, and the main function;src/n32g033_it.c keeps only the frame;inc/main.h declares the pin and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA5 is CH3 and PB3 is CH3N; clock: PSC=0, target frequency 8 kHz; mode: PWM1 with repetition counter RepetCnt=5; DMA: DMA_CH1 in circular mode, moving 3 words to CCDAT3 each round; trigger: TIM1 update event with the request remapped to DMA_REMAP_TIM1_UP. |
| Program and data path | main -> RCC_Configuration opens the TIM1, GPIO, and DMA clocks -> DMA_Configuration sets up DMA_CH1 -> writes SRC_Buffer with 50%, 37.5%, and 25% -> sets the time base and CH3 and opens the update DMA request -> TIM_EnableDma and TIM_Enable start counting and output -> on each update event DMA moves one compare value from SRC_Buffer to CCDAT3. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc3, TIM_EnableDma, TIM_Enable, TIM_EnableCtrlPwmOutputs, DMA_StructInit, DMA_Init, DMA_RequestRemap, DMA_EnableChannel |
| Verification | Watch CH3 and CH3N on an oscilloscope; the duty switches to the next value every 6 periods. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the DMA buffer size of 3 and the repetition count of 5 together set how many periods pass before the rewrite. |
Core-code walkthrough and porting
The example uses circular DMA to move one compare value into CCDAT3 on each update event, so the duty changes without CPU intervention.
Data path: main writes three duty values into SRC_Buffer -> TIM_InitTimeBase writes the time base -> TIM_InitOc3 writes channel 3 -> TIM_EnableDma opens the update request -> the update event triggers DMA -> DMA_Configuration moves SRC_Buffer into CCDAT3
1. Compute the three compare values from the duty first. The three values load the buffer in turn and DMA moves one per round.
/* Compute the value to be set in AR register to generate signal frequency at x hz */
TimerPeriod = (SystemCoreClock / 8000) - 1;
/* Compute CCDAT1 value to generate a duty cycle at 50% */
SRC_Buffer[0] = (uint16_t)(((uint32_t)5 * (TimerPeriod - 1)) / 10);
/* Compute CCDAT1 value to generate a duty cycle at 37.5% */
SRC_Buffer[1] = (uint16_t)(((uint32_t)375 * (TimerPeriod - 1)) / 1000);
/* Compute CCDAT1 value to generate a duty cycle at 25% */
SRC_Buffer[2] = (uint16_t)(((uint32_t)25 * (TimerPeriod - 1)) / 100);
A smaller repetition count rewrites more often, and the buffer length sets the number of duty levels in one round.
2. Open the update DMA request after the time base and channel 3. RepetCnt=5 makes one DMA transfer fire every 6 update events.
/* Time Base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_TimeBaseStructure.Period = TimerPeriod;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.RepetCnt = 5;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
/* Channel 3 Configuration in PWM mode */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM1;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.OutputNState = TIM_OUTPUT_NSTATE_ENABLE;
TIM_OCInitStructure.Pulse = SRC_Buffer[0];
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_OCInitStructure.OCNPolarity = TIM_OCN_POLARITY_HIGH;
TIM_OCInitStructure.OCIdleState = TIM_OC_IDLE_STATE_SET;
TIM_OCInitStructure.OCNIdleState = TIM_OCN_IDLE_STATE_RESET;
TIM_InitOc3(TIMx, &TIM_OCInitStructure);
/* TIMx Update DMA Request enable */
TIM_EnableDma(TIMx, TIM_DMA_UPDATE, ENABLE);
/* TIMx counter enable */
TIM_Enable(TIMx, ENABLE);
/* Main Output Enable */
TIM_EnableCtrlPwmOutputs(TIMx, ENABLE);
Replace TIM_DMA_UPDATE with a compare-channel DMA request to rewrite on each compare match instead.
3. Point the DMA channel at CCDAT3 and request the remap. The destination is &TIMx->CCDAT3, and in circular mode the buffer wraps to the start automatically.
void DMA_Configuration(void)
{
DMA_InitType DMA_InitStructure;
/* DMA Channel1 Config */
DMA_DeInit(DMA_CH1);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.PeriphAddr = (uint32_t)&TIMx->CCDAT3;
DMA_InitStructure.MemAddr = (uint32_t)SRC_Buffer;
DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;
DMA_InitStructure.BufSize = 3;
DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;
DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_WORD;
DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;
DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
DMA_Init(DMA_CH1, &DMA_InitStructure);
DMA_RequestRemap(DMA_REMAP_TIM1_UP,DMA,DMA_CH1,ENABLE);
/* DMA Channel1 enable */
DMA_EnableChannel(DMA_CH1, ENABLE);
}
When moving to another channel, change the DMA destination register and the request remap source accordingly and re-check the transfer data width.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.4 DMABurst DMA burst transfer
Example directory: projects/n32g033_EVAL/examples/TIM/DMABurst/
enable clocks and configure the channel pin and DMA→set the time base and channel 1 output→set the DMA burst base address and length→move 8 register values in one update event
| Item | Source analysis |
|---|---|
| Function | TIM1 emits CH1, and one DMA burst rewrites the period and duty together in a single update event. |
| Source files | src/main.c holds RCC, GPIO, DMA_Configuration, and the main function;src/n32g033_it.c keeps only the frame;inc/main.h declares the pin and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4 is CH1; clock: PSC=0 with an initial AR=0xFFFF; mode: PWM1 with an initial duty of 0x8FFF; DMA: DMA_CH1 in normal mode moving 8 words at once; trigger: TIM1 update event with a burst length of 8 transfers and a base address of CAPCMPDAT1. |
| Program and data path | DMA_Configuration points the DMA destination at the TIM1 DADDR -> TIM_ConfigDma sets the burst base address and length -> TIM_EnableDma opens the update request -> the update event moves 8 words from SRC_Buffer to the TIM1 registers -> clears the flag after the transfer -> setting DmaAgain=1 in debug triggers it again. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_ConfigDma, TIM_EnableDma, TIM_Enable, TIM_EnableCtrlPwmOutputs, DMA_Init, DMA_GetFlagStatus, DMA_ClearFlag |
| Verification | Watch CH1 on an oscilloscope; after the first period the waveform follows the period and duty moved in by DMA. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; setting DmaAgain to 1 in debug moves the values again. |
Core-code walkthrough and porting
The example uses burst mode so that one DMA transfer writes 8 words in a row into the TIM1 register window, refreshing the period, six compare values, prescaler, and repetition counter at once.
Data path: main sets the time base and channel 1 -> TIM_ConfigDma sets the burst base address and length -> TIM_EnableDma opens the update request -> the update event triggers the DMA burst -> DMA_Configuration moves the 8 words of SRC_Buffer to DADDR -> clears the flag when the transfer ends
1. Establish the time base and channel 1 output first. The initial AR and compare value set the first period waveform.
/* Time Base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_TimeBaseStructure.Period = 0xFFFF;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
/* Channel 3 Configuration in PWM mode */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM1;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = 0x8FFF;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
The first word of SRC_Buffer maps to CCDAT1 and the last word maps to AR, so changing the buffer contents changes the register order written.
2. Set the burst base address, length, and update DMA request and wait for the transfer to end. The burst length of 8 matches the buffer length, and the transfer-complete flag marks the end of one move.
/* TIMx DADDR Base register and DMA Burst Length Config */
TIM_ConfigDma(TIMx, TIM_DMABASE_CAPCMPDAT1, TIM_DMABURST_LENGTH_8TRANSFERS);
/* TIMx DMA Update enable */
TIM_EnableDma(TIMx, TIM_DMA_UPDATE, ENABLE);
/* TIMx enable */
TIM_Enable(TIMx, ENABLE);
/* TIMx PWM Outputs Enable */
TIM_EnableCtrlPwmOutputs(TIMx, ENABLE);
/* DMA Channel1 enable */
DMA_EnableChannel(DMA_CH1, ENABLE);
/* Wait until DMA Channel1 end of Transfer */
while (!DMA_GetFlagStatus(DMA_FLAG_TC1, DMA))
{
}
DMA_ClearFlag(DMA_FLAG_GL1 | DMA_FLAG_TC1 | DMA_FLAG_HT1 | DMA_FLAG_TE1, DMA);
Switch normal mode to circular mode to write several parameter sets in turn and refresh the buffer in an interrupt when needed.
3. Point the DMA destination at DADDR and request the remap. Each move writes word by word from SRC_Buffer into the TIM1 register window.
void DMA_Configuration(void)
{
DMA_InitType DMA_InitStructure;
/* DMA1 Channel5 Config */
DMA_DeInit(DMA_CH1);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.PeriphAddr = (uint32_t)&TIMx->DADDR;
DMA_InitStructure.MemAddr = (uint32_t)SRC_Buffer;
DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;
DMA_InitStructure.BufSize = 8;
DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;
DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_WORD;
DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.CircularMode = DMA_MODE_NORMAL;
DMA_InitStructure.Priority = DMA_PRIORITY_HIGH;
DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
DMA_Init(DMA_CH1, &DMA_InitStructure);
DMA_RequestRemap(DMA_REMAP_TIM1_UP,DMA,DMA_CH1,ENABLE);
}
When switching to another timer, update the request remap source and destination and check that the burst base address is still inside the usable window.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.5 ExtTrigger_Synchro external-trigger cascade synchronization
Example directory: projects/n32g033_EVAL/examples/TIM/ExtTrigger_Synchro/
enable clocks and configure the master and slave pins→set the master timer to toggle and emit a trigger→use the external input as a gate→count the slave timer under the master gate
| Item | Source analysis |
|---|---|
| Function | TIM1 CH2 works as an external gate input that gates both TIM1 CH1 and the slave timer TIM3. |
| Source files | src/main.c holds RCC, GPIO, and the main function;src/n32g033_it.c keeps only the frame;inc/main.h declares the master/slave timer and pin macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4 is TIM1 CH1, PA3 is TIM1 CH2, and PA6 is TIM3 CH1; clock: PSC=2, Period=73; slave mode: TIM1 and TIM3 are both gated; trigger: TIM1 selects TI2FP2 as the input trigger with master/slave mode on; trigger output: TIM1 enables the event as the trigger source. |
| Program and data path | main -> RCC_Configuration opens the TIM1, TIM3, and GPIO clocks -> sets the time base of both timers -> TIM_InitOc1 sets TIM1 CH1 to toggle -> TIM_ICInit captures on CH2 and provides TI2FP2 -> TIM_SelectSlaveMode sets gated mode -> TIM_SelectMasterSlaveMode and TIM_SelectOutputTrig -> TIM3 is gated by IN_TR0 -> opens both timers and the main output. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_InitIcStruct, TIM_ICInit, TIM_SelectInputTrig, TIM_SelectSlaveMode, TIM_SelectMasterSlaveMode, TIM_SelectOutputTrig, TIM_EnableCtrlPwmOutputs, TIM_Enable |
| Verification | Watch TIM1 CH1 and TIM3 CH1 on an oscilloscope; the counter runs while TIM1 CH2 is high and stops while it is low. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; TIM1 is the master and TIM3 is the slave; both timers share the same time-base parameters. |
Core-code walkthrough and porting
The example uses TIM1 CH2 as an external gate input so that TIM1 and TIM3 count together while the gate is active, synchronizing two timers from one external signal.
Data path: main sets the time base of both timers -> TIM_InitOc1 sets TIM1 CH1 to toggle -> TIM_ICInit takes TI2FP2 on CH2 -> TIM_SelectSlaveMode gates TIM1 -> TIM_SelectOutputTrig uses the enable event as the trigger source -> TIM3 is gated by IN_TR0 -> TIM_Enable starts both timers
1. The two timers share one set of time-base parameters. Set TIM1 first, then reuse the same structure to write TIM3.
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 73;
TIM_TimeBaseStructure.Prescaler = 2;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 73;
TIM_InitTimeBase(TIMy, &TIM_TimeBaseStructure);
The slave can use a different Period from the master to get a different output frequency under the same gate.
2. The master takes the external trigger and emits a trigger output. CH2 supplies TI2FP2 through input capture, and with master/slave mode on the enable event becomes the trigger output.
/* Master Configuration in Toggle Mode */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_TOGGLE;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = 64;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
/* TIMx Input Capture Configuration */
TIM_InitIcStruct(&TIM_ICInitStructure);
TIM_ICInitStructure.Channel = TIM_CH_2;
TIM_ICInitStructure.ICPolarity = TIM_IC_POLARITY_RISING;
TIM_ICInitStructure.ICSelection = TIM_IC_SELECTION_DIRECTTI;
TIM_ICInitStructure.ICPrescaler = TIM_IC_PSC_DIV1;
TIM_ICInitStructure.ICFilter = 0;
TIM_ICInit(TIMx, &TIM_ICInitStructure);
/* TIMx Input trigger configuration: External Trigger connected to TI2 */
TIM_SelectInputTrig(TIMx, TIM_TRIG_SEL_TI2FP2);
TIM_SelectSlaveMode(TIMx, TIM_SLAVE_MODE_GATED);
/* Select the Master Slave Mode */
TIM_SelectMasterSlaveMode(TIMx, TIM_MASTER_SLAVE_MODE_ENABLE);
/* Master Mode selection: TIMx */
TIM_SelectOutputTrig(TIMx, TIM_TRGO_SRC_ENABLE);
Change the external trigger from TI2FP2 to ETR to use a plain external pin as the gate input.
3. The slave is gated by the internal trigger and both are enabled last. TIM3 selects IN_TR0 as its trigger source and stays in the same gated mode as the master.
/* Slaves Configuration: Toggle Mode */
TIM_OCInitStructure.OCMode = TIM_OCMODE_TOGGLE;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_InitOc1(TIMy, &TIM_OCInitStructure);
/* Slave Mode selection: TIMy */
TIM_SelectInputTrig(TIMy, TIM_TRIG_SEL_IN_TR0);
TIM_SelectSlaveMode(TIMy, TIM_SLAVE_MODE_GATED);
/* TIM1 TIM3 Main Output Enable */
TIM_EnableCtrlPwmOutputs(TIMx, ENABLE);
TIM_EnableCtrlPwmOutputs(TIMy, ENABLE);
/* TIM enable counter */
TIM_Enable(TIMx, ENABLE);
TIM_Enable(TIMy, ENABLE);
To cascade a third timer, make the slave the master of the next one and keep the same internal trigger line as the source.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.6 InputCapture frequency measurement by input capture
Example directory: projects/n32g033_EVAL/examples/TIM/InputCapture/
enable clocks and configure the capture input and helper output pins→set up rising-edge input capture→enable the capture interrupt and start counting→take the difference of two captures for the frequency
| Item | Source analysis |
|---|---|
| Function | TIM4 CH2 captures rising edges and computes the input frequency, while software can produce two rising edges on PA3. |
| Source files | src/main.c holds RCC, GPIO, NVIC, GenTwoRisingEdge, and the main function;src/n32g033_it.c holds TIM4_IRQHandler;inc/main.h declares the pin and frequency variables;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA1 is the TIM4 CH2 input and PA3 is a plain push-pull output; clock: PSC=0; capture: CH2 mapped to the rising edge directly with no filter or prescaler; interrupt: capture/compare 2 interrupt with preemption priority 1. |
| Program and data path | main -> RCC_Configuration opens the TIM4 and GPIO clocks -> GPIO_Configuration configures CH2 and PA3 -> TIM_ICInit sets CH2 rising-edge capture -> clears the flag and enables the capture interrupt -> starts counting -> the main loop calls GenTwoRisingEdge -> TIM4_IRQHandler reads the capture twice and computes the frequency. |
| Main APIs | TIM_InitIcStruct, TIM_ICInit, TIM_ClrIntPendingBit, TIM_ConfigInt, TIM_Enable, TIM_GetCap2, TIM_GetIntStatus |
| Verification | Connect PA3 to PA1 and add TIM4Freq to the watch window; in debug set gOnePulsEn to 1 and read the frequency after PA3 produces two rising edges. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the system clock is HSI with SYS_CLK=64 MHz; PA3 must be connected to PA1. |
Core-code walkthrough and porting
The example captures rising edges on CH2 and converts the difference of two captures into a frequency; for easy checking, software can also produce a pair of square-wave edges on PA3.
Data path: main -> TIM_ICInit sets CH2 rising-edge capture -> TIM_ConfigInt enables the capture interrupt -> TIM_Enable starts counting -> the main loop GenTwoRisingEdge produces an edge on PA3 -> TIM4_IRQHandler reads TIM_GetCap2 twice -> the difference becomes TIM4Freq
1. Set up CH2 rising-edge capture and enable the capture interrupt. Direct mapping with no filter keeps the capture equal to the counter value.
TIM_InitIcStruct(&TIM_ICInitStructure);
TIM_ICInitStructure.Channel = TIM_CH_2;
TIM_ICInitStructure.ICPolarity = TIM_IC_POLARITY_RISING;
TIM_ICInitStructure.ICSelection = TIM_IC_SELECTION_DIRECTTI;
TIM_ICInitStructure.ICPrescaler = TIM_IC_PSC_DIV1;
TIM_ICInitStructure.ICFilter = 0x0;
TIM_ICInit(TIMx, &TIM_ICInitStructure);
TIM_ClrIntPendingBit(TIMx,TIM_INT_UPDATE);
TIM_ClrIntPendingBit(TIMx,TIM_INT_CC2);
/* Enable the CC2 Interrupt Request */
TIM_ConfigInt(TIMx, TIM_INT_CC2, ENABLE);
/* TIM enable counter */
TIM_Enable(TIMx, ENABLE);
Change the capture polarity to measure falling edges, and add filtering to suppress jitter on a noisy input.
2. Configure the pins and the helper that produces square-wave edges in software. PA3 is a plain output and GenTwoRisingEdge toggles the level twice when enabled.
void GPIO_Configuration(void)
{
GPIO_InitType GPIO_InitStructure;
GPIO_InitStruct(&GPIO_InitStructure);
/* GPIOx Configuration: Pin of TIMx */
GPIO_InitStructure.Pin = TIMx_CH2_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;
GPIO_InitStructure.GPIO_Alternate = TIMx_CH2_GPIO_AF;
GPIO_InitPeripheral(TIMx_CH2_GPIO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.Pin = GPIO_PIN_3;
GPIO_InitStructure.GPIO_Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);
}
void GenTwoRisingEdge(void)
{
if (gOnePulsEn)
{
gOnePulsEn = 0;
GPIO_SetBits(GPIOA, GPIO_PIN_3);
{
volatile uint32_t i = 0;
while (i++ < 10)
;
}
GPIO_ResetBits(GPIOA, GPIO_PIN_3);
{
volatile uint32_t i = 0;
while (i++ < 10)
;
}
GPIO_SetBits(GPIOA, GPIO_PIN_3);
{
volatile uint32_t i = 0;
while (i++ < 10)
;
}
GPIO_ResetBits(GPIOA, GPIO_PIN_3);
}
}
Use any idle pin in place of PA3 for self-test, or feed the measured signal directly from an external source.
3. Take the difference of two captures in the interrupt. The difference of two adjacent captures is the number of counts in one signal period.
void TIM4_IRQHandler(void)
{
if (TIM_GetIntStatus(TIMx, TIM_INT_CC2) == SET)
{
TIMxEnterIrqCnt++;
/* Clear TIMx Capture compare interrupt pending bit */
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC2);
if (CaptureNumber == 0)
{
/* Get the Input Capture value */
IC3ReadValue1 = TIM_GetCap2(TIMx);
CaptureNumber = 1;
}
else if (CaptureNumber == 1)
{
/* Get the Input Capture value */
IC3ReadValue2 = TIM_GetCap2(TIMx);
/* Capture computation */
if (IC3ReadValue2 > IC3ReadValue1)
{
Capture = (IC3ReadValue2 - IC3ReadValue1);
}
else
{
Capture = ((0xFFFF - IC3ReadValue1) + IC3ReadValue2);
}
/* Frequency computation */
TIMxFreq = (uint32_t)(SystemCoreClock) / Capture;
CaptureNumber = 0;
}
}
}
Accuracy is best when the measured frequency is below half the counting frequency; near or above it, lower the input division or use the capture prescaler first.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.7 OCActive output compare active
Example directory: projects/n32g033_EVAL/examples/TIM/OCActive/
enable clocks and configure the four output pins→compute the prescaler and set the time base→set the four channels to compare active→open the main output and the counter
| Item | Source analysis |
|---|---|
| Function | The four channels of TIM3 output the active level once the counter reaches their compare values. |
| Source files | src/main.c holds RCC, GPIO, and the main function;src/n32g033_it.c keeps only the frame;inc/main.h declares the four channel pin macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA0, PA1, PB0, and PB1 are CH1-CH4; clock: PSC sets the counting frequency to about 2 MHz with AR=65535; mode: output compare active with preload off; compare values: CC1 through CC4 are 1000, 500, 250, and 125. |
| Program and data path | main -> RCC_Configuration opens the TIM3 and GPIO clocks -> computes the prescaler -> sets the time base -> configures each channel as active and turns preload off -> TIM_ConfigArPreload -> TIM_EnableCtrlPwmOutputs and TIM_Enable open the output and counting. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_InitOc4, TIM_ConfigOc1Preload, TIM_ConfigOc4Preload, TIM_ConfigArPreload, TIM_EnableCtrlPwmOutputs, TIM_Enable |
| Verification | Watch the four channels on an oscilloscope; each channel switches to the active level when the counter reaches its compare value. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the four compare values set the switch timing of the four channels. |
Core-code walkthrough and porting
The example configures all four channels as compare active, so a channel switches to the active level when the counter reaches its compare value, producing edges with different delays.
Data path: main computes the prescaler -> TIM_InitTimeBase writes the time base -> TIM_InitOc1 through TIM_InitOc4 write the four compare values -> TIM_ConfigOc1Preload turns preload off -> TIM_EnableCtrlPwmOutputs opens the output -> TIM_Enable starts counting
1. The prescaler drops the counting frequency to about 2 MHz. AR takes the full range and the compare values set the delays directly.
/* Compute the prescaler value */
PrescalerValue = (uint16_t)((SystemCoreClock)/ 2000000) - 1;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 65535;
TIM_TimeBaseStructure.Prescaler = PrescalerValue;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
Changing the prescaler changes the delay of every channel in proportion.
2. Channel 1 is set to compare active with preload off. With preload off the compare value takes effect immediately.
/* Output Compare Active Mode configuration: Channel1 */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_ACTIVE;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR1_Val;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc1Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
3. The other three channels follow the same mode with their own compare values. The four channels differ only in the compare value.
/* Output Compare Active Mode configuration: Channel2 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR2_Val;
TIM_InitOc2(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc2Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
/* Output Compare Active Mode configuration: Channel3 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR3_Val;
TIM_InitOc3(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc3Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
/* Output Compare Active Mode configuration: Channel4 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR4_Val;
TIM_InitOc4(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc4Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
TIM_ConfigArPreload(TIMx, ENABLE);
TIM_EnableCtrlPwmOutputs(TIMx,ENABLE);
/* TIM2 enable counter */
TIM_Enable(TIMx, ENABLE);
Switch the mode to PWM to get duty-cycle outputs directly, scaling the compare values the same way.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.8 OCInactive output compare inactive
Example directory: projects/n32g033_EVAL/examples/TIM/OCInactive/
enable clocks and configure the four plain output pins→set the time base and four compare values→enable the four channel compare interrupts→pull the matching IO low in the interrupt
| Item | Source analysis |
|---|---|
| Function | When the compare interrupt of one of the four TIM3 channels fires, software pulls PA1 through PA4 low. |
| Source files | src/main.c holds RCC, GPIO, NVIC, and the main function;src/n32g033_it.c holds TIMx_IRQHandler;inc/main.h declares the interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA1, PA2, PA3, and PA4 are plain push-pull outputs; clock: PSC sets the counting frequency to about 2 MHz with AR=1999; mode: output compare inactive with preload off; interrupt: all four channel compare interrupts with preemption priority 1. |
| Program and data path | main -> RCC_Configuration opens the TIM3 and GPIO clocks -> GPIO_Configuration sets PA1 through PA4 as outputs -> sets the time base and four channels -> TIM_ConfigInt enables the four compare interrupts -> sets the four IOs high first -> TIM_Enable starts counting -> the interrupt pulls the matching IO low by channel. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_InitOc4, TIM_ConfigInt, TIM_Enable, TIM_GetIntStatus, TIM_ClrIntPendingBit, GPIO_ResetBits |
| Verification | Watch PA1 through PA4 on an oscilloscope or logic analyzer; the matching IO is pulled low after a channel enters its compare interrupt. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the four pins are plain IOs and do not use the alternate timer output. |
Core-code walkthrough and porting
The example does not use the timer pin output; it writes the IOs in software inside the compare interrupts of the four channels, showing how a compare event generates a programmable timed edge.
Data path: main computes the prescaler -> TIM_InitTimeBase writes the time base -> TIM_InitOc1 through TIM_InitOc4 write the four compare values -> TIM_ConfigInt enables the compare interrupts -> TIM_Enable starts counting -> TIMx_IRQHandler calls GPIO_ResetBits by channel
1. The prescaler and time base fix the counting frequency first. AR is 1999 and the compare values set when each channel fires.
/* Compute the prescaler value */
PrescalerValue = (uint16_t)((SystemCoreClock)/ 2000000) - 1;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 1999;
TIM_TimeBaseStructure.Prescaler = PrescalerValue;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
2. The four channels are set to compare inactive and the compare interrupts open. The compare event itself does not drive a pin, it only raises an interrupt.
/* Output Compare Active Mode configuration: Channel1 */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_INACTIVE;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR1_Val;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc1Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
/* Output Compare Active Mode configuration: Channel2 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR2_Val;
TIM_InitOc2(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc2Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
/* Output Compare Active Mode configuration: Channel3 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR3_Val;
TIM_InitOc3(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc3Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
/* Output Compare Active Mode configuration: Channel4 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR4_Val;
TIM_InitOc4(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc4Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
TIM_ConfigArPreload(TIMx, ENABLE);
/* TIM IT enable */
TIM_ConfigInt(TIMx, TIM_INT_CC1 | TIM_INT_CC2 | TIM_INT_CC3 | TIM_INT_CC4, ENABLE);
3. Set the IOs high before starting the counter. Software sets the initial level after reset and the compare interrupts pull it low.
/* Set output pins */
GPIO_SetBits(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4);
/* TIM2 enable counter */
TIM_Enable(TIMx, ENABLE);
4. Write the IO by channel in the interrupt. Each channel compare interrupt pulls one pin low.
void TIMx_IRQHandler(void)
{
if (TIM_GetIntStatus(TIMx, TIM_INT_CC1) != RESET)
{
/* Clear GTIM2 Capture Compare1 interrupt pending bit*/
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC1);
GPIO_ResetBits(GPIOA, GPIO_PIN_1);
}
else if (TIM_GetIntStatus(TIMx, TIM_INT_CC2) != RESET)
{
/* Clear GTIM2 Capture Compare2 interrupt pending bit*/
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC2);
GPIO_ResetBits(GPIOA, GPIO_PIN_2);
}
else if (TIM_GetIntStatus(TIMx, TIM_INT_CC3) != RESET)
{
/* Clear GTIM2 Capture Compare3 interrupt pending bit*/
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC3);
GPIO_ResetBits(GPIOA, GPIO_PIN_3);
}
else
{
/* Clear GTIM2 Capture Compare4 interrupt pending bit*/
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC4);
GPIO_ResetBits(GPIOA, GPIO_PIN_4);
}
}
Change the pull-low to a toggle for a symmetric output while the interrupt pace still follows the compare values.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.9 OCToggle output compare toggle
Example directory: projects/n32g033_EVAL/examples/TIM/OCToggle/
enable clocks and configure the four output pins→set the time base and four channels to toggle→open the compare interrupts and start counting→add the increment to the compare value for 50% duty
| Item | Source analysis |
|---|---|
| Function | The four TIM3 channels toggle the output on compare match and add to the compare value in the interrupt, giving a 50% duty. |
| Source files | src/main.c holds RCC, GPIO, NVIC, and the main function;src/n32g033_it.c holds TIMx_IRQHandler;inc/main.h declares the compare values and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA0, PA1, PB0, and PB1 are CH1-CH4; clock: PSC sets the counting frequency to about 8 MHz with AR=65535; mode: output compare toggle with preload off; compare values: CC1 through CC4 are 32768, 16384, 8192, and 4096; interrupt: four channel compare interrupts. |
| Program and data path | main -> RCC_Configuration opens the TIM3 and GPIO clocks -> computes the prescaler -> sets the time base and four channels to toggle -> clears the four interrupt flags -> TIM_ConfigInt enables the compare interrupts -> TIM_EnableCtrlPwmOutputs and TIM_Enable -> the interrupt toggles and adds to the compare value. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_InitOc4, TIM_ClrIntPendingBit, TIM_ConfigInt, TIM_EnableCtrlPwmOutputs, TIM_Enable, TIM_SetCmp1 |
| Verification | Watch the four channels on an oscilloscope; the output toggles on each compare match with a 50% duty. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the four channels toggle at different frequencies. |
Core-code walkthrough and porting
The example lets the output toggle on compare match and adds the same increment in the interrupt, so two adjacent toggles are equally spaced and the duty is 50%.
Data path: main computes the prescaler -> TIM_InitTimeBase writes the time base -> TIM_InitOc1 through TIM_InitOc4 write the four channels -> TIM_ConfigInt enables the compare interrupts -> TIM_Enable starts counting -> TIMx_IRQHandler toggles the output and TIM_SetCmp1 adds to the compare value
1. The prescaler sets the counting frequency to about 8 MHz. AR takes the full range and the compare values set the toggle pace.
/* Compute the prescaler value */
PrescalerValue = (uint16_t)((SystemCoreClock)/ 8000000) - 1;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 65535;
TIM_TimeBaseStructure.Prescaler = PrescalerValue;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
2. Channel 1 is set to toggle with preload off. With preload off the compare value takes effect immediately.
/* Output Compare Toggle Mode configuration: Channel1 */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_TOGGLE;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR1_Val;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_LOW;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc1Preload(TIMx, TIM_OC_PRE_LOAD_DISABLE);
3. Clear the interrupt flags then open the compare interrupts and output. Clearing first avoids a spurious trigger when the interrupt is enabled.
TIM_ClrIntPendingBit(TIMx, TIM_INT_UPDATE);
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC1);
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC2);
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC3);
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC4);
/* TIM IT enable */
TIM_ConfigInt(TIMx, TIM_INT_CC1 | TIM_INT_CC2 | TIM_INT_CC3 | TIM_INT_CC4, ENABLE);
TIM_EnableCtrlPwmOutputs(TIMx, ENABLE);
/* TIM enable counter */
TIM_Enable(TIMx, ENABLE);
4. Toggle in the interrupt and add the same increment to the compare value. Each match advances the compare value by a fixed step, so two toggles are equally spaced.
void TIMx_IRQHandler(void)
{
/* TIMx_CH1 toggling */
if (TIM_GetIntStatus(TIMx, TIM_INT_CC1) != RESET)
{
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC1);
capture = TIM_GetCap1(TIMx);
TIM_SetCmp1(TIMx, capture + CCR1_Val);
}
/* TIMx_CH2 toggling */
if (TIM_GetIntStatus(TIMx, TIM_INT_CC2) != RESET)
{
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC2);
capture = TIM_GetCap2(TIMx);
TIM_SetCmp2(TIMx, capture + CCR2_Val);
}
/* TIMx_CH3 toggling */
if (TIM_GetIntStatus(TIMx, TIM_INT_CC3) != RESET)
{
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC3);
capture = TIM_GetCap3(TIMx);
TIM_SetCmp3(TIMx, capture + CCR3_Val);
}
/* TIM3_CH4 toggling */
if (TIM_GetIntStatus(TIMx, TIM_INT_CC4) != RESET)
{
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC4);
capture = TIM_GetCap4(TIMx);
TIM_SetCmp4(TIMx, capture + CCR4_Val);
}
}
The increment sets the output frequency; a different increment gives a different toggle period.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.10 OnePulse one-pulse output
Example directory: projects/n32g033_EVAL/examples/TIM/OnePulse/
enable clocks and configure the output and trigger input pins→set channel 1 to PWM2 output→set channel 2 rising-edge capture as the trigger→emit one pulse on an external rising edge
| Item | Source analysis |
|---|---|
| Function | A rising edge on TIM4 CH2 triggers CH1 to emit one pulse. |
| Source files | src/main.c holds RCC, GPIO, SendOneTrig, and the main function;src/n32g033_it.c keeps only the frame;inc/main.h declares the pins and the enable variable;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA0 is the CH1 output, PA1 is the CH2 input, and PA3 is a plain push-pull output; clock: PSC sets the counting frequency to about 4 MHz with AR=65535; mode: CH1 is PWM2 in one-pulse mode; trigger: select TI2FP2 with the slave mode set to trigger mode. |
| Program and data path | main -> RCC_Configuration opens the TIM4 and GPIO clocks -> sets the time base and CH1 as PWM2 -> TIM_ICInit sets rising-edge capture on CH2 -> TIM_SelectOnePulseMode selects single pulse -> selects TI2FP2 and the trigger slave mode -> the main loop calls SendOneTrig -> PA3 produces a rising edge that triggers the pulse. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_InitIcStruct, TIM_ICInit, TIM_SelectOnePulseMode, TIM_SelectInputTrig, TIM_SelectSlaveMode |
| Verification | Connect PA3 to PA1 and watch TIM4 CH1 on an oscilloscope; in debug set gSendTrigEn to 1 and each rising edge on PA3 makes CH1 emit one pulse. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the pulse width is the difference between Period and Pulse. |
Core-code walkthrough and porting
The example sets CH1 to PWM2 and selects one-pulse mode, uses a rising edge on CH2 as the trigger source, and emits one fixed-width pulse per trigger edge.
Data path: main sets the time base and CH1 -> TIM_InitOc1 writes PWM2 and the compare value -> TIM_ICInit captures the rising edge on CH2 -> TIM_SelectOnePulseMode selects single pulse -> TIM_SelectInputTrig selects TI2FP2 -> TIM_SelectSlaveMode selects trigger mode -> the main loop SendOneTrig raises a trigger edge on PA3
1. Establish the time base and the PWM2 output of CH1 first. The difference between Pulse and AR sets the one-pulse width.
/* Compute the prescaler value */
PrescalerValue = (uint16_t)((SystemCoreClock) / 4000000) - 1;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 65535;
TIM_TimeBaseStructure.Prescaler = PrescalerValue;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
/* TIMx PWM2 Mode configuration: Channel1 */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM2;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = 16383;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
Change AR to change the pulse width and change Pulse to change the position of the pulse within the period.
2. CH2 captures the rising edge and provides the trigger source. One-pulse mode with the trigger slave mode emits a pulse as soon as the input edge arrives.
/* TIMx configuration in Input Capture Mode */
TIM_InitIcStruct(&TIM_ICInitStructure);
TIM_ICInitStructure.Channel = TIM_CH_2;
TIM_ICInitStructure.ICPolarity = TIM_IC_POLARITY_RISING;
TIM_ICInitStructure.ICSelection = TIM_IC_SELECTION_DIRECTTI;
TIM_ICInitStructure.ICPrescaler = TIM_IC_PSC_DIV1;
TIM_ICInitStructure.ICFilter = 0;
TIM_ICInit(TIMx, &TIM_ICInitStructure);
/* One Pulse Mode selection */
TIM_SelectOnePulseMode(TIMx, TIM_OPMODE_SINGLE);
/* Input Trigger selection */
TIM_SelectInputTrig(TIMx, TIM_TRIG_SEL_TI2FP2);
/* Slave Mode selection: Trigger Mode */
TIM_SelectSlaveMode(TIMx, TIM_SLAVE_MODE_TRIG);
Change the trigger source from TI2FP2 to another trigger line to start the pulse from a different signal.
3. The helper that produces the trigger edge in software. SendOneTrig toggles the level on PA3 when enabled.
void SendOneTrig(void)
{
if (gSendTrigEn)
{
gSendTrigEn = 0;
GPIO_SetBits(GPIOA, GPIO_PIN_3);
{
uint32_t i=0;
while (i++ < 10)
;
}
GPIO_ResetBits(GPIOA, GPIO_PIN_3);
}
}
Drive this helper from a button or a timer for self-test, or supply the trigger edge directly from an external source.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.11 PWM_Input PWM input measurement
Example directory: projects/n32g033_EVAL/examples/TIM/PWM_Input/
enable clocks and configure the capture input and helper output pins→initialize the two-channel PWM input capture→set the reset slave mode and start counting→read both captures in the interrupt for frequency and duty
| Item | Source analysis |
|---|---|
| Function | TIM3 CH2 captures an external PWM, using the CH1 capture for the duty and the CH2 capture for the frequency. |
| Source files | src/main.c holds RCC, GPIO, NVIC, and the main function;src/n32g033_it.c holds TIMx_IRQHandler;inc/main.h declares the pins and result variables;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA1 is the TIM3 CH2 input and PA3 is a plain push-pull output; capture: CH1 falling edge and CH2 rising edge, paired by TIM_ConfigPwmIc;slave mode: reset mode with master/slave mode on; interrupt: capture/compare 2 interrupt. |
| Program and data path | main -> RCC_Configuration opens the TIM3 and GPIO clocks -> GPIO_Configuration configures CH2 and PA3 -> TIM_ConfigPwmIc initializes the two-channel PWM input -> selects TI2FP2 and the reset slave mode -> enables master/slave mode and the counter -> opens the capture interrupt -> the main loop emits a square wave on PA3 -> the interrupt computes the duty and frequency from both captures. |
| Main APIs | TIM_InitIcStruct, TIM_ConfigPwmIc, TIM_SelectInputTrig, TIM_SelectSlaveMode, TIM_SelectMasterSlaveMode, TIM_Enable, TIM_ConfigInt, TIM_GetCap1, TIM_GetCap2 |
| Verification | Connect PA3 to PA1 and add Frequency and DutyCycle to the watch window; after running, read the captured frequency and duty. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; PA3 must be connected to PA1. |
Core-code walkthrough and porting
PWM input mode wires one input pin to two capture channels at once, one measuring the period and one the high time, so frequency and duty come out together.
Data path: main -> TIM_ConfigPwmIc configures CH1 and CH2 together -> TIM_SelectInputTrig selects TI2FP2 -> TIM_SelectSlaveMode selects reset mode -> TIM_SelectMasterSlaveMode enables it -> TIM_ConfigInt enables the capture interrupt -> TIMx_IRQHandler reads TIM_GetCap1 and TIM_GetCap2 for the duty and frequency
1. One PWM input initialization configures both channels at once. CH2 takes the measured signal and CH1 is set to the opposite polarity in the same call.
TIM_InitIcStruct(&TIM_ICInitStructure);
TIM_ICInitStructure.Channel = TIM_CH_2;
TIM_ICInitStructure.ICPolarity = TIM_IC_POLARITY_RISING;
TIM_ICInitStructure.ICSelection = TIM_IC_SELECTION_DIRECTTI;
TIM_ICInitStructure.ICPrescaler = TIM_IC_PSC_DIV1;
TIM_ICInitStructure.ICFilter = 0x0;
/*PWM Dual-channel opposite polarity input capture initialization*/
TIM_ConfigPwmIc(TIMx, &TIM_ICInitStructure);
TIM_ConfigPwmIc handles both channel mappings and polarities internally; change TIM_ICInitStructure.Channel when the input pin changes.
2. Reset slave mode with master/slave mode makes the counter restart each period. The counter resets on the input edge, which helps period measurement.
/* Select the TIM3 Input Trigger: TI2FP2 */
TIM_SelectInputTrig(TIMx, TIM_TRIG_SEL_TI2FP2);
/* Select the slave Mode: Reset Mode */
TIM_SelectSlaveMode(TIMx, TIM_SLAVE_MODE_RESET);
/* Enable the Master/Slave Mode */
TIM_SelectMasterSlaveMode(TIMx, TIM_MASTER_SLAVE_MODE_ENABLE);
/* TIM enable counter */
TIM_Enable(TIMx, ENABLE);
/* Enable the CC2 Interrupt Request */
TIM_ConfigInt(TIMx, TIM_INT_CC2, ENABLE);
Measurement distorts when the measured frequency is above half the counting frequency, so lower the input frequency or raise the counting frequency first.
3. Compute the frequency and duty from both captures in the interrupt. The CH2 capture is one period of counts and the CH1 capture is the counts within the high time.
void TIMx_IRQHandler(void)
{
/* Clear TIMx Capture compare interrupt pending bit */
TIM_ClrIntPendingBit(TIMx, TIM_INT_CC2);
/* Get the Input Capture value */
IC2Value = TIM_GetCap2(TIMx);
if (IC2Value != 0)
{
/* Duty cycle computation */
DutyCycle = (TIM_GetCap1(TIMx) * 100) / IC2Value;
/* Frequency computation */
Frequency = SystemCoreClock / IC2Value;
}
else
{
DutyCycle = 0;
Frequency = 0;
}
}
Accuracy is highest when the measured signal shares the timer clock; with an independent clock source account for the frequency offset between them.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.12 PWM_Output PWM output
Example directory: projects/n32g033_EVAL/examples/TIM/PWM_Output/
enable clocks and configure the four output pins→compute the prescaler and set the time base→set the four channels to PWM output with compare values→open the preload, main output, and counter
| Item | Source analysis |
|---|---|
| Function | The four channels of TIM3 output four PWM signals of the same frequency and different duty cycles. |
| Source files | src/main.c holds RCC, GPIO, and the main function;src/n32g033_it.c keeps only the frame;inc/main.h declares the four channel pin macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA0, PA1, PB0, and PB1 are CH1-CH4; clock: PSC sets the counting frequency to about 2 MHz with AR=1200; mode: PWM1 with the preload of all four channels enabled; compare values: CC1 through CC4 are 600, 300, 150, and 75. |
| Program and data path | main -> RCC_Configuration opens the TIM3 and GPIO clocks -> computes the prescaler -> sets the time base -> configures each channel as PWM1 and writes the compare value -> opens the four channel preloads and the AR preload -> TIM_EnableCtrlPwmOutputs and TIM_Enable open the output and counting. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_InitOc4, TIM_ConfigOc1Preload, TIM_ConfigOc4Preload, TIM_ConfigArPreload, TIM_EnableCtrlPwmOutputs, TIM_Enable |
| Verification | Watch the four channels on an oscilloscope; the four signals share one period and differ in duty. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the four compare values set the four duty cycles. |
Core-code walkthrough and porting
The example generates four PWM signals from one period and four different compare values, so all four share the frequency and differ in duty.
Data path: main computes the prescaler -> TIM_InitTimeBase writes the time base -> TIM_InitOc1 through TIM_InitOc4 write the four channels -> TIM_ConfigOc1Preload turns preload on -> TIM_ConfigArPreload turns the AR preload on -> TIM_EnableCtrlPwmOutputs opens the output -> TIM_Enable starts counting
1. The prescaler and time base fix the period. AR=1200 sets the period shared by all four channels.
/* Compute the prescaler value */
PrescalerValue = (uint32_t)((SystemCoreClock)/ 2000000) - 1;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 1200;
TIM_TimeBaseStructure.Prescaler = PrescalerValue;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
2. Channel 1 is set to PWM1 with a compare value of 600. The ratio of the compare value to AR is the duty.
/* PWM1 Mode configuration: Channel1 */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM1;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR1_Val;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc1Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
3. The other three channels write different compare values and the preload and output open. The four compare values set the four duties.
TIM_ConfigOc1Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
/* PWM1 Mode configuration: Channel2 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR2_Val;
TIM_InitOc2(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc2Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
/* PWM1 Mode configuration: Channel3 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR3_Val;
TIM_InitOc3(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc3Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
/* PWM1 Mode configuration: Channel4 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR4_Val;
TIM_InitOc4(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc4Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
TIM_ConfigArPreload(TIMx, ENABLE);
TIM_EnableCtrlPwmOutputs(TIMx,ENABLE);
/* TIMx enable counter */
TIM_Enable(TIMx, ENABLE);
To change the duty at runtime, write the compare value while running and the preload applies it on the next period.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.13 TimeBase timing interrupt on compare events
Example directory: projects/n32g033_EVAL/examples/TIM/TimeBase/
enable clocks and configure the four plain output pins→set the time base and write the prescaler→set the four channels to compare timing mode→toggle the matching IO in the interrupt and add to the compare value
| Item | Source analysis |
|---|---|
| Function | TIM3 generates timing interrupts from the compare events of its four channels and toggles PA3 through PA6 in the interrupt. |
| Source files | src/main.c holds RCC, GPIO, NVIC, and the main function;src/n32g033_it.c holds TIM3_IRQHandler;inc/main.h declares the compare values and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA3, PA4, PA5, and PA6 are plain push-pull outputs; clock: PSC sets the counting frequency to about 2 MHz with AR=65535; mode: compare timing mode with preload off; interrupt: all four channel compare interrupts. |
| Program and data path | main -> RCC_Configuration opens the TIM3 and GPIO clocks -> GPIO_Configuration sets PA3 through PA6 as outputs -> sets the time base and four compare values -> TIM_ConfigPrescaler writes the prescaler -> TIM_ConfigInt enables the compare interrupts -> TIM_Enable starts counting -> the interrupt toggles the matching IO and adds to the compare value. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_ConfigPrescaler, TIM_InitOcStruct, TIM_InitOc1, TIM_InitOc4, TIM_ConfigInt, TIM_Enable, TIM_SetCmp1, TIM_GetCap1 |
| Verification | Watch PA3 through PA6 on an oscilloscope; each channel toggles its IO and adds to the compare value when the counter reaches it. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the four compare values set the pace of the four interrupts. |
Core-code walkthrough and porting
The example generates timing interrupts from the compare events of four channels and produces square waves of different paces on four IOs in the interrupt.
Data path: main -> TIM_InitTimeBase writes the time base -> TIM_ConfigPrescaler writes the prescaler -> TIM_InitOc1 through TIM_InitOc4 write the four channels -> TIM_ConfigInt enables the compare interrupts -> TIM_Enable starts counting -> TIM3_IRQHandler toggles the IO and TIM_SetCmp1 adds to the compare value
1. The time base and prescaler set the counting frequency first. The compare values set when each channel fires.
/* Compute the prescaler value */
PrescalerValue = (uint16_t)((SystemCoreClock)/ 2000000) - 1;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 65535;
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIM3, &TIM_TimeBaseStructure);
/* Prescaler configuration */
TIM_ConfigPrescaler(TIM3, PrescalerValue, TIM_PSC_RELOAD_MODE_IMMEDIATE);
2. The four channels are set to compare timing mode with their compare values. The compare event only raises an interrupt and the output pins stay under software control.
/* Output Compare Timing Mode configuration: Channel1 */
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_TIMING;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR1_Val;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_HIGH;
TIM_InitOc1(TIM3, &TIM_OCInitStructure);
TIM_ConfigOc1Preload(TIM3, TIM_OC_PRE_LOAD_DISABLE);
/* Output Compare Timing Mode configuration: Channel2 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR2_Val;
TIM_InitOc2(TIM3, &TIM_OCInitStructure);
TIM_ConfigOc2Preload(TIM3, TIM_OC_PRE_LOAD_DISABLE);
/* Output Compare Timing Mode configuration: Channel3 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR3_Val;
TIM_InitOc3(TIM3, &TIM_OCInitStructure);
TIM_ConfigOc3Preload(TIM3, TIM_OC_PRE_LOAD_DISABLE);
/* Output Compare Timing Mode configuration: Channel4 */
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = CCR4_Val;
TIM_InitOc4(TIM3, &TIM_OCInitStructure);
TIM_ConfigOc4Preload(TIM3, TIM_OC_PRE_LOAD_DISABLE);
3. Enable the four compare interrupts and start counting. The interrupt pace follows the compare value of each channel.
/* TIM IT enable */
TIM_ConfigInt(TIM3, TIM_INT_CC1 | TIM_INT_CC2 | TIM_INT_CC3 | TIM_INT_CC4, ENABLE);
/* TIM3 enable counter */
TIM_Enable(TIM3, ENABLE);
4. Toggle the IO by channel and add to the compare value in the interrupt. Adding the same increment keeps each channel at a fixed pace.
void TIM3_IRQHandler(void)
{
if (TIM_GetIntStatus(TIM3, TIM_INT_CC1) != RESET)
{
TIM_ClrIntPendingBit(TIM3, TIM_INT_CC1);
/* Pin PC.03 toggling */
GPIO_WriteBit(GPIOA, GPIO_PIN_3, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_3)));
capture = TIM_GetCap1(TIM3);
TIM_SetCmp1(TIM3, capture + CCR1_Val);
}
else if (TIM_GetIntStatus(TIM3, TIM_INT_CC2) != RESET)
{
TIM_ClrIntPendingBit(TIM3, TIM_INT_CC2);
/* Pin PC.04 toggling */
GPIO_WriteBit(GPIOA, GPIO_PIN_4, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_4)));
capture = TIM_GetCap2(TIM3);
TIM_SetCmp2(TIM3, capture + CCR2_Val);
}
else if (TIM_GetIntStatus(TIM3, TIM_INT_CC3) != RESET)
{
TIM_ClrIntPendingBit(TIM3, TIM_INT_CC3);
/* Pin PC.05 toggling */
GPIO_WriteBit(GPIOA, GPIO_PIN_5, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_5)));
capture = TIM_GetCap3(TIM3);
TIM_SetCmp3(TIM3, capture + CCR3_Val);
}
else
{
TIM_ClrIntPendingBit(TIM3, TIM_INT_CC4);
/* Pin PC.06 toggling */
GPIO_WriteBit(GPIOA, GPIO_PIN_6, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_6)));
capture = TIM_GetCap4(TIM3);
TIM_SetCmp4(TIM3, capture + CCR4_Val);
}
}
The increment sets the period of each square wave; a different increment gives a different toggle frequency.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.14 TimeBasic_TIM1 toggle an IO on the update interrupt
Example directory: projects/n32g033_EVAL/examples/TIM/TimeBasic_TIM1/
enable clocks and configure the output pin→set the time base and write the prescaler→open the update interrupt and the vector→toggle the IO in the update interrupt
| Item | Source analysis |
|---|---|
| Function | TIM1 toggles PA4 at a fixed period on the update interrupt. |
| Source files | src/main.c holds RCC, GPIO, NVIC, TIM_Configuration, and the main function;src/n32g033_it.c holds TIM1_BRK_UP_TRG_COM_IRQHandler;inc/main.h declares the pin and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4 is a plain push-pull output; clock: PSC=0, AR=65535; interrupt: TIM1 update interrupt with preemption priority 1; vector: TIM1_BRK_UP_TRG_COM. |
| Program and data path | main -> RCC_Configuration opens the TIM1 and GPIO clocks -> GPIO_Configuration sets PA4 as an output -> NVIC_Configuration enables the TIM1 interrupt -> TIM_Configuration sets the time base, opens the update interrupt, and starts counting -> TIM1_BRK_UP_TRG_COM_IRQHandler toggles PA4. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_ConfigPrescaler, TIM_ConfigInt, TIM_Enable, TIM_GetIntStatus, TIM_ClrIntPendingBit, NVIC_Init |
| Verification | Watch PA4 on an oscilloscope; PA4 toggles on each update interrupt. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; TIM1 is an advanced timer, so the update interrupt shares its vector with the break interrupt. |
Core-code walkthrough and porting
The example uses the TIM1 update event to raise a timing interrupt and toggles an IO once per interrupt, giving a square wave whose period is the interval between two update interrupts.
Data path: main -> RCC_Configuration opens the clocks -> GPIO_Configuration configures PA4 -> NVIC_Configuration enables the interrupt -> TIM_Configuration writes the time base, opens the update interrupt, and starts counting -> TIM1_BRK_UP_TRG_COM_IRQHandler clears the flag and toggles PA4
1. Set the time base, open the update interrupt, and start counting. The prescaler and period set the update-interrupt period.
void TIM_Configuration(void)
{
/* Compute the prescaler value */
PrescalerValue = 0;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 65535;
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIM1, &TIM_TimeBaseStructure);
/* Prescaler configuration */
TIM_ConfigPrescaler(TIM1, PrescalerValue, TIM_PSC_RELOAD_MODE_IMMEDIATE);
/* ATIM1 enable update irq */
TIM_ConfigInt(TIM1, TIM_INT_UPDATE, ENABLE);
/* ATIM1 enable counter */
TIM_Enable(TIM1, ENABLE);
}
Change AR and the prescaler to change the interrupt period; for longer timing raise the prescaler instead of maximizing AR.
2. Configure the NVIC before starting the timer. The vector and priority are set before the interrupt is enabled.
void NVIC_Configuration(void)
{
NVIC_InitType NVIC_InitStructure;
/* Enable the TIMx Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM1_BRK_UP_TRG_COM_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
3. Clear the flag and toggle the IO in the interrupt. The toggle period equals the interval between two update interrupts.
void TIM1_BRK_UP_TRG_COM_IRQHandler(void)
{
if (TIM_GetIntStatus(TIM1, TIM_INT_UPDATE) != RESET)
{
TIM_ClrIntPendingBit(TIM1, TIM_INT_UPDATE);
/* IO toggle */
GPIO_WriteBit(GPIOA, GPIO_PIN_4, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_4)));
}
}
Turn the toggle into a division counter to get several outputs of different frequencies from one interrupt.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.15 TimeBasic_TIM3 toggle an IO on the update interrupt
Example directory: projects/n32g033_EVAL/examples/TIM/TimeBasic_TIM3/
enable clocks and configure the output pin→set the time base and write the prescaler→open the update interrupt and the vector→toggle the IO in the update interrupt
| Item | Source analysis |
|---|---|
| Function | TIM3 toggles PA4 at a fixed period on the update interrupt. |
| Source files | src/main.c holds RCC, GPIO, NVIC, TIM_Configuration, and the main function;src/n32g033_it.c holds TIM3_IRQHandler;inc/main.h declares the pin and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4 is a plain push-pull output; clock: PSC=0, AR=65535; interrupt: TIM3 update interrupt with preemption priority 1; vector: TIM3. |
| Program and data path | main -> RCC_Configuration opens the TIM3 and GPIO clocks -> GPIO_Configuration sets PA4 as an output -> NVIC_Configuration enables the TIM3 interrupt -> TIM_Configuration sets the time base, opens the update interrupt, and starts counting -> TIM3_IRQHandler toggles PA4. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_ConfigPrescaler, TIM_ConfigInt, TIM_Enable, TIM_GetIntStatus, TIM_ClrIntPendingBit, NVIC_Init |
| Verification | Watch PA4 on an oscilloscope; PA4 toggles on each update interrupt. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the general-purpose TIM3 uses its own vector for the update interrupt. |
Core-code walkthrough and porting
The example uses the TIM3 update event to raise a timing interrupt and toggles an IO once per interrupt; the rest matches the TIM1 version.
Data path: main -> RCC_Configuration opens the clocks -> GPIO_Configuration configures PA4 -> NVIC_Configuration enables the interrupt -> TIM_Configuration writes the time base, opens the update interrupt, and starts counting -> TIM3_IRQHandler clears the flag and toggles PA4
1. Set the time base, open the update interrupt, and start counting. The prescaler and period set the update-interrupt period.
void TIM_Configuration(void)
{
/* Compute the prescaler value */
PrescalerValue = 0;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 65535;
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIM3, &TIM_TimeBaseStructure);
/* Prescaler configuration */
TIM_ConfigPrescaler(TIM3, PrescalerValue, TIM_PSC_RELOAD_MODE_IMMEDIATE);
/* TIM3 enable update irq */
TIM_ConfigInt(TIM3, TIM_INT_UPDATE, ENABLE);
/* TIM3 enable counter */
TIM_Enable(TIM3, ENABLE);
}
Change AR and the prescaler to change the interrupt period; longer timing goes through a larger prescaler.
2. Configure the NVIC before starting the timer. The vector and priority are set before the interrupt is enabled.
void NVIC_Configuration(void)
{
NVIC_InitType NVIC_InitStructure;
/* Enable the TIMx Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
3. Clear the flag and toggle the IO in the interrupt. The toggle period equals the interval between two update interrupts.
void TIM3_IRQHandler(void)
{
if (TIM_GetIntStatus(TIM3, TIM_INT_UPDATE) != RESET)
{
TIM_ClrIntPendingBit(TIM3, TIM_INT_UPDATE);
/* IO toggle */
GPIO_WriteBit(GPIOA, GPIO_PIN_4, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_4)));
}
}
Turn the toggle into a division counter to get several outputs of different frequencies from one interrupt.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.16 TimeBasic_TIM4 toggle an IO on the update interrupt
Example directory: projects/n32g033_EVAL/examples/TIM/TimeBasic_TIM4/
enable clocks and configure the output pin→set the time base and write the prescaler→open the update interrupt and the vector→toggle the IO in the update interrupt
| Item | Source analysis |
|---|---|
| Function | TIM4 toggles PA4 at a fixed period on the update interrupt. |
| Source files | src/main.c holds RCC, GPIO, NVIC, TIM_Configuration, and the main function;src/n32g033_it.c holds TIM4_IRQHandler;inc/main.h declares the pin and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4 is a plain push-pull output; clock: PSC=0, AR=65535; interrupt: TIM4 update interrupt with preemption priority 1; vector: TIM4. |
| Program and data path | main -> RCC_Configuration opens the TIM4 and GPIO clocks -> GPIO_Configuration sets PA4 as an output -> NVIC_Configuration enables the TIM4 interrupt -> TIM_Configuration sets the time base, opens the update interrupt, and starts counting -> TIM4_IRQHandler toggles PA4. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_ConfigPrescaler, TIM_ConfigInt, TIM_Enable, TIM_GetIntStatus, TIM_ClrIntPendingBit, NVIC_Init |
| Verification | Watch PA4 on an oscilloscope; PA4 toggles on each update interrupt. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the general-purpose TIM4 uses its own vector for the update interrupt. |
Core-code walkthrough and porting
The example uses the TIM4 update event to raise a timing interrupt and toggles an IO once per interrupt; the rest matches the TIM1 and TIM3 versions.
Data path: main -> RCC_Configuration opens the clocks -> GPIO_Configuration configures PA4 -> NVIC_Configuration enables the interrupt -> TIM_Configuration writes the time base, opens the update interrupt, and starts counting -> TIM4_IRQHandler clears the flag and toggles PA4
1. Set the time base, open the update interrupt, and start counting. The prescaler and period set the update-interrupt period.
void TIM_Configuration(void)
{
/* Compute the prescaler value */
PrescalerValue = 0;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 65535;
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIM4, &TIM_TimeBaseStructure);
/* Prescaler configuration */
TIM_ConfigPrescaler(TIM4, PrescalerValue, TIM_PSC_RELOAD_MODE_IMMEDIATE);
/* TIM4 enable update irq */
TIM_ConfigInt(TIM4, TIM_INT_UPDATE, ENABLE);
/* TIM4 enable counter */
TIM_Enable(TIM4, ENABLE);
}
Change AR and the prescaler to change the interrupt period; longer timing goes through a larger prescaler.
2. Configure the NVIC before starting the timer. The vector and priority are set before the interrupt is enabled.
void NVIC_Configuration(void)
{
NVIC_InitType NVIC_InitStructure;
/* Enable the TIMx Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM4_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
3. Clear the flag and toggle the IO in the interrupt. The toggle period equals the interval between two update interrupts.
void TIM4_IRQHandler(void)
{
if (TIM_GetIntStatus(TIM4, TIM_INT_UPDATE) != RESET)
{
TIM_ClrIntPendingBit(TIM4, TIM_INT_UPDATE);
/* IO toggle */
GPIO_WriteBit(GPIOA, GPIO_PIN_4, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_4)));
}
}
Turn the toggle into a division counter to get several outputs of different frequencies from one interrupt.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.17 TimeBasic_TIM6 toggle an IO on the update interrupt
Example directory: projects/n32g033_EVAL/examples/TIM/TimeBasic_TIM6/
enable clocks and configure the output pin→set the time base and write the prescaler→configure EXTI line 9 and the update interrupt→clear the flags and toggle the IO in the update interrupt
| Item | Source analysis |
|---|---|
| Function | TIM6 toggles PA4 at a fixed period on the update interrupt. |
| Source files | src/main.c holds RCC, GPIO, NVIC, TIM_Configuration, and the main function;src/n32g033_it.c holds TIM6_IRQHandler;inc/main.h declares the pin and interrupt macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4 is a plain push-pull output; clock: PSC=0, AR=65535; interrupt: TIM6 update interrupt with EXTI line 9 enabled and preemption priority 1; vector: TIM6. |
| Program and data path | main -> RCC_Configuration opens the TIM6 and GPIO clocks -> GPIO_Configuration sets PA4 as an output -> NVIC_Configuration configures EXTI line 9 and the TIM6 interrupt -> TIM_Configuration sets the time base, opens the update interrupt, and starts counting -> TIM6_IRQHandler clears the interrupt and EXTI flags and toggles PA4. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_ConfigPrescaler, TIM_ConfigInt, TIM_Enable, TIM_GetIntStatus, TIM_ClrIntPendingBit, EXTI_InitPeripheral, EXTI_ClrITPendBit |
| Verification | Watch PA4 on an oscilloscope; PA4 toggles on each update interrupt. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; TIM6 is a basic timer, so its update interrupt is connected to EXTI line 9. |
Core-code walkthrough and porting
The example uses the TIM6 update event to raise a timing interrupt; the interrupt clears both the TIM6 and EXTI line 9 flags and toggles an IO.
Data path: main -> RCC_Configuration opens the clocks -> GPIO_Configuration configures PA4 -> NVIC_Configuration configures EXTI line 9 and the interrupt -> TIM_Configuration writes the time base, opens the update interrupt, and starts counting -> TIM6_IRQHandler clears the TIM6 and EXTI flags and toggles PA4
1. Set the time base, open the update interrupt, and start counting. TIM6 has no output pin, so the update event is for timing only.
void TIM_Configuration(void)
{
/* Compute the prescaler value */
PrescalerValue = 0;
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 65535;
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIM6, &TIM_TimeBaseStructure);
/* Prescaler configuration */
TIM_ConfigPrescaler(TIM6, PrescalerValue, TIM_PSC_RELOAD_MODE_IMMEDIATE);
/* TIM6 enable update irq */
TIM_ConfigInt(TIM6, TIM_INT_UPDATE, ENABLE);
/* TIM6 enable counter */
TIM_Enable(TIM6, ENABLE);
}
2. Configure EXTI line 9 and the NVIC before starting the timer. The update interrupt reaches the nested vector controller through EXTI line 9.
void NVIC_Configuration(void)
{
NVIC_InitType NVIC_InitStructure;
EXTI_InitType EXTI_Struct;
EXTI_Struct.EXTI_Line = EXTI_LINE9;
EXTI_Struct.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_Struct.EXTI_Trigger = EXTI_Trigger_Rising;
EXTI_Struct.EXTI_LineCmd = ENABLE;
EXTI_InitPeripheral(&EXTI_Struct);
/* Enable the TIMx Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM6_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
3. Clear both flags and toggle the IO in the interrupt. Both the TIM6 update flag and the EXTI line 9 pending bit must be cleared.
void TIM6_IRQHandler(void)
{
if (TIM_GetIntStatus(TIM6, TIM_INT_UPDATE) != RESET)
{
TIM_ClrIntPendingBit(TIM6, TIM_INT_UPDATE);
EXTI_ClrITPendBit(EXTI_LINE9);
/* IO toggle */
GPIO_WriteBit(GPIOA, GPIO_PIN_4, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_4)));
}
}
Leaving the EXTI flag uncleared retriggers the interrupt repeatedly, so handle both flag levels when porting.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.18 TimeBasic6_wakeup wake up from STOP on TIM6
Example directory: projects/n32g033_EVAL/examples/TIM/TimeBasic6_wakeup/
enable clocks and configure the LED pin→configure EXTI line 9 and the update interrupt→switch the TIM6 clock to LSI and start counting→enter STOP and toggle the LED after the update interrupt wakes the chip
| Item | Source analysis |
|---|---|
| Function | TIM6 is clocked from LSI and wakes the chip from STOP mode at a fixed period on the update interrupt, toggling the LED on PA6. |
| Source files | src/main.c holds RCC, GPIO, NVIC, TIM_Configuration, SetSysClock_LSI, and the main function;src/n32g033_it.c holds TIM6_IRQHandler;inc/main.h and delay.h;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA6 is a plain push-pull output driving LED(D1); clock: the LSI source with SYS_CLK=32 kHz; time base: PSC=0, AR=3200; interrupt: TIM6 update interrupt connected to EXTI line 9. |
| Program and data path | main -> RCC_Configuration opens the TIM6, GPIO, and PWR clocks -> GPIO_Configuration sets PA6 as an output -> NVIC_Configuration configures EXTI line 9 and the TIM6 interrupt -> after a delay TIM_Configuration sets the time base and opens the update interrupt -> RCC_ConfigTim6Clk selects LSI as the TIM6 clock -> the loop enters STOP -> after the update interrupt wakes the chip the loop toggles PA6. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_ClearFlag, TIM_ConfigInt, TIM_Enable, RCC_ConfigTim6Clk, PWR_EnterSTOPMode, EXTI_InitPeripheral, SysTick_Delay_Ms |
| Verification | After download and reset the LED(D1) blinks at the period; the TIM6 update interrupt must be connected to EXTI line 9 to wake the chip from STOP. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the clock source is LSI with SYS_CLK=32 kHz; it uses the SysTick millisecond delay from delay.h. |
Core-code walkthrough and porting
The example switches the TIM6 clock to LSI, configures the update interrupt, and lets the chip enter STOP; the update event wakes the chip through EXTI line 9 and toggles the LED.
Data path: main calls TIM_Configuration after a delay -> RCC_ConfigTim6Clk selects LSI -> TIM_Enable starts counting -> the loop enters STOP with PWR_EnterSTOPMode -> the update event wakes the chip through EXTI line 9 -> TIM6_IRQHandler clears the flag
1. The main flow configures everything then enters STOP and waits for the update interrupt. STOP mode is entered with WFI and the main loop resumes toggling the LED after the wake-up.
int main(void)
{
/* System Clocks Configuration */
RCC_Configuration();
/* GPIO Configuration */
GPIO_Configuration();
/* NVIC Configuration */
NVIC_Configuration();
SysTick_Delay_Ms(500);
/* Reconfig TIM6 */
TIM_Configuration();
RCC_ConfigTim6Clk(RCC_TIM6_CLKSRC_LSI);
/* TIM6 enable counter */
TIM_Enable(TIM6, ENABLE);
while (1)
{
/* Enter STOP mode */
PWR_EnterSTOPMode(PWR_STOPENTRY_WFI);
GPIO_WriteBit(GPIOA, GPIO_PIN_6, (Bit_OperateType)(1 - GPIO_ReadOutputDataBit(GPIOA, GPIO_PIN_6)));
}
}
Configure the peripherals and interrupts before STOP; most settings other than the system clock survive the wake-up.
2. Configure EXTI line 9 and the TIM6 interrupt vector. Only with the TIM6 update event connected to EXTI line 9 can it wake the chip from STOP.
void NVIC_Configuration(void)
{
NVIC_InitType NVIC_InitStructure;
EXTI_InitType EXTI_Struct;
EXTI_ClrStatusFlag(EXTI_LINE9);
EXTI_Struct.EXTI_Line = EXTI_LINE9;
EXTI_Struct.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_Struct.EXTI_Trigger = EXTI_Trigger_Rising;
EXTI_Struct.EXTI_LineCmd = ENABLE;
EXTI_InitPeripheral(&EXTI_Struct);
/* Enable the TIMx Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM6_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
3. Set the time base, clear the update flag, then open the update interrupt. Clearing the flag first avoids an immediate trigger when the interrupt is enabled.
void TIM_Configuration(void)
{
/* Time base configuration */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 3200;
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIM6, &TIM_TimeBaseStructure);
/* TIM6 enable update irq */
TIM_ClearFlag(TIM6,TIM_FLAG_UPDATE);
TIM_ConfigInt(TIM6, TIM_INT_UPDATE, ENABLE);
}
4. Use LSI as the TIM6 clock source. RCC_ConfigTim6Clk switches the TIM6 clock to LSI once LSI is ready.
ErrorStatus SetSysClock_LSI(void)
{
uint32_t timeout_value = 0xFFFFFFFF;
/* Wait till LSI is ready */
if (RCC_GetFlagStatus(RCC_CLKINT_FLAG_LSIRDF) == SET)
{
/* HCLK = SYSCLK */
RCC_ConfigHclk(RCC_SYSCLK_DIV1);
/* PCLK = HCLK */
RCC_ConfigPclk(RCC_HCLK_DIV1);
RCC_ConfigSysclk(RCC_SYSCLK_SRC_LSI);
while (RCC_GetSysclkSrc() != RCC_CFG_SCLKSTS_LSI)
{
if ((timeout_value--) == 0)
{
return ERROR;
}
}
FLASH_SetLatency(FLASH_LATENCY_0);
}
else
{
/* If LSI fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
return ERROR;
}
return SUCCESS;
}
LSI drifts with temperature and voltage, so use it only where timing accuracy is not critical; choose LSE or HSI when accuracy matters.
Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.3.19 TIMx_Synchro master/slave synchronization
Example directory: projects/n32g033_EVAL/examples/TIM/TIMx_Synchro/
enable clocks and configure the master and slave pins→set the slave timer to gated mode→set the master timer and select the update event as the trigger→count the slave under the master period gate
| Item | Source analysis |
|---|---|
| Function | TIM1 is the master and TIM3 counts under its update-event gate, so one TIM3 period contains 15 TIM1 periods. |
| Source files | src/main.c holds RCC, GPIO, and the main function;src/n32g033_it.c keeps only the frame;inc/main.h declares the master/slave timer and pin macros;readme.txt gives the configuration and test steps;the project files are under MDK-ARM/ and EWARM/. |
| Key configuration | Pins: PA4 is TIM1 CH1 and PA6 is TIM3 CH1; clock: PSC=0; master: PWM2 with Period=255 and a repetition count of 4, using the update event as the trigger output; slave: PWM1 with Period=2 in gated mode and IN_TR0 as the trigger. |
| Program and data path | main -> RCC_Configuration opens the TIM1, TIM3, and GPIO clocks -> sets TIM3 first to a Period=2 time base and PWM1 and selects the gated slave mode -> then sets TIM1 to PWM2 with Period=255 and a repetition count of 4 and writes BDTR -> TIM_SelectMasterSlaveMode and TIM_SelectOutputTrig select the update event -> opens both timers and the main output. |
| Main APIs | TIM_InitTimBaseStruct, TIM_InitTimeBase, TIM_InitOcStruct, TIM_InitOc1, TIM_SelectSlaveMode, TIM_SelectInputTrig, TIM_InitBkdtStruct, TIM_ConfigBkdt, TIM_SelectMasterSlaveMode, TIM_SelectOutputTrig, TIM_Enable, TIM_EnableCtrlPwmOutputs |
| Verification | Watch TIM1 CH1 and TIM3 CH1 on an oscilloscope; the TIM3 period is about 15 times that of TIM1. |
| Use note | The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; TIM1 is the master and TIM3 is the slave. |
Core-code walkthrough and porting
The example uses the TIM1 update event as a trigger output to gate TIM3, giving a synchronized waveform in which the slave toggles after several master periods.
Data path: main sets the TIM3 time base and PWM1 first -> TIM_SelectSlaveMode and TIM_SelectInputTrig set TIM3 to the gated slave mode -> then sets the TIM1 time base, PWM2, and BDTR -> TIM_SelectOutputTrig uses the update event as the trigger -> TIM_SelectMasterSlaveMode enables it -> TIM_Enable starts both timers
1. Configure the slave time base and PWM1 output first. The slave period is short, so it counts several times within one master period while the gate is active.
/*TIMy Slave Configuration: PWM1 Mode */
TIM_InitTimBaseStruct(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.Period = 2;
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIMy, &TIM_TimeBaseStructure);
TIM_InitOcStruct(&TIM_OCInitStructure);
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM1;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.Pulse = 1;
TIM_InitOc1(TIMy, &TIM_OCInitStructure);
/* Slave Mode selection: TIMy */
TIM_SelectSlaveMode(TIMy, TIM_SLAVE_MODE_GATED);
TIM_SelectInputTrig(TIMy, TIM_TRIG_SEL_IN_TR0);
Change the slave Period to change how many counts fit in one master period.
2. The master uses PWM2 and selects the update event as the trigger. The master repetition count and period together set the trigger-output frequency.
/* Time Base configuration */
TIM_TimeBaseStructure.Prescaler = 0;
TIM_TimeBaseStructure.CounterMode = TIM_CNT_MODE_UP;
TIM_TimeBaseStructure.Period = 255;
TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1;
TIM_TimeBaseStructure.RepetCnt = 4;
TIM_InitTimeBase(TIMx, &TIM_TimeBaseStructure);
/* Channel 1 Configuration in PWM mode */
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM2;
TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE;
TIM_OCInitStructure.OutputNState = TIM_OUTPUT_NSTATE_DISABLE;
TIM_OCInitStructure.Pulse = 127;
TIM_OCInitStructure.OCPolarity = TIM_OC_POLARITY_LOW;
TIM_OCInitStructure.OCNPolarity = TIM_OCN_POLARITY_LOW;
TIM_OCInitStructure.OCIdleState = TIM_OC_IDLE_STATE_SET;
TIM_OCInitStructure.OCNIdleState = TIM_OCN_IDLE_STATE_RESET;
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
3. Write BDTR then enable master/slave mode and the output. The master pin drives only while the main output enable bit is set.
/* Automatic Output enable, Break, dead time and lock configuration*/
TIM_InitBkdtStruct(&TIM_BDTRInitStructure);
TIM_BDTRInitStructure.OSSRState = TIM_OSSR_STATE_ENABLE;
TIM_BDTRInitStructure.OSSIState = TIM_OSSI_STATE_ENABLE;
TIM_BDTRInitStructure.LOCKLevel = TIM_LOCK_LEVEL_1;
TIM_BDTRInitStructure.DeadTime = 0;
TIM_BDTRInitStructure.Break = TIM_BREAK_IN_DISABLE;
TIM_BDTRInitStructure.BreakPolarity = TIM_BREAK_POLARITY_HIGH;
TIM_BDTRInitStructure.AutomaticOutput = TIM_AUTO_OUTPUT_DISABLE;
TIM_ConfigBkdt(TIMx, &TIM_BDTRInitStructure);
/* Select the Master Slave Mode */
TIM_SelectMasterSlaveMode(TIMx, TIM_MASTER_SLAVE_MODE_ENABLE);
/* Master Mode selection */
TIM_SelectOutputTrig(TIMx, TIM_TRGO_SRC_UPDATE);
/* TIMx counter enable */
TIM_Enable(TIMx, ENABLE);
/* TIM enable counter */
TIM_Enable(TIMy, ENABLE);
/* Main Output Enable */
TIM_EnableCtrlPwmOutputs(TIMx, ENABLE);
Change the trigger output from the update event to the enable event or a compare pulse for a different synchronization pace.
Corresponding source files: src/main.c, firmware/n32g033_std_periph_driver/inc/n32g033_tim.h
5.18.4 Notes and troubleshooting
| Scenario | Check & action | Source |
|---|---|---|
| Switching between center-aligned and edge-aligned | The TIM1 chapter of the user manual states that the timer must not switch from edge-aligned to center-aligned mode while the counter is still enabled (TIMx_CTRL1.CNTEN=1);the counting direction bit is read-only in center-aligned or encoder mode. |
User manual |
| Disabling the update event (UPDIS) | The TIM1 chapter of the user manual states that TIMx_CTRL1.UPDIS=1 disables the update event and the shadow registers (AR, PSC, and CCDATx) keep their values;keep UPDIS=0 to transfer new values into the shadow registers on the update event. |
User manual |
| Starting gated and reset slave modes | The TIM1 chapter of the user manual states that in gated-with-reset mode the counter does not start when TIMx_CTRL1.CNTEN=0, regardless of the trigger input level;after software sets CNTEN, at least two TIMx_CLK cycles are needed for it to take effect. |
User manual |
| Capture prescaler in external clock mode 1 | The TIM1 chapter of the user manual states that the capture prescaler is not used for triggering and needs no configuration, and the input selection bits only choose the input capture source. | User manual |
| External trigger (ETR) frequency | The TIM1 chapter of the user manual states that the frequency of the external trigger signal ETRP must be at most one quarter of TIMx_CLK; use the external trigger prescaler to lower ETRP for faster external clocks. |
User manual |
| Encoder mode and external clock mode 2 | The TIM3 chapter of the user manual states that encoder mode and external clock mode 2 are incompatible and must not be selected together. | User manual |
| Break input and main output | The TIM3 chapter of the user manual states that an active break input clears the main output enable bit asynchronously in hardware and the outputs enter the idle state immediately; while break is active this bit cannot be set automatically or by software, and the break interrupt flag cannot be cleared either. |
User manual |
| Center-aligned asymmetric mode | The TIM1 chapter of the user manual states that this feature applies to TIM1 only and takes effect when TIMx_CTRL1.CAMSEL is non-zero;up-counting compares with CCDATx and down-counting compares with CCDDx. |
User manual |
| When slave-mode control bits may change | The TIM1 chapter of the user manual states that CNTEN and DIR can be changed by software only when the slave-mode controller is disabled; the trigger selection bits may be changed only when unused, to avoid spurious edge detection. |
User manual |
| When preload values reach the shadow registers | The TIM1 chapter of the user manual states that preload register values are transferred to the shadow registers immediately or on each update event according to ARPEN; after software sets CNTEN, the counter starts on the next clock cycle. |
User manual |
| TIM6 clocked from LSI | The TIM6 chapter of the user manual states that TIMx_CNT cannot be written when the clock source is LSI;in this case the update interrupt (connected to EXTI 9) can wake up STOP mode. |
User manual |
Errata sheet V1.0.0 (2025.9.25) covers revision A silicon and lists no TIM entries.