5.12 NVIC Guide

This chapter describes the file layout, the 2 public functions, and the single IRQ_Mask example of the NVIC support in the N32G033 standard peripheral library. Read the “Interrupts and events” chapter of the user manual for the vector assignment, priorities, and nesting, and the errata sheet for known chip issues.

5.12.1 Related files

Relative path	Purpose
`firmware/n32g033_std_periph_driver/inc/misc.h`	Defines the `NVIC_InitType` structure and the SysTick clock-source macros, and declares the two configuration functions for the NVIC and SysTick
`firmware/n32g033_std_periph_driver/src/misc.c`	Implements those two functions: NVIC interrupt channel and priority initialization, and SysTick clock-source selection
`projects/n32g033_EVAL/examples/NVIC/`	NVIC example root directory, with 1 example: IRQ_Mask
`projects/n32g033_EVAL/examples/NVIC/IRQ_Mask/`	Project layout of this example: `MDK-ARM/`, `EWARM/`, `inc/`, `src/`, and `readme.txt`
`projects/n32g033_EVAL/bsp/`	Board support files shared by the examples: the SysTick delay in `delay.h` and the UART log interface in `log.h`

5.12.2 API reference

The following 2 public functions are listed in the declaration order of misc.h in 1 group; each entry gives a summary and the original comment above the function in misc.c.

Interrupt and system-tick configuration

NVIC_Init, SysTick_CLKSourceConfig

void NVIC_Init(NVIC_InitType* NVIC_InitStruct)Initializes the NVIC peripheral according to the specified parameters in the NVIC_structure_initializes.

Source comment

name    NVIC_Init
fun     Initializes the NVIC peripheral according to the specified parameters in the NVIC_structure_initializes.
param   NVIC_InitStruct (The input parameters must be the following values) :
              - NVIC_IRQChannel :
                   -  IRQn_Type    N32G033 Interrupt Number Definition
              - NVIC_IRQChannelPriority :
                   -  NVIC_PRIORITY_0
                   -  NVIC_PRIORITY_1
                   -  NVIC_PRIORITY_2
                   -  NVIC_PRIORITY_3
              - NVIC_IRQChannelCmd :
                   -  ENABLE
                   -  DISABLE
return  none

void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)Configures the SysTick clock source.

Source comment

name  SysTick_CLKSourceConfig
fun   Configures the SysTick clock source.
param SysTick_CLKSource (The input parameters must be the following values) :
       - SysTick_CLKSource_HCLK_Div8    External clock selected as SysTick clock source.
       - SysTick_CLKSource_HCLK         AHB clock selected as SysTick clock source.
return  none

5.12.3 Demo descriptions

This section describes the single NVIC example: IRQ_Mask prints a log from the TIM3 update interrupt and uses the key EXTI interrupt together with the global interrupt switch to demonstrate interrupt masking.

5.12.3.1 IRQ_Mask Interrupt masking

Example directory: projects/n32g033_EVAL/examples/NVIC/IRQ_Mask/

Enable the GPIO, EXTI, and TIM3 clocks→Configure the key pin as a pull-up input and route it to an EXTI line→Configure the TIM3 time base and update interrupt→Switch the global interrupt on and off from the main loop when the key is pressed

Item	Source analysis
Function	Makes the TIM3 update interrupt print a log once per second and lets a key press mask or restore interrupt handling through the global interrupt switch.
Source files	`src/main.c` holds `TIM_Config`, `KeyInputExtiInit`, and the main loop; `EXTI0_6_IRQHandler` and `TIM3_IRQHandler` in `src/n32g033_it.c` are the interrupt service routines; `inc/main.h` defines the key pin, EXTI line, and interrupt number macros; `readme.txt` gives the configuration and test steps; the project files are in `MDK-ARM/` and `EWARM/`.
Key configuration	Key: PA4 as a pull-up input on `EXTI_LINE1`, interrupt number `EXTI0_6_IRQn`, priority 1; TIM3: prescaler `SystemCoreClock/1200-1` and period `0x4AF`, interrupt number `TIM3_IRQn`, priority 0; UART: 115200 baud, TX PA9 and RX PA10.
Program and data path	`main` -> `log_init` sets up the UART -> `KeyInputExtiInit` configures the key pin, the EXTI line, and the interrupt -> `TIM_Config` sets the TIM3 time base and enables the update interrupt -> the main loop waits for the key status, calls `__disable_irq`, then waits for the key release and calls `__enable_irq`.
Main APIs	`NVIC_Init`
Verification	Connect a serial terminal to PA9 and open the receiver; at full speed the port prints the timer interrupt message once per second; pressing KEY1 (PA4) stops it, and pressing again resumes printing.
Use note	The development environment is KEIL MDK-ARM V5.34.0.0 or IAR EWARM 8.50.1 on the N32G033K8Q7-1_STB V1.0 evaluation board; the system clock is 64 MHz.

Core-code walkthrough and porting

The example attaches the TIM3 update interrupt and the key EXTI interrupt to the NVIC, then controls whether they are handled with the global interrupt switch.

Data path: KeyInputExtiInit connects PA4 to EXTI_LINE1 and sets the EXTI0_6_IRQn priority → TIM_Config sets the TIM3 time base and the TIM3_IRQn priority → the main loop waits for the key status → __disable_irq masks the configurable-priority interrupts → it waits for the key release → __enable_irq restores handling

1. Each interrupt channel gets its own NVIC_Init call to set a priority. The key and TIM3 use two channels, each passing its own IRQn_Type and priority.

src/main.csrc/main.c · KeyInputExtiInit

    /*Set key input interrupt priority*/
    NVIC_InitStructure.NVIC_IRQChannel                   = KEY_INPUT_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPriority           = 0x01;
    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;
    NVIC_Init(&NVIC_InitStructure);

src/main.csrc/main.c · TIM_Config

    /* Enable the TIM3 Interrupt */
    NVIC_InitStructure.NVIC_IRQChannel                   = TIM3_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPriority           = 0;
    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;
    NVIC_Init(&NVIC_InitStructure);

The two priorities differ, so fit all channel values into one system priority plan when porting.

2. The main loop switches the global interrupt with __disable_irq and __enable_irq. While masked, no configurable-priority interrupt is handled, and handling resumes after the key is released.

src/main.csrc/main.c · main

        while (Key_Status == DISABLE)
        {
        }
        log_info("Disable irq \r\n");
        /* This instruction raises the execution priority to 0. This prevents all
           exceptions with configurable priority from activating, other than through
           the HardFault fault escalation mechanism. */
        __disable_irq();

        while (GPIO_ReadInputDataBit(KEY_INPUT_PORT, KEY_INPUT_PIN) != SET)
        {
        }
        
        while (GPIO_ReadInputDataBit(KEY_INPUT_PORT, KEY_INPUT_PIN) != RESET)
        {
        }
        log_info("enable irq \r\n");
        /* This instruction will allow all exceptions with configurable priority to
           be activated. */
        __enable_irq();

The pin polling during the masked period does not depend on interrupts, so removing __disable_irq stops the key from pausing the log.

3. The handlers branch on the flag and clear the pending bit. The two routines serve the key EXTI line and the TIM3 update event, each completing its action after clearing the flag.

src/n32g033_it.csrc/n32g033_it.c · EXTI0_6_IRQHandler

void EXTI0_6_IRQHandler(void)
{
    /* EXTI IRQHandler */
    log_info("EXTI IRQHandler \r\n");
    if (EXTI_GetITStatus(KEY_INPUT_EXTI_LINE) != RESET)
    {
        if (Key_Status == ENABLE)
        {
            Key_Status = DISABLE;
        }
        else
        {
            Key_Status = ENABLE;
        }
        /* Clears the SEL Button EXTI line pending bits. */
        EXTI_ClrITPendBit(KEY_INPUT_EXTI_LINE);
    }
}

src/n32g033_it.csrc/n32g033_it.c · TIM3_IRQHandler

void TIM3_IRQHandler(void)
{
    /* Clear TIM3 update interrupt */
    TIM_ClrIntPendingBit(TIM3, TIM_INT_UPDATE);

    /* TIM3 IRQHandler */
    log_info("TIM3 IRQHandler \r\n");
}

The pending bit is cleared inside the branch, so keep the flag test and the clear paired when porting.

Corresponding source files: src/main.c, src/n32g033_it.c, firmware/n32g033_std_periph_driver/inc/misc.h

5.12.4 Notes and troubleshooting

Scenario	Check & action	Source
Maskable interrupt channels and priority levels	The Interrupts and events chapter of the user manual states that the N32G033 has 21 maskable interrupt channels and 4 programmable priority levels (using 2 priority bits); do not exceed that many levels when you set a priority.	User manual
Vector priorities of exceptions and interrupts	The Interrupts and events chapter of the user manual gives the priority of each exception and interrupt, such as SVCall 3, SysTick 6, EXTI0_6 9, and TIM3 19; use that table when you plan the channel priorities.	User manual
Conditions for an EXTI interrupt	The Interrupts and events chapter of the user manual states that to generate an interrupt you must enable the NVIC channel in the external interrupt controller and write 1 to the matching bit in `EXTI_IMASK`; configuring only the edge without opening the mask bit leaves the interrupt unhandled.	User manual
SysTick calibration and time base	The Interrupts and events chapter of the user manual states that the SysTick calibration value is fixed at 8000 and that a SysTick clock of 8 MHz (the maximum HCLK/8) produces a 1 ms time base; check the frequency against that relation when you select the clock source.	User manual

Errata sheet V1.0.0 (2025.9.25) covers revision A silicon and lists no NVIC entries.