5.16 PWR 使用说明

    EXTI_InitType EXTI_InitStructure;

    /* Configure EXTI Line16(PVD Output) to generate an interrupt on rising and
       falling edges */
    EXTI_ClrITPendBit(EXTI_LINE16);
    EXTI_InitStruct(&EXTI_InitStructure);
    EXTI_InitStructure.EXTI_Line    = EXTI_LINE16;
    EXTI_InitStructure.EXTI_Mode    = EXTI_Mode_Interrupt;
    EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
    EXTI_InitStructure.EXTI_LineCmd = ENABLE;
    EXTI_InitPeripheral(&EXTI_InitStructure);

    NVIC_InitType NVIC_InitStructure;

    /* Configure one bit for preemption priority */
    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
    /* Enable the PVD Interrupt */
    NVIC_InitStructure.NVIC_IRQChannel                   = PVD_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0;
    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;
    NVIC_Init(&NVIC_InitStructure);

    /* Configure the PVD Level to 2.4V ,from 2V ~ 4.8V,one step mean add 200mv*/
    PWR_PVDLevelConfig(PWR_PVD_LEVEL_2V4);

    /* Enable the PVD Output */
    PWR_PvdEnable(ENABLE);

    while (1)
    {
    }

    if (EXTI_GetStatusFlag(EXTI_LINE16) != RESET)
    {
        /* Clear the EXTI line 16 pending bit */
        EXTI_ClrITPendBit(EXTI_LINE16);

        /* Check PVD output */
        if (PWR_GetFlagStatus(PWR_PVDO_FLAG) != RESET)
        {
            /* VDD is below PVD threshold */
            printf("PVD IRQ: VDD below threshold!\r\n");
        }
        else
        {
            /* VDD is above PVD threshold */
            printf("PVD IRQ: VDD above threshold.\r\n");
        }
    }

/* WKUP EXTI wakeup configuration (PA0 -> EXTI0) */
#define KEY_EXTI_PORT_SOURCE    GPIOA_PORT_SOURCE
#define KEY_EXTI_PIN_SOURCE     GPIO_PIN_SOURCE0

#define KEY_EXTI_LINE           EXTI_LINE0

#define KEY_EXTI_IRQn           EXTI0_IRQn
#define KEY_EXTI_IRQHandler     EXTI0_IRQHandler

    /* Enable the GPIO Clock */
    BUTTON_WKUP_CLK_ENABLE;

    /*Configure the GPIO pin as input floating*/
    GPIO_InitStruct(&GPIO_InitStructure);
    GPIO_InitStructure.Pin        = Pin;
    GPIO_InitStructure.GPIO_Mode  = GPIO_MODE_INPUT;
    GPIO_InitPeripheral(GPIOx, &GPIO_InitStructure);

    /*Configure key EXTI Line to key input  Pin*/
    GPIO_ConfigEXTILine(KEY_EXTI_PORT_SOURCE, KEY_EXTI_PIN_SOURCE);

    /*Configure key EXTI line*/
    EXTI_InitStruct(&EXTI_InitStructure);
    EXTI_InitStructure.EXTI_Line = KEY_EXTI_LINE;
    EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
    EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
    EXTI_InitStructure.EXTI_LineCmd = ENABLE;
    EXTI_InitPeripheral(&EXTI_InitStructure);

    while (1)
    {
       /* Insert a long delay */
       SysTick_Delay_Ms(1000);
       log_info("Entry SLEEP mode\n");
       /* Request to enter SLEEP mode*/
       PWR_EnterSLEEPMode(PWR_SLEEP_NOW, PWR_SLEEPENTRY_WFI);
       log_info("Exit SLEEP mode\n");
    }

void KEY_EXTI_IRQHandler(void)
{
    if (EXTI_GetStatusFlag(KEY_EXTI_LINE) != RESET)
    {
        EXTI_ClrStatusFlag(KEY_EXTI_LINE);
    }
}

    /*Configure key EXTI Line to key input  Pin*/
    GPIO_ConfigEXTILine(KEY_EXTI_PORT_SOURCE, KEY_EXTI_PIN_SOURCE);

    /*Configure key EXTI line*/
    EXTI_InitStruct(&EXTI_InitStructure);
    EXTI_InitStructure.EXTI_Line = KEY_EXTI_LINE;
    EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
    EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
    EXTI_InitStructure.EXTI_LineCmd = ENABLE;
    EXTI_InitPeripheral(&EXTI_InitStructure);

    while (1)
    {
       /* Insert a long delay */
       SysTick_Delay_Ms(1000);
       log_info("Entry STOP mode\n"); 
       /* Request to enter STOP mode*/
       PWR_EnterSTOPMode(PWR_STOPENTRY_WFI);
       /* Configures system clock after wake-up from STOP: enable HSI, PLL and select
          PLL as system clock source */
       SetSysClockToPLL(RCC_PLL_SRC_HSI,80000000);
       SysTick_Delay_Ms(10);
       log_init();
       log_info("\nExit STOP mode\n");
    }

        case 80000000:
            /* 4MHz * 40 = 160MHz(FVCO) / 2(PLLOD) /1 = 80MHz(Fpll) */
            latency   = FLASH_LATENCY_2;   /* 72MHz < SYSCLK <= 80MHz */
            pllmul    = 40;
            plloutdiv = RCC_PLL_OD_DIV_2;
            pllsysdiv = DISABLE;
            break;
        default:
            return ERROR;
    }

    /* HCLK = SYSCLK */
    RCC_ConfigHclk(RCC_SYSCLK_DIV1);

    /* PCLK2 = HCLK */
    RCC_ConfigPclk2(RCC_HCLK_DIV1);

    /* PCLK1 = HCLK/2 */
    RCC_ConfigPclk1(RCC_HCLK_DIV2);